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71. 发明授权

US08065634B1 System and method for analyzing a nanotube logic circuit 有权
标题翻译：用于分析纳米管逻辑电路的系统和方法
公开(公告)号：US08065634B1
公开(公告)日：2011-11-22
申请号：US12240409
申请日：2008-09-29
申请人： Nishant Patil , Subhasish Mitra
发明人： Nishant Patil , Subhasish Mitra
IPC分类号： G06F17/50
CPC分类号： B82Y10/00 , H01L27/283 , H01L51/0048 , H01L51/0558
摘要： A method for validating a nanotube logic network. The nanotube logic network is separated into regions based on a conductivity of the respective region. Potential paths through adjoining regions of the nanotube logic network are determined. Boolean path functions for each potential path are determined. If the Boolean path functions of the potential paths are equivalent to the intended logic function, then the nanotube logic network is immune to misaligned carbon nanotubes.
摘要翻译：一种验证纳米管逻辑网络的方法。基于相应区域的导电性，将纳米管逻辑网络分成多个区域。确定了通过纳米管逻辑网络的邻接区域的潜在路径。确定每个潜在路径的布尔路径函数。如果潜在路径的布尔路径函数等同于预期的逻辑函数，则纳米管逻辑网络对不对准的碳纳米管是免疫的。

72. 发明授权

US08039296B2 Organic thin film transistor array panel and manufacturing method thereof 有权
标题翻译：有机薄膜晶体管阵列面板及其制造方法
公开(公告)号：US08039296B2
公开(公告)日：2011-10-18
申请号：US12911621
申请日：2010-10-25
申请人： Bo-Sung Kim , Yong-Uk Lee , Mun-Pyo Hong
发明人： Bo-Sung Kim , Yong-Uk Lee , Mun-Pyo Hong
IPC分类号： H01L51/40
CPC分类号： H01L27/283 , H01L27/3274 , H01L51/0021 , H01L51/0036 , H01L51/0038 , H01L51/0052 , H01L51/0529 , H01L51/0541 , H01L51/0545
摘要： An organic thin film transistor array panel according to an embodiment of the present invention includes: a substrate; a data line disposed on the substrate; an insulating layer disposed on the data line and having a contact hole exposing the data line; a first electrode disposed on the insulating layer and connected to the data line through the contact hole; a second electrode disposed on the insulating layer; an organic semiconductor disposed on the first and the second electrodes; a gate insulator disposed on the organic semiconductor; and a gate electrode disposed on the gate insulator.
摘要翻译：根据本发明实施例的有机薄膜晶体管阵列面板包括：基板; 设置在所述基板上的数据线; 绝缘层，设置在所述数据线上并具有暴露所述数据线的接触孔; 第一电极，设置在绝缘层上并通过接触孔连接到数据线; 设置在所述绝缘层上的第二电极; 布置在第一和第二电极上的有机半导体; 设置在所述有机半导体上的栅极绝缘体; 以及设置在栅极绝缘体上的栅电极。

73. 发明授权

US08030642B2 Organic thin film transistor, method of manufacturing the same, and flat panel display having the same 有权
标题翻译：有机薄膜晶体管，其制造方法和具有该有机薄膜晶体管的平板显示器
公开(公告)号：US08030642B2
公开(公告)日：2011-10-04
申请号：US11267425
申请日：2005-11-04
申请人： Nam-Choul Yang
发明人： Nam-Choul Yang
IPC分类号： H01L51/00
CPC分类号： H01L27/283 , H01L51/0017 , H01L51/0516 , H01L51/0541
摘要： Provided are an organic TFT, a method of manufacturing the same, and a flat panel display having the same. The organic TFT includes source and drain electrodes formed on the surface of a substrate, an organic semiconductor layer that includes source and drain regions and a channel region, located on the source and drain electrodes, a gate electrode located above the organic semiconductor layer, and a first insulating layer located on the surface of the organic semiconductor layer, wherein a through hole is formed in at least a portion of the organic semiconductor layer and the first insulating layer, outside an active region that includes the source and drain regions and the channel region.
摘要翻译：提供有机TFT，其制造方法和具有该有机TFT的平板显示器。有机TFT包括形成在基板的表面上的源极和漏极，包括源极和漏极区域的有机半导体层和位于源极和漏极上的沟道区，位于有机半导体层上方的栅电极，以及位于所述有机半导体层的表面上的第一绝缘层，其中在所述有机半导体层和所述第一绝缘层的至少一部分中形成通孔，所述有源区域包括所述源极和漏极区域以及所述沟道地区。

74. 发明申请

US20110204375A1 THIN FILM TRANSISTOR STRUCTURE, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC DEVICE 有权
标题翻译：薄膜晶体管结构，其制造方法和电子器件
公开(公告)号：US20110204375A1
公开(公告)日：2011-08-25
申请号：US13028604
申请日：2011-02-16
申请人： Iwao YAGI , Hideki ONO , Mari SASAKI
发明人： Iwao YAGI , Hideki ONO , Mari SASAKI
IPC分类号： H01L29/04 , H01L21/336
CPC分类号： H01L29/66742 , G02F1/1368 , H01L27/1225 , H01L27/1285 , H01L27/1292 , H01L27/283 , H01L29/7869
摘要： A high-performance thin film transistor structure which is easily manufactured is provided. The thin film transistor structure includes: a first electrode; second and third electrodes apart from each other in a hierarchical level different from that of the first electrode; first, second, and third wirings connected to the first, second, and third electrodes, respectively; a main stack body disposed so as to be opposed to the first electrode with an interlayer insulating layer in between, between the first electrode, and the second and third electrodes; and a sub stack body including an insulating layer and a semiconductor layer, disposed so as to be opposed to the first wiring with the interlayer insulating layer in between, between the first and second wirings in a position where the first and second wirings overlap and/or between the first and third wirings in a position where the first and third wirings overlap.
摘要翻译：提供了容易制造的高性能薄膜晶体管结构。薄膜晶体管结构包括：第一电极; 第二和第三电极以与第一电极的层级不同的层级彼此分开; 分别连接到第一，第二和第三电极的第一，第二和第三布线; 主堆叠体，设置成与第一电极相对，在第一电极和第二和第三电极之间具有层间绝缘层; 以及包括绝缘层和半导体层的子堆叠体，在第一和第二布线重叠的位置和/或第二布线之间，在第一布线和第二布线之间设置有与第一布线相对的第一布线和层间绝缘层，或者在第一和第三布线重叠的位置之间的第一和第三布线之间。

75. 发明授权

US08004200B2 Element substrate and light emitting device 有权
标题翻译：元件基板和发光器件
公开(公告)号：US08004200B2
公开(公告)日：2011-08-23
申请号：US11562626
申请日：2006-11-22
申请人： Mitsuaki Osame , Aya Anzai , Yu Yamazaki
发明人： Mitsuaki Osame , Aya Anzai , Yu Yamazaki
IPC分类号： G09G3/36
CPC分类号： H01L27/326 , G09G3/2022 , G09G3/3233 , G09G2300/0417 , G09G2300/0842 , G09G2300/0885 , G09G2310/0251 , H01L27/283 , H01L29/78672 , H01L51/5012 , H01L51/5296
摘要： A light emitting device and an element substrate which are capable of suppressing variations in the luminance intensity of a light emitting element among pixels due to characteristic variations of a driving transistor without suppressing off-current of a switching transistor low and increasing storage capacity of a capacitor. According to the invention, a depletion mode transistor is used as a driving transistor. The gate of the driving transistor is fixed in its potential or connected to the source or drain thereof to operate in a saturation region with a constant current flow. A current controlling transistor which operates in a linear region is connected in series to the driving transistor, and a video signal for transmitting a light emission or non-emission of a pixel is inputted to the gate of the current controlling transistor through a switching transistor.
摘要翻译：一种发光器件和元件衬底，其能够抑制由于驱动晶体管的特性变化而导致的像素之中的发光元件的亮度强度的变化，而不会抑制开关晶体管的截止电流低并且增加电容器的存储容量。根据本发明，使用耗尽型晶体管作为驱动晶体管。驱动晶体管的栅极固定在其电位或连接到其源极或漏极，以在具有恒定电流的饱和区域中工作。在线性区域中工作的电流控制晶体管与驱动晶体管串联连接，并且用于透射像素的发光或不发光的视频信号通过开关晶体管输入到电流控制晶体管的栅极。

76. 发明申请

US20110133284A1 MULTIPLE CARBON NANOTUBE TRANSFER AND ITS APPLICATIONS FOR MAKING HIGH-PERFORMANCE CARBON NANOTUBE FIELD-EFFECT TRANSISTOR (CNFET), TRANSPARENT ELECTRODES, AND THREE-DIMENSIONAL INTEGRATION OF CNFETS 有权
标题翻译：多碳纳米管转移及其制备高性能碳纳米管场效应晶体管（CNFET），透明电极和CNFET的三维集成的应用
公开(公告)号：US20110133284A1
公开(公告)日：2011-06-09
申请号：US12718418
申请日：2010-03-05
申请人： SUBHASISH MITRA , Nishant P. Patil , Chung Chun Wan , H.-S. Philip Wong
发明人： SUBHASISH MITRA , Nishant P. Patil , Chung Chun Wan , H.-S. Philip Wong
IPC分类号： H01L27/088 , B08B7/00 , H01B13/00 , B32B38/00 , H01L21/302 , B82Y40/00 , B82Y99/00
CPC分类号： H01L31/035281 , B08B7/0035 , B82Y10/00 , B82Y30/00 , B82Y40/00 , H01L27/283 , H01L51/0013 , H01L51/003 , H01L51/0048 , H01L51/0541 , H01L51/0558 , Y02E10/549 , Y02P70/521
摘要： A wafer-scale multiple carbon nanotube transfer process is provided. According to one embodiment of the invention, plasma exposure processes are performed at various stages of the fabrication process of a carbon nanotube device or article to improve feasibility and yield for successive transfers of nanotubes. In one such carbon nanotube transfer process, a carrier material is partially etched by a plasma process before removing the carrier material through, for example, a wet etch. By applying the subject plasma exposure processes, fabrication of ultra-high-density nanotubes and ultra-high-density nanotube grids or fabrics is facilitated. The ultra-high-density nanotubes and ultra-high-density nanotube grids or fabrics fabricated utilizing embodiments of the invention can be used, for example, to make high-performance carbon nanotube field effect transistors (CNFETs) and low cost, highly-transparent, and low-resistivity electrodes for solar cell and flat panel display applications. Further, three-dimensional CNFETs can be provided by utilizing the subject plasma exposure processes.
摘要翻译：提供了晶圆级多碳纳米管转移工艺。根据本发明的一个实施方案，等离子体暴露过程在碳纳米管装置或制品的制造过程的各个阶段进行，以提高连续转移纳米管的可行性和产率。在一种这样的碳纳米管转移方法中，通过例如湿蚀刻除去载体材料之前，通过等离子体工艺部分地蚀刻载体材料。通过应用目标等离子体曝光工艺，便于制造超高密度纳米管和超高密度纳米管网格或织物。使用本发明实施例制造的超高密度纳米管和超高密度纳米管网格或织物可用于例如制造高性能碳纳米管场效应晶体管（CNFET）和低成本，高透明度，以及用于太阳能电池和平板显示器应用的低电阻率电极。此外，可以通过利用目标等离子体曝光工艺来提供三维CNFET。

77. 发明申请

US20110111555A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110111555A1
公开(公告)日：2011-05-12
申请号：US13010395
申请日：2011-01-20
申请人： Shinobu FURUKAWA , Ryota IMAHAYASHI
发明人： Shinobu FURUKAWA , Ryota IMAHAYASHI
IPC分类号： H01L51/40
CPC分类号： H01L51/0545 , B82Y10/00 , H01L27/283 , H01L27/3244 , H01L51/0046 , H01L51/0059 , H01L51/0068 , H01L51/0078 , H01L51/0562
摘要： It is an object of the present invention to form an organic transistor including an organic semiconductor having high crystallinity without loosing an interface between an organic semiconductor of a channel where carriers are spread out and a gate insulating layer and deteriorating a yield. A semiconductor device according to the present invention has a stacked structure of organic semiconductor layers, and at least the upper organic semiconductor layer is in a polycrystalline or a single crystalline state and the lower organic semiconductor layer is made of a material serving as a channel. Carrier mobility can be increased owing to the upper organic semiconductor layer having high crystallinity; thus, insufficient contact due to the upper organic semiconductor layer can be compensated by the lower organic semiconductor layer.
摘要翻译：本发明的目的是形成具有高结晶度的有机半导体的有机晶体管，而不会失去载流子扩散的沟道的有机半导体与栅极绝缘层之间的界面，从而劣化产率。根据本发明的半导体器件具有有机半导体层的堆叠结构，并且至少上部有机半导体层处于多晶或单晶状态，下部有机半导体层由用作沟道的材料制成。由于具有高结晶度的上有机半导体层可以增加载流子迁移率; 因此，通过下部有机半导体层可以补偿由于上部有机半导体层引起的接触不足。

78. 发明申请

US20110108842A1 DISPLAY DEVICE AND ELECTRONIC APPARATUS 有权
标题翻译：显示设备和电子设备
公开(公告)号：US20110108842A1
公开(公告)日：2011-05-12
申请号：US13010060
申请日：2011-01-20
申请人： Shunpei Yamazaki , Jun Koyama
发明人： Shunpei Yamazaki , Jun Koyama
IPC分类号： H01L33/08
CPC分类号： H01L27/283 , G09G3/2022 , G09G3/3233 , G09G2300/0417 , G09G2300/0426 , G09G2300/0465 , G09G2300/0842 , G09G2300/0861 , G09G2300/0866 , G09G2310/0251 , G09G2310/0256 , G09G2310/0286 , G09G2320/0223 , G09G2320/043 , H01L27/156 , H01L27/3276 , H01L29/78669 , H01L29/78696 , H01L51/0545 , H01L51/0562 , H01L51/5203
摘要： A display device in which variations in luminance due to variations in characteristics of transistors are reduced, and image quality degradation due to variations in resistance values is prevented. The invention comprises a transistor whose channel portion is formed of an amorphous semiconductor or an organic semiconductor, a connecting wiring connected to a source electrode or a drain electrode of the transistor, alight emitting element having a laminated structure which includes a pixel electrode, an electro luminescent layer, and a counter electrode, an insulating layer surrounding an end portion of the pixel electrode, and an auxiliary wiring formed in the same layer as a gate electrode of the transistor, a connecting wiring, or the pixel electrode. Further, the connecting wiring is connected to the pixel electrode, and the auxiliary wiring is connected to the counter electrode via an opening portion provided in the insulating layer.
摘要翻译：一种显示装置，其中由于晶体管的特性变化导致的亮度变化减小，并且防止了由于电阻值的变化引起的图像质量劣化。本发明包括晶体管，其沟道部分由非晶半导体或有机半导体形成，连接线连接到晶体管的源电极或漏极，具有层叠结构的发光元件包括像素电极，电致发光层和对电极，围绕像素电极的端部的绝缘层和形成在与晶体管，连接布线或像素电极的栅电极相同的层中的辅助布线。此外，连接布线连接到像素电极，并且辅助布线经由设置在绝缘层中的开口部分连接到对电极。

79. 发明授权

US07897439B2 Electronic device with unique encoding 有权
标题翻译：电子设备具有独特的编码
公开(公告)号：US07897439B2
公开(公告)日：2011-03-01
申请号：US12645987
申请日：2009-12-23
申请人： Robert A. Street , Ana Claudia Arias
发明人： Robert A. Street , Ana Claudia Arias
IPC分类号： H01L21/82
CPC分类号： H01L51/0005 , H01L27/1285 , H01L27/1288 , H01L27/1292 , H01L27/283 , H01L51/0545
摘要： An electronic device comprising a thin film transistor (TFT) array and manufacturing methods thereof according to various embodiments. Jet-printed material is deposited on selected partially formed transistors to form completed transistors. Thus, a selected number of the TFTs are connected into the circuit while the remainder of the TFTs are not connected. An electronic read-out of the array identifies the specific array by distinguishing the connected TFTs from the unconnected ones. For a TFT array with n elements there are 2n alternative configurations; therefore, a relatively small number of TFTs can uniquely identify a huge number of devices. Such uniquely encoded devices have applications for encryption, identification and personalization of electronic systems.
摘要翻译：一种包括薄膜晶体管（TFT）阵列的电子器件及其制造方法。喷射印刷材料沉积在选定的部分形成的晶体管上以形成完整的晶体管。因此，选择数量的TFT连接到电路中，而其余TFT不连接。阵列的电子读出通过将连接的TFT与未连接的TFT区分开来识别特定的阵列。对于具有n个元件的TFT阵列，有2n个备选配置; 因此，相对较少的TFT可以唯一地识别大量的设备。这种唯一编码的设备具有用于电子系统的加密，识别和个性化的应用。

80. 发明授权

US07880380B2 Display device and electronic apparatus 有权
标题翻译：显示设备和电子设备
公开(公告)号：US07880380B2
公开(公告)日：2011-02-01
申请号：US12044044
申请日：2008-03-07
申请人： Shunpei Yamazaki , Jun Koyama
发明人： Shunpei Yamazaki , Jun Koyama
IPC分类号： H01J1/62
CPC分类号： H01L27/283 , G09G3/2022 , G09G3/3233 , G09G2300/0417 , G09G2300/0426 , G09G2300/0465 , G09G2300/0842 , G09G2300/0861 , G09G2300/0866 , G09G2310/0251 , G09G2310/0256 , G09G2310/0286 , G09G2320/0223 , G09G2320/043 , H01L27/156 , H01L27/3276 , H01L29/78669 , H01L29/78696 , H01L51/0545 , H01L51/0562 , H01L51/5203
摘要： A display device in which variations in luminance due to variations in characteristics of transistors are reduced, and image quality degradation due to variations in resistance values is prevented. The invention comprises a transistor whose channel portion is formed of an amorphous semiconductor or an organic semiconductor, a connecting wiring connected to a source electrode or a drain electrode of the transistor, a light emitting element having a laminated structure which includes a pixel electrode, an electro luminescent layer, and a counter electrode, an insulating layer surrounding an end portion of the pixel electrode, and an auxiliary wiring formed in the same layer as a gate electrode of the transistor, a connecting wiring, or the pixel electrode. Further, the connecting wiring is connected to the pixel electrode, and the auxiliary wiring is connected to the counter electrode via an opening portion provided in the insulating layer.
摘要翻译：一种显示装置，其中由于晶体管的特性变化导致的亮度变化减小，并且防止了由于电阻值的变化引起的图像质量劣化。本发明包括晶体管，其沟道部分由非晶半导体或有机半导体形成，连接线连接到晶体管的源电极或漏极，具有层叠结构的发光元件包括像素电极，电致发光层和对电极，围绕像素电极的端部的绝缘层和形成在与晶体管，连接布线或像素电极的栅电极相同的层中的辅助布线。此外，连接布线连接到像素电极，并且辅助布线经由设置在绝缘层中的开口部分连接到对电极。

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