专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

71. 发明授权

US06717071B2 Coaxial via hole and process of fabricating the same 有权
标题翻译：同轴通孔及其制造方法
公开(公告)号：US06717071B2
公开(公告)日：2004-04-06
申请号：US09809310
申请日：2001-03-16
申请人： Huey-Ru Chang , Min-Lin Lee , Ted C. Ho
发明人： Huey-Ru Chang , Min-Lin Lee , Ted C. Ho
IPC分类号： H05K111
CPC分类号： H05K1/0222 , H01L23/49827 , H01L23/49838 , H01L2223/6622 , H01L2224/16 , H05K1/115 , H05K1/141 , H05K1/162 , H05K1/167 , H05K3/4069 , H05K3/429 , H05K2201/09809 , H05K2201/10378 , H05K2201/10689
摘要： A coaxial via hole structure used in a carrier is disclosed. The coaxial via hole includes an outer cylinder-shaped conductor, an inner cylinder-shaped conductor and an intermediate fill. The outer cylinder-shaped conductor extends along a first direction. The inner cylinder-shaped conductor is disposed in the outer cylinder-shaped conductor and also extends along the first direction. The intermediate fill is between the outer cylinder-shaped conductor and the inner cylinder-shaped conductor and is made of insulating material or electrical-resistant material. The coaxial via hole structure can be applied as a capacitor or a resistor and has the function of signal shielding.
摘要翻译：公开了一种在载体中使用的同轴通孔结构。同轴通孔包括外筒形导体，内圆柱形导体和中间填充物。外筒形导体沿着第一方向延伸。内筒形导体设置在外筒状导体中，并且也沿着第一方向延伸。中间填料位于外筒状导体与内筒状导体之间，由绝缘材料或耐电材料构成。同轴通孔结构可以作为电容器或电阻器使用，具有信号屏蔽功能。

72. 发明授权

US06710258B2 Circuitized substrate for high-frequency applications 有权
标题翻译：电路板用于高频应用
公开(公告)号：US06710258B2
公开(公告)日：2004-03-23
申请号：US10125624
申请日：2002-04-18
申请人： Stefano Oggioni , Roberto Ravanelli
发明人： Stefano Oggioni , Roberto Ravanelli
IPC分类号： H05K103
CPC分类号： H05K1/0222 , H01L23/49827 , H01L23/66 , H01L2223/6616 , H01L2223/6622 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2924/00014 , H01L2924/01322 , H01L2924/15311 , H01L2924/3011 , H01L2924/3025 , H05K1/112 , H05K3/429 , H05K2201/093 , H05K2201/09618 , H05K2201/0969 , H05K2201/09809 , H05K2201/10734 , H01L2224/05599
摘要： A multi-layered circuitized substrate for high-frequency applications. Conductive via-holes extend between two non-adjacent conductive layers for transmitting high-frequency signals therebetween. For each via-hole, shielding rings connectable to a reference voltage are provided, each ring formed in a corresponding intermediate conductive layer between the two non-adjacent conductive layers. The rings define a shielding coaxial structure for the via-hole. Preferably, the intermediate conductive layers are spaced apart from the via-hole, and particularly from respective lands at the ends thereof, in order to reduce stray capacitance associated with the via-hole without losing the shielding effect provided by the rings.
摘要翻译：一种用于高频应用的多层电路衬底。导电通孔在两个不相邻的导电层之间延伸，用于在它们之间传输高频信号。对于每个通孔，提供可连接到参考电压的屏蔽环，每个环形成在两个不相邻的导电层之间的对应的中间导电层中。这些环限定了用于通孔的屏蔽同轴结构。优选地，中间导电层与通孔间隔开，特别是从其端部的相应焊盘间隔开，以便减少与通孔相关联的杂散电容，而不会损失由环提供的屏蔽效应。

73. 发明申请

US20040009666A1 Thin film multi-layer wiring substrate and method for manufacturing same 有权
标题翻译：薄膜多层布线基板及其制造方法
公开(公告)号：US20040009666A1
公开(公告)日：2004-01-15
申请号：US10338646
申请日：2003-01-09
申请人： FUJITSU LIMITED
发明人： Yoshikatsu Ishizuki , Nobuyuki Hayashi , Masataka Mizukoshi , Yasuo Yamagishi
IPC分类号： H01L021/302 , H01L021/461
CPC分类号： H05K1/0221 , H01L2223/6622 , H05K3/4647 , H05K3/467 , H05K2201/09809 , H05K2203/0733 , Y10T428/24917 , Y10T428/24926
摘要： A thin film multi-layer wiring substrate comprising a plurality of wiring layers, each adjacent pair of wiring layers being separated by an insulating layer, wherein at least one of the wiring layers includes wiring formed by an inner conductor member and a conductor layer surrounding the periphery thereof through an insulating material. A printed circuit board comprising a signal line conductor formed on a first insulating layer which selectively covers a first ground layer spreading on a substrate, shield walls extending across gaps on both sides of the signal line conductor, and conductively connected to the first ground layer, and a second ground layer conductively connected to the shield walls, stretching across gaps above the signal line conductor, and in which a plurality of openings having lengths and distances of equal to or less than one quarter of a frequency handled by the signal line conductor are formed, is also disclosed.
摘要翻译：一种薄膜多层布线基板，包括多个布线层，每个相邻的一对布线层被绝缘层隔开，其中至少一个布线层包括由内部导体构件形成的布线和围绕该布线层的导体层其周边通过绝缘材料。一种印刷电路板，包括形成在第一绝缘层上的信号线导体，其选择性地覆盖在基板上扩展的第一接地层，跨过信号线导体两侧的间隙延伸的屏蔽壁，并且导电连接到第一接地层，以及导电连接到屏蔽壁的第二接地层，跨越信号线导体上方的间隙延伸，并且其中具有等于或小于由信号线导体处理的频率的四分之一的长度和距离的多个开口是形成，也被披露。

74. 发明授权

US06677248B2 Coaxial type signal line and manufacturing method thereof 失效
标题翻译：同轴型信号线及其制造方法
公开(公告)号：US06677248B2
公开(公告)日：2004-01-13
申请号：US10045427
申请日：2001-11-08
申请人： Young-Se Kwon , In-Ho Jeong
发明人： Young-Se Kwon , In-Ho Jeong
IPC分类号： H01L2100
CPC分类号： H05K1/0221 , H01L23/5225 , H01L23/66 , H01L2223/6622 , H01L2223/6627 , H01L2924/0002 , H01L2924/1903 , H01L2924/3011 , H01P3/06 , H01P11/005 , H05K1/0272 , H05K2201/09809 , H05K2201/09981 , H05K2203/0733 , H01L2924/00
摘要： Disclosed is a coaxial type signal line that solves problems associated with signal interference and the connection of signal lines that are generated in a radio frequency (RF) electrical system. A method for manufacturing the coaxial type signal line includes the steps of forming a groove on a substrate, forming a first ground line on a surface of the groove and a plain surface of the substrate, forming a first dielectric layer including dielectric material on the first ground line formed on the surface of the groove, forming a signal line on the first dielectric layer the signal line for transmitting signals, forming a second dielectric layer including dielectric material on the signal line and the first dielectric layer, and forming a second ground line on the first ground line and the second dielectric layer. Since the signal line in the signal line structure according to the present invention is electrically shielded by the first and second ground lines, interference between the signal line and other signal lines on the semiconductor substrate can be prevented, and accordingly, the signal lines may be designed compactly on a semiconductor substrate and the system size can be reduced.
摘要翻译：公开了一种同轴型信号线，其解决与射频（RF）电气系统中产生的信号干扰和信号线的连接有关的问题。一种用于制造同轴型信号线的方法包括以下步骤：在衬底上形成沟槽，在沟槽的表面上形成第一接地线和衬底的平坦表面，在第一衬底上形成包括电介质材料的第一介电层接地线，形成在沟槽的表面上，在第一介电层上形成用于传输信号的信号线的信号线，在信号线和第一介电层上形成包括电介质材料的第二电介质层，形成第二接地线在第一接地线和第二介电层上。由于根据本发明的信号线结构中的信号线被第一和第二接地线电屏蔽，所以可以防止信号线与半导体衬底上的其它信号线之间的干扰，因此信号线可以是在半导体衬底上紧凑地设计，并且可以减小系统尺寸。

75. 发明授权

US06636406B1 Universal multi-functional common conductive shield structure for electrical circuitry and energy conditioning 有权
标题翻译：用于电路和能量调节的通用多功能通用导电屏蔽结构
公开(公告)号：US06636406B1
公开(公告)日：2003-10-21
申请号：US09594447
申请日：2000-06-15
申请人： Anthony A. Anthony
发明人： Anthony A. Anthony
IPC分类号： H02H900
CPC分类号： H05K9/0039 , H01L23/50 , H01L23/552 , H01L2223/6622 , H01L2924/0002 , H01L2924/3011 , H03H1/0007 , H05K1/141 , H05K1/162 , H05K3/3436 , H01L2924/00
摘要： The present invention relates to a layered universal, multi-functional, common conductive shield structure with conductive pathways for energy and EMI conditioning and protection that also possesses a commonly shared and centrally positioned conductive pathway or electrode of the structure that can simultaneously shield and allow smooth energy interaction between grouped and energized conductive pathway electrodes. The invention, when energized, will allow the contained conductive pathways or electrodes to operate with respect to one another harmoniously, yet in an oppositely phased or charged manner, respectively. The invention will also provide EMI filtering and surge protection while maintaining apparent even or balanced voltage supply between a source and an energy utilizing-load when placed into a circuit and energized. The invention will also be able to simultaneous and effectively provide energy conditioning functions that include bypassing, energy and signal decoupling, energy storage, continued balance in SSO (Simultaneous Switching Operations) states and all without contributing disruptive energy parasitics back into the circuit system as the invention is passively operated, within.
摘要翻译：本发明涉及具有用于能量和EMI调节和保护的导电路径的分层通用，多功能的公共导电屏蔽结构，其还具有共同共享且中心定位的结构的导电路径或电极，其可以同时屏蔽并允许平滑分组和通电导电通路电极之间的能量相互作用。本发明在通电时将允许所包含的导电路径或电极相对于彼此协调地以相反的相位或带电方式相互操作。本发明还将提供EMI滤波和浪涌保护，同时在放置到电路中并且通电时保持源和能量利用负载之间的明显均匀或平衡的电压供应。本发明还将能够同时且有效地提供能量调节功能，其包括旁路，能量和信号去耦，能量存储，SSO（同时开关操作）状态中的持续平衡以及所有这些都不会将破坏性的能量寄生效应返回到电路系统中作为发明内部被动地操作。

76. 发明申请

US20030168250A1 High frequency device packages and methods 有权
标题翻译：高频器件封装和方法
公开(公告)号：US20030168250A1
公开(公告)日：2003-09-11
申请号：US10286039
申请日：2002-11-01
申请人： BridgeWave Communications, Inc.
发明人： Eliezer Pasternak , Sean Cahill , Bance Hom
IPC分类号： H05K001/11 , H05K001/03
CPC分类号： H05K3/445 , H01L23/055 , H01L23/66 , H01L24/48 , H01L24/49 , H01L2223/6611 , H01L2223/6622 , H01L2224/05599 , H01L2224/45015 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2224/48247 , H01L2224/484 , H01L2224/4903 , H01L2224/85399 , H01L2224/85444 , H01L2224/8592 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/15747 , H01L2924/15786 , H01L2924/16152 , H01L2924/16235 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H01L2924/3025 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165 , Y10T29/49174 , Y10T29/53874 , H01L2924/06 , H01L2224/45099 , H01L2924/20755 , H01L2924/00 , H01L2924/05032
摘要： A high frequency device packing method and package are described wherein coaxial structures are formed from the high frequency device to the via. A coaxial via structure and a micro-coaxial bonding wire are described.
摘要翻译：描述了一种高频器件封装方法和封装，其中从高频器件到通孔形成同轴结构。描述了同轴通孔结构和微同轴接合线。

77. 发明授权

US06549389B2 Electrode arrangement for circuit energy conditioning 失效
标题翻译：电路布置用于电路能量调节
公开(公告)号：US06549389B2
公开(公告)日：2003-04-15
申请号：US09929528
申请日：2001-08-14
申请人： Anthony A. Anthony , William M. Anthony
发明人： Anthony A. Anthony , William M. Anthony
IPC分类号： H02H900
CPC分类号： H01C1/06 , H01C1/14 , H01C7/102 , H01G2/22 , H01L2223/6622 , H05K9/0018 , H05K9/0066
摘要： A differential mode and common mode filtering arrangement (1—1, 1-2, 1-3A, 1-6) having a plurality of shielded electrodes (213, 215) and a plurality of shielding electrodes (204, 214, 269A, 269B).
摘要翻译：具有多个屏蔽电极（213,215）和多个屏蔽电极（204,214,269A，269B）的差分模式和共模滤波装置（1-1,1-2,3-3A，1-6））。

78. 发明授权

US06545227B2 Pocket mounted chip having microstrip line 失效
标题翻译：袖珍芯片具有微带线
公开(公告)号：US06545227B2
公开(公告)日：2003-04-08
申请号：US09903292
申请日：2001-07-11
申请人： Lawrence H. Silverman
发明人： Lawrence H. Silverman
IPC分类号： H05K116
CPC分类号： H01L23/66 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2223/6616 , H01L2223/6622 , H01L2223/6627 , H01L2224/32225 , H01L2224/451 , H01L2224/48227 , H01L2224/48472 , H01L2224/49175 , H01L2224/73265 , H01L2224/92247 , H01L2924/01078 , H01L2924/01079 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15173 , H01L2924/1903 , H01L2924/00 , H01L2924/00014
摘要： An integrated circuit device includes a semiconductor chip, a circuit board and a layer of bonding material. The semiconductor chip has a metal plated surface on a first side and has a predetermined thickness. A first conductive layer formed of electrically conductive material is bonded to a first side of a first dielectric layer and defines a plurality of conducting elements. A second conductive layer defining a first electrical ground plane and formed of electrically conductive material is bonded to a second side of the first dielectric layer opposite the first conductive layer. The circuit board has a pocket formed therein, passing through the first conductive layer and through the first dielectric layer. The pocket is closed on the second side by the second conductive layer. A portion of the second conductive layer is exposed at a bottom of the pocket. The pocket is of substantially the same size and shape as the semiconductor chip. The pocket receives the semiconductor chip with the first side of the semiconductor chip disposed toward the second conductive layer. A layer of conductive bonding material is disposed in the pocket between the metal plated surface of the semiconductor chip and the second conductive layer. The layer of bonding material mechanically and electrically connects the semiconductor chip to the second conductive layer.
摘要翻译：集成电路器件包括半导体芯片，电路板和接合材料层。半导体芯片在第一侧具有金属镀覆表面，并具有预定的厚度。由导电材料形成的第一导电层被结合到第一介电层的第一侧并限定多个导电元件。限定第一电接地平面并由导电材料形成的第二导电层被接合到与第一导电层相对的第一电介质层的第二侧。电路板具有形成在其中的口袋，穿过第一导电层并穿过第一介电层。口袋在第二侧被第二导电层封闭。第二导电层的一部分露出在口袋的底部。该口袋具有与半导体芯片大致相同的尺寸和形状。凹口接收半导体芯片，半导体芯片的第一侧朝向第二导电层设置。导电接合材料层设置在半导体芯片的金属镀覆表面和第二导电层之间的凹穴中。接合材料层将半导体芯片机械地和电连接到第二导电层。

79. 发明申请

US20030012006A1 POCKET MOUNTED CHIP HAVING MICROSTRIP LINE 失效
标题翻译：带有微网线的口袋安装芯片
公开(公告)号：US20030012006A1
公开(公告)日：2003-01-16
申请号：US09903292
申请日：2001-07-10
发明人： Lawrence H. Silverman
IPC分类号： H05K007/02
CPC分类号： H01L23/66 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2223/6616 , H01L2223/6622 , H01L2223/6627 , H01L2224/32225 , H01L2224/451 , H01L2224/48227 , H01L2224/48472 , H01L2224/49175 , H01L2224/73265 , H01L2224/92247 , H01L2924/01078 , H01L2924/01079 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15173 , H01L2924/1903 , H01L2924/00 , H01L2924/00014
摘要： An integrated circuit device includes a semiconductor chip, a circuit board and a layer of bonding material. The semiconductor chip has a metal plated surface on a first side and has a predetermined thickness. A first conductive layer formed of electrically conductive material is bonded to a first side of a first dielectric layer and defines a plurality of conducting elements. A second conductive layer defining a first electrical ground plane and formed of electrically conductive material is bonded to a second side of the first dielectric layer opposite the first conductive layer. The circuit board has a pocket formed therein, passing through the first conductive layer and through the first dielectric layer. The pocket is closed on the second side by the second conductive layer. A portion of the second conductive layer is exposed at a bottom of the pocket. The pocket is of substantially the same size and shape as the semiconductor chip. The pocket receives the semiconductor chip with the first side of the semiconductor chip disposed toward the second conductive layer. A layer of conductive bonding material is disposed in the pocket between the metal plated surface of the semiconductor chip and the second conductive layer. The layer of bonding material mechanically and electrically connects the semiconductor chip to the second conductive layer.
摘要翻译：集成电路器件包括半导体芯片，电路板和接合材料层。半导体芯片在第一侧具有金属镀覆表面，并具有预定的厚度。由导电材料形成的第一导电层被结合到第一介电层的第一侧并限定多个导电元件。限定第一电接地平面并由导电材料形成的第二导电层被接合到与第一导电层相对的第一电介质层的第二侧。电路板具有形成在其中的口袋，穿过第一导电层并穿过第一介电层。口袋在第二侧被第二导电层封闭。第二导电层的一部分露出在口袋的底部。该口袋具有与半导体芯片大致相同的尺寸和形状。凹口接收半导体芯片，半导体芯片的第一侧朝向第二导电层设置。导电接合材料层设置在半导体芯片的金属镀覆表面和第二导电层之间的凹穴中。接合材料层将半导体芯片机械地和电连接到第二导电层。

80. 发明申请

US20020166689A1 High frequency semiconductor device housing package and mounting structure for mounting the same 有权
标题翻译：高频半导体器件外壳封装和安装结构
公开(公告)号：US20020166689A1
公开(公告)日：2002-11-14
申请号：US10107540
申请日：2002-03-26
发明人： Maraki Maetani
IPC分类号： H01L023/02
CPC分类号： H01L23/49838 , H01L23/66 , H01L24/45 , H01L24/48 , H01L2223/6622 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2924/00014 , H01L2924/01079 , H01L2924/12041 , H01L2924/15174 , H01L2924/15311 , H05K1/0219 , H05K1/0243 , H05K3/3436 , H05K2201/0715 , H05K2201/09809 , H05K2201/10734 , H01L2924/00 , H01L2924/00015 , H01L2224/05599
摘要： The invention is directed to a high frequency semiconductor device housing package comprising: an insulating substrate having on its top surface a high frequency semiconductor device mounting and housing portion; a plurality of wiring conductors delivered from the mounting and housing portion through the under surface of the insulating substrate, to which an electrode of the high frequency semiconductor device is electrically connected; and a plurality of ball-shaped signal terminals and ball-shaped grounding terminals arranged on the under surface of the insulating substrate and electrically connected to the wiring conductor, the ball-shaped grounding terminals being arranged substantially circularly so as to surround the centered ball-shaped signal terminal. This construction achieves efficient transmission of high-frequency signals because of its excellent high frequency characteristics in the ball-shaped terminals. It also excels in easiness of mass production and mounting accuracy.
摘要翻译：本发明涉及一种高频半导体器件壳体封装，包括：绝缘衬底，其顶表面上具有高频半导体器件安装和壳体部分; 多个布线导体，通过绝缘基板的下表面从安装和壳体部分输出，高频半导体器件的电极与之电连接; 以及布置在所述绝缘基板的下表面上且与所述布线导体电连接的多个球形信号端子和球形接地端子，所述球形接地端子大致圆形地布置成围绕所述中心的球形接地端子，形信号端子。这种结构由于其在球形端子中具有优异的高频特性，实现了高频信号的高效传输。它也很容易进行大规模生产和安装精度。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式