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71. 发明授权

US09768023B1 Method for structuring a substrate 有权
公开(公告)号：US09768023B1
公开(公告)日：2017-09-19
申请号：US14953492
申请日：2015-11-30
申请人： Infineon Technologies AG
发明人： Martin Mischitz , Markus Heinrici , Florian Bernsteiner
IPC分类号： H01L21/00 , H01L21/027 , H01L21/70 , H01L21/3105 , H01L21/02 , H01L21/47
CPC分类号： H01L21/0274 , H01L21/02107 , H01L21/02203 , H01L21/0271 , H01L21/30604 , H01L21/3065 , H01L21/3085 , H01L21/3086 , H01L21/31058 , H01L21/32139 , H01L21/47 , H01L21/70
摘要： According to various embodiments, a method of processing a substrate may include: disposing a viscous material over a substrate including at least one topography feature extending into the substrate to form a protection layer over the substrate; adjusting a viscosity of the viscous material during a contacting period of the viscous material and the substrate to stabilize a spatial distribution of the viscous material as disposed; processing the substrate using the protection layer as mask; and removing the protection layer after processing the substrate.

72. 发明申请

US20170250204A1 SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：US20170250204A1
公开(公告)日：2017-08-31
申请号：US15594813
申请日：2017-05-15
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Shunpei YAMAZAKI , Kenichi OKAZAKI , Mitsuo MASHIYAMA , Takuya HANDA , Masahiro WATANABE , Hajime TOKUNAGA
IPC分类号： H01L27/12 , H01L21/316 , H01L29/24 , G02F1/1368 , H01L27/105 , H01L29/786 , H01L51/50
CPC分类号： H01L27/1248 , G02F1/1368 , H01L21/70 , H01L27/1052 , H01L27/1225 , H01L29/24 , H01L29/78648 , H01L29/7869 , H01L29/78693 , H01L51/50
摘要： Stable electrical characteristics of a transistor including an oxide semiconductor layer are achieved. A highly reliable semiconductor device including the transistor is provided. The semiconductor device includes a multilayer film formed of an oxide layer and an oxide semiconductor layer, a gate insulating film in contact with the oxide layer, and a gate electrode overlapping with the multilayer film with the gate insulating film interposed therebetween. The oxide layer contains a common element to the oxide semiconductor layer and has a large energy gap than the oxide semiconductor layer. The composition between the oxide layer and the oxide semiconductor layer gradually changes.

73. 发明申请

US20170154767A1 METHOD FOR STRUCTURING A SUBSTRATE 审中-公开
公开(公告)号：US20170154767A1
公开(公告)日：2017-06-01
申请号：US15347835
申请日：2016-11-10
申请人： Infineon Technologies AG
发明人： Martin MISCHITZ , Markus HEINRICI , Florian BERNSTEINER
IPC分类号： H01L21/027 , H01L21/306 , H01L21/3065 , H01L21/308
CPC分类号： H01L21/0274 , H01L21/02107 , H01L21/02203 , H01L21/0271 , H01L21/30604 , H01L21/3065 , H01L21/3085 , H01L21/3086 , H01L21/31058 , H01L21/32139 , H01L21/47 , H01L21/70
摘要： According to various embodiments, a method of processing a substrate may include: disposing a viscous material over a substrate including at least one topography feature extending into the substrate to form a protection layer over the substrate; adjusting a viscosity of the viscous material during a contacting period of the viscous material and the substrate to stabilize a spatial distribution of the viscous material as disposed; processing the substrate using the protection layer as mask; and removing the protection layer after processing the substrate.

74. 发明授权

US09570593B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US09570593B2
公开(公告)日：2017-02-14
申请号：US14706304
申请日：2015-05-07
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Atsuo Isobe
IPC分类号： H01L21/70 , H01L27/108 , H01L29/66 , H01L27/12
CPC分类号： H01L29/66969 , H01L21/70 , H01L27/1085 , H01L27/1259 , H01L29/78648 , H01L29/7869 , H01L29/78696
摘要： A variation in electrical characteristics, such as a negative shift of the threshold voltage or an increase in S value, of a fin-type transistor including an oxide semiconductor material is prevented. An oxide semiconductor film is sandwiched between a plurality of gate electrodes with an insulating film provided between the oxide semiconductor film and each of the gate electrodes. Specifically, a first gate insulating film is provided to cover a first gate electrode, an oxide semiconductor film is provided to be in contact with the first gate insulating film and extend beyond the first gate electrode, a second gate insulating film is provided to cover at least the oxide semiconductor film, and a second gate electrode is provided to be in contact with part of the second gate insulating film and extend beyond the first gate electrode.
摘要翻译：防止包括氧化物半导体材料的鳍式晶体管的电特性的变化，例如阈值电压的负偏移或S值的增加。氧化物半导体膜被夹在多个栅电极之间，其间具有设置在氧化物半导体膜和每个栅电极之间的绝缘膜。具体地，设置第一栅极绝缘膜以覆盖第一栅电极，设置氧化物半导体膜以与第一栅极绝缘膜接触并且延伸超过第一栅电极，设置第二栅极绝缘膜以覆盖在至少设置氧化物半导体膜，第二栅电极与第二栅极绝缘膜的一部分接触并且延伸超过第一栅电极。

75. 发明授权

US09484334B2 Semiconductor device and method of forming directional RF coupler with IPD for additional RF signal processing 有权
公开(公告)号：US09484334B2
公开(公告)日：2016-11-01
申请号：US13716799
申请日：2012-12-17
申请人： STATS ChipPAC, Ltd.
发明人： Robert C. Frye , Kai Liu
IPC分类号： H03H7/42 , H01L27/01 , H01P5/10 , H03H7/48 , H01L21/70 , H05K1/02 , H03H5/00 , H05K1/16
CPC分类号： H01L27/01 , H01L21/70 , H01L2224/16225 , H01L2224/48091 , H01L2224/73265 , H01L2924/13091 , H01L2924/15174 , H01L2924/15311 , H01P5/10 , H03H7/48 , H05K1/0233 , H05K1/0239 , H05K1/0243 , H05K1/025 , H05K1/165 , H05K2201/09245 , Y10T29/49155 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor device has a substrate and RF coupler formed over the substrate. The RF coupler has a first conductive trace with a first end coupled to a first terminal of the semiconductor device, and a second conductive trace with a first end coupled to a second terminal of the semiconductor device. The first conductive trace is placed in proximity to a first portion of the second conductive trace. An integrated passive device is formed over the substrate. A second portion of the second conductive trace operates as a circuit component of the integrated passive device. The integrated passive device can be a balun or low-pass filter. The RF coupler also has a first capacitor coupled to the first terminal of the semiconductor device, and second capacitor coupled to a third terminal of the semiconductor device for higher directivity. The second conductive trace is wound to exhibit an inductive property.

76. 发明申请

US20150236138A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20150236138A1
公开(公告)日：2015-08-20
申请号：US14706304
申请日：2015-05-07
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Atsuo ISOBE
IPC分类号： H01L29/66 , H01L27/12
CPC分类号： H01L29/66969 , H01L21/70 , H01L27/1085 , H01L27/1259 , H01L29/78648 , H01L29/7869 , H01L29/78696
摘要： A variation in electrical characteristics, such as a negative shift of the threshold voltage or an increase in S value, of a fin-type transistor including an oxide semiconductor material is prevented. An oxide semiconductor film is sandwiched between a plurality of gate electrodes with an insulating film provided between the oxide semiconductor film and each of the gate electrodes. Specifically, a first gate insulating film is provided to cover a first gate electrode, an oxide semiconductor film is provided to be in contact with the first gate insulating film and extend beyond the first gate electrode, a second gate insulating film is provided to cover at least the oxide semiconductor film, and a second gate electrode is provided to be in contact with part of the second gate insulating film and extend beyond the first gate electrode.
摘要翻译：防止包括氧化物半导体材料的鳍式晶体管的电特性的变化，例如阈值电压的负偏移或S值的增加。氧化物半导体膜被夹在多个栅电极之间，其间具有设置在氧化物半导体膜和每个栅电极之间的绝缘膜。具体地，设置第一栅极绝缘膜以覆盖第一栅电极，设置氧化物半导体膜以与第一栅极绝缘膜接触并且延伸超过第一栅电极，设置第二栅极绝缘膜以覆盖在至少设置氧化物半导体膜，第二栅电极与第二栅极绝缘膜的一部分接触并且延伸超过第一栅电极。

77. 发明授权

US09027821B2 Process for direct bonding two elements comprising copper portions and portions of dielectric materials 有权
标题翻译：用于直接接合包括铜部分和介电材料部分的两个元件的方法
公开(公告)号：US09027821B2
公开(公告)日：2015-05-12
申请号：US13811498
申请日：2011-07-21
申请人： Lea Di Cioccio , Pierric Gueguen
发明人： Lea Di Cioccio , Pierric Gueguen
IPC分类号： B23K31/00 , B23K31/02 , H01L21/70 , H01L25/00 , H01L27/00 , H01L23/00 , H01L21/20 , H01L23/48 , H01L25/065
CPC分类号： H01L21/70 , H01L21/2007 , H01L23/481 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/08 , H01L24/11 , H01L24/12 , H01L24/80 , H01L24/81 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/05007 , H01L2224/05166 , H01L2224/05181 , H01L2224/05186 , H01L2224/05562 , H01L2224/0557 , H01L2224/05647 , H01L2224/08121 , H01L2224/80357 , H01L2224/80895 , H01L2224/80896 , H01L2224/81894 , H01L2224/83894 , H01L2225/06541 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01046 , H01L2924/0105 , H01L2924/01058 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/04953 , H01L2224/05552
摘要： A process of assembly by direct bonding of a first and second element, each having a surface including copper portions separated by a dielectric material, the process includes: polishing the surfaces such that the surfaces to be assembled allow assembly by bonding; forming a diffusion barrier selectively in copper portions of the first and second elements, wherein the surface of the diffusion barrier of the first and second elements is level with the surface, to within less than 5 nanometers; and bringing the two surfaces into contact, such that the copper portions of one surface cover at least partly the copper portions of the other surface, and such that direct bonding is obtained between the surfaces.
摘要翻译：一种通过直接接合第一和第二元件的方法，每个元件具有包括被电介质材料隔开的铜部分的表面，所述方法包括：抛光表面使得待组装的表面允许通过粘合进行组装; 在第一和第二元件的铜部分中选择性地形成扩散阻挡层，其中第一和第二元件的扩散阻挡层的表面与表面平齐，在小于5纳米之内; 并且使两个表面接触，使得一个表面的铜部分至少部分地覆盖另一个表面的铜部分，并且使得在表面之间获得直接接合。

78. 发明授权

US09024394B2 Controlled transformation of non-transient electronics 有权
标题翻译：非瞬态电子控制变换
公开(公告)号：US09024394B2
公开(公告)日：2015-05-05
申请号：US14283390
申请日：2014-05-21
申请人： Transient Electronics, Inc.
发明人： Christopher Poirier , Anthony Stewart Campbell , Carmichael S. Roberts , John A. Rogers , Winston E. Henderson
IPC分类号： H05B3/06 , B02C23/00 , H05K1/02 , H01L21/70
CPC分类号： H05K1/0275 , B02C23/00 , H01L21/70 , H01L23/04 , H01L23/57 , H01L2924/0002 , H05B3/06 , H05K1/02 , H05K13/00 , H05K2203/178 , Y10T29/49002 , H01L2924/00
摘要： Systems and methods of the invention generally relate to altering the functionality of a non-transient electronic device. A container holding an agent is located proximal to a non-transient electronic device capable of performing at least one function. The agent is capable of rendering the device incapable of performing the at least one function. The container is configured to controllably release the agent to the electronic device in a variety of passive and active eventualities.
摘要翻译：本发明的系统和方法通常涉及改变非瞬态电子设备的功能。容纳代理的容器位于能够执行至少一个功能的非瞬态电子设备的近侧。代理能够使设备不能执行至少一个功能。容器被配置为以各种被动和主动的可能性可控地将代理释放到电子设备。

79. 发明申请

US20150028500A1 FORMING ALIGNMENT MARK AND RESULTING MARK 有权
标题翻译：形成对齐标记和结果标记
公开(公告)号：US20150028500A1
公开(公告)日：2015-01-29
申请号：US13952231
申请日：2013-07-26
申请人： GLOBALFOUNDRIES Inc.
发明人： Guoxiang NING , Soon Yoeng TAN , Seok Yan POH , Paul ACKMANN
IPC分类号： H01L23/544 , H01L21/70
CPC分类号： H01L23/544 , G03F1/42 , G03F7/70633 , G03F7/70683 , G03F9/7076 , H01L21/70 , H01L2223/5442 , H01L2223/54426 , H01L2223/54453 , H01L2924/0002 , H01L2924/00
摘要： Methods for forming an alignment mark and the resulting mark are disclosed. Embodiments may include forming a first shape having rotational symmetry; forming a second shape; and forming an alignment mark by combining the first shape and one or more of the second shape, wherein the alignment mark has rotational symmetry.
摘要翻译：公开了形成对准标记的方法和所得到的标记。实施例可以包括形成具有旋转对称性的第一形状; 形成第二形状; 以及通过组合所述第一形状和所述第二形状中的一个或多个来形成对准标记，其中所述对准标记具有旋转对称性。

80. 发明授权

US08932429B2 Electronic knob for tuning radial etch non-uniformity at VHF frequencies 有权
标题翻译：用于调谐VHF频率的径向蚀刻不均匀的电子旋钮
公开(公告)号：US08932429B2
公开(公告)日：2015-01-13
申请号：US13594768
申请日：2012-08-24
申请人： Zhigang Chen , Eric Hudson
发明人： Zhigang Chen , Eric Hudson
IPC分类号： C23F1/00 , H01L21/306 , C23C16/00
CPC分类号： H01L21/70 , H01J37/32091 , H01J37/32183
摘要： System and methods for plasma processing of a wafer include a chamber with an electrode having a support surface and an outer edge region defined thereon. A radio frequency power is communicated to the electrode via a conductive delivery connection and returned through a conductive return connection. A capacitance is applied to a first end that causes appropriate capacitive adjustment and opposite impedance adjustment at a second end of the conductive delivery connection that is coupled to a dielectric surround structure that surrounds the electrode. The dielectric surround structure presents the opposite impedance adjustment near an outer edge of the electrode, such that increasing the capacitance at the first end causes a corresponding increase of impedance at the second end and a corresponding increase in voltage distribution near the outer edge region of the electrode that decreases toward a center of the support surface of the electrode.
摘要翻译：用于等离子体处理晶片的系统和方法包括具有电极的室，其具有支撑表面和限定在其上的外边缘区域。射频功率通过导电输送连接传送到电极，并通过导电返回连接返回。电容被施加到第一端，其导致适当的电容调整，并且在导电输送连接的第二端处相反阻抗调节，该第二端耦合到围绕电极的电介质环绕结构。电介质环绕结构在电极的外边缘附近呈现相反的阻抗调节，使得增加第一端处的电容导致在第二端处的阻抗相应增加，并且在外部边缘区域附近的电压分布相应增加电极朝向电极的支撑表面的中心减小。

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