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71. 发明授权

US09047214B1 System and method for tolerating a failed page in a flash device 有权
标题翻译：用于容忍闪存设备中的故障页面的系统和方法
公开(公告)号：US09047214B1
公开(公告)日：2015-06-02
申请号：US13477635
申请日：2012-05-22
申请人： Philip L. Northcott
发明人： Philip L. Northcott
IPC分类号： G11C29/00 , G06F11/00 , G06F11/10
CPC分类号： G06F11/108 , G06F11/00 , G06F11/1012 , G06F11/1044 , G06F11/106 , G06F11/1076 , G06F12/0246 , G06F2211/1057 , G06F2212/7209
摘要： Apparatus and methods provide relatively low uncorrectable bit error rates, low write amplification, long life, fast and efficient retrieval, and efficient storage density such that a solid-state drive (SSD) can be implemented using relatively inexpensive MLC Flash for an enterprise storage application. A page is associated with a set of primary ECC codewords, and a page stripe is associated with a set of secondary codewords and primary over secondary parity (PoSP) ECC codewords. Two or more page stripes can form a page grid, wherein the page grid is associated with a group of tertiary ECC codewords, wherein the last page stripe of the page grid has a reduced payload capacity.
摘要翻译：装置和方法提供相对较低的不可校正误码率，低写入放大，长寿命，快速和有效的检索以及有效的存储密度，使得可以使用用于企业存储应用的相对便宜的MLC闪存来实现固态驱动器（SSD）。页面与一组主ECC码字相关联，并且页条带与一组次码字和主二次奇偶校验（PoSP）ECC码字相关联。两个或多个页面条纹可以形成页面网格，其中页面网格与一组三级ECC码字相关联，其中页面网格的最后一页条带具有减小的有效载荷容量。

72. 发明授权

US09037832B2 Method for managing a memory apparatus, and associated memory apparatus thereof 有权
标题翻译：用于管理存储装置的方法及其相关联的存储装置
公开(公告)号：US09037832B2
公开(公告)日：2015-05-19
申请号：US13604644
申请日：2012-09-06
申请人： Tsai-Cheng Lin , Chun-Kun Lee
发明人： Tsai-Cheng Lin , Chun-Kun Lee
IPC分类号： G06F9/34 , G06F12/02
CPC分类号： G06F12/0246 , G06F2212/7207 , G06F2212/7208 , G06F2212/7209
摘要： A method for managing a memory apparatus including at least one non-volatile (NV) memory element includes: providing at least one block of the memory apparatus with at least one local page address linking table within the memory apparatus, wherein the at least one local page address linking table includes linking relationships between at least one physical page address of the at least one block and at least one logical page address; and building a global page address linking table of the memory apparatus according to the at least one local page address linking table.
摘要翻译：一种用于管理包括至少一个非易失性（NV）存储器元件的存储器设备的方法，包括：向所述存储器设备的至少一个块提供所述存储器设备内的至少一个本地页面地址链接表，其中所述至少一个本地页面地址链接表包括至少一个块的至少一个物理页面地址与至少一个逻辑页面地址之间的链接关系; 以及根据所述至少一个本地页面地址链接表构建所述存储装置的全局页面地址链接表。

73. 发明授权

US09037782B2 Method of programming memory cells and reading data, memory controller and memory storage apparatus using the same 有权
标题翻译：编程存储单元和读取数据的方法，存储器控制器和使用其的存储器存储装置
公开(公告)号：US09037782B2
公开(公告)日：2015-05-19
申请号：US13528840
申请日：2012-06-21
申请人： Kian-Fui Seng , Ming-Hui Tseng , Ching-Hsien Wang
发明人： Kian-Fui Seng , Ming-Hui Tseng , Ching-Hsien Wang
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F12/0246 , G06F2212/7201 , G06F2212/7209
摘要： A method of programming memory cells for a rewritable non-volatile memory module is provided. The method includes: receiving a command which indicates performing an update operation to a logical page; and identifying valid logical access addresses and invalid logical access addresses in the logical page according to the command. The method also includes: selecting a physical page; setting flags corresponding to the valid logical access addresses in a valid state, setting flags corresponding to the invalid logical access in an invalid state; programming the flags and data belonging to the valid logical access addresses to the selected physical page based on the update operation; and mapping the selected physical page to the logical page. Accordingly, the method can effectively increase the speed of programming the memory cells.
摘要翻译：提供了一种用于可重写非易失性存储器模块的存储单元的编程方法。该方法包括：接收指示对逻辑页执行更新操作的命令; 并根据该命令在逻辑页面中识别有效的逻辑访问地址和无效的逻辑访问地址。该方法还包括：选择物理页面; 将与有效逻辑访问地址相对应的标志设置为有效状态，将与无效逻辑访问相对应的标志设置为无效状态; 基于更新操作将属于有效逻辑访问地址的标志和数据编程到所选择的物理页面; 并将所选择的物理页面映射到逻辑页面。因此，该方法可以有效地提高对存储器单元的编程速度。

74. 发明申请

US20150127972A1 METHOD AND APPARATUS FOR NON-VOLATILE RAM ERROR RE-MAPPING 有权
标题翻译：非易失性RAM错误重新映射的方法和装置
公开(公告)号：US20150127972A1
公开(公告)日：2015-05-07
申请号：US14070480
申请日：2013-11-01
申请人： QUALCOMM Incorporated
发明人： Dexter CHUN , Jung Pill KIM , Seung KANG , Taehyun KIM
IPC分类号： G06F11/10
CPC分类号： G06F11/1008 , G06F11/076 , G06F11/0766 , G06F11/1048 , G06F11/1068 , G06F12/0246 , G06F2212/7201 , G06F2212/7204 , G06F2212/7209
摘要： A memory module comprising a non-volatile cell array and a re-mapper. A page map table is stored in the non-volatile cell array, and includes mappings of old page addresses to new page addresses. The re-mapper is configured to direct memory operations referencing an old page address to the new page address that the old page address is mapped to. The mappings are created when a memory cell is determined to be in a failure state.
摘要翻译：一种包括非易失性单元阵列和重新映射器的存储器模块。页面映射表存储在非易失性单元阵列中，并且包括旧页地址到新页地址的映射。重映射器被配置为将引用旧页地址的内存操作定向到旧页地址被映射到的新页地址。当确定存储器单元处于故障状态时，创建映射。

75. 发明授权

US09021218B2 Data writing method for writing updated data into rewritable non-volatile memory module, and memory controller, and memory storage apparatus using the same 有权
标题翻译：用于将更新的数据写入可重写非易失性存储器模块的数据写入方法，以及存储器控制器，以及使用其的存储器存储装置
公开(公告)号：US09021218B2
公开(公告)日：2015-04-28
申请号：US14151841
申请日：2014-01-10
申请人： Phison Electronics Corp.
发明人： Chih-Kang Yeh
IPC分类号： G06F13/00 , G06F12/02 , G06F12/04
CPC分类号： G06F12/0246 , G06F12/04 , G06F2212/7209
摘要： A method for writing updated data into a flash memory module having a plurality of physical pages is provided, wherein each physical page is the smallest writing unit of the flash memory module. The method includes partitioning a physical page into storage segments and configuring a state mark for each storage segment, wherein the state marks indicate the validity of data stored in the storage segments. The method also includes writing the updated data into at least one of the storage segments and changing the state mark corresponding to the storage segment containing the updated data, wherein the state mark corresponding to the storage segment containing the updated data indicates a valid state, and the state marks corresponding to the other storage segments of the physical page not containing the updated data indicate an invalid state. Thereby, the time for writing data into a physical page is effectively shortened.
摘要翻译：提供了一种用于将更新的数据写入具有多个物理页面的闪存模块的方法，其中每个物理页面是闪存模块的最小写入单元。该方法包括将物理页面划分为存储段并为每个存储段配置状态标记，其中状态标记指示存储在存储段中的数据的有效性。该方法还包括将更新后的数据写入至少一个存储段并改变对应于包含更新数据的存储段的状态标记，其中对应于包含更新数据的存储段的状态标记表示有效状态，以及对应于不包含更新数据的物理页面的其他存储段的状态标记表示无效状态。从而有效地缩短将数据写入物理页面的时间。

76. 发明申请

US20150032949A1 Semiconductor Device and Method of Controlling Non-Volatile Memory Device 审中-公开
公开(公告)号：US20150032949A1
公开(公告)日：2015-01-29
申请号：US14514178
申请日：2014-10-14
申请人： Hitachi, Ltd.
发明人： Seiji Miura
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F2212/7201 , G06F2212/7202 , G06F2212/7209 , G06F2212/7211 , G11C13/0004
摘要： A control circuit of a semiconductor device (memory module) realizes long life and others by a mechanism that suppresses and smoothes variations in use of a memory by equalizing the sizes of data write and data erase with respect to a data write request and sequentially allocating and using addresses of the memory in data write to an overwritable non-volatile memory device without carrying out an overwriting operation even in the case of an overwrite request. The control circuit realizes data write by a set of two types of operations of (a) an operation of erasing data of a first address or an operation of setting a flag value to an invalid state and (b) an operation of writing data to a second address different from the first address or an operation of setting a flag value to a valid state.

77. 发明申请

US20150012685A1 Write Operations for Defect Management in Nonvolatile Memory 有权
标题翻译：非易失性存储器中缺陷管理的写操作
公开(公告)号：US20150012685A1
公开(公告)日：2015-01-08
申请号：US13934013
申请日：2013-07-02
申请人： SanDisk Technologies Inc.
发明人： Chris Nga-Yee Avila , Gautam Ashok Dusija , Jian Chen , Mrinal Kochar , Abhijeet Manohar
IPC分类号： G06F12/02
CPC分类号： G06F11/1072 , G06F12/0246 , G06F2212/7209 , G11C11/5628 , G11C16/3418 , G11C29/52 , G11C2029/0411 , G11C2211/5641
摘要： Data that is stored in a higher error rate format in a nonvolatile memory is backed up in a lower error rate format. Data to be stored may be transferred once to on-chip data latches where it is maintained while it is programmed in both the high error rate format and the low error rate format without being resent to the nonvolatile memory.
摘要翻译：在非易失性存储器中以较高错误率格式存储的数据以较低的错误率格式进行备份。要被存储的数据可以被传送到片上数据锁存器，其中它被维护，同时以高错误率格式和低错误率格式被编程，而不重新发送到非易失性存储器。

78. 发明申请

US20140325242A1 ENCRYPT DATA OF STORAGE DEVICE 有权
标题翻译：加密存储设备的数据
公开(公告)号：US20140325242A1
公开(公告)日：2014-10-30
申请号：US13870820
申请日：2013-04-25
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
发明人： Mark J. Thompson
IPC分类号： G06F12/14
CPC分类号： G06F12/1408 , G06F3/0619 , G06F3/0623 , G06F3/0655 , G06F3/0679 , G06F12/0246 , G06F21/78 , G06F2212/1052 , G06F2212/7201 , G06F2212/7209
摘要： A request from a host is received requesting data from a storage device. Data of the storage device is written into a buffer of the host. The data at the buffer is to be encrypted and written back to the storage device. The requested data of the request is written to the buffer after the encrypted data is written back to the storage device.
摘要翻译：接收到来自主机的请求，请求来自存储设备的数据。将存储设备的数据写入主机的缓冲区。缓冲区中的数据将被加密并写回存储设备。在将加密数据写回到存储设备之后，请求的请求数据被写入缓冲器。

79. 发明申请

US20140289588A1 MEMORY SYSTEM 有权
标题翻译：记忆系统
公开(公告)号：US20140289588A1
公开(公告)日：2014-09-25
申请号：US14296001
申请日：2014-06-04
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Yasushi NAGADOMI , Daisaburo Takashima , Kosuke Hatsuda
IPC分类号： G06F11/10 , G06F12/02
CPC分类号： G06F11/1016 , G06F12/0246 , G06F2212/7203 , G06F2212/7209 , G11C16/102
摘要： A memory system (10) is disclosed, which comprises a flash-EEPROM nonvolatile memory (11) having a plurality of memory cells that have floating gates and in which data items are electrically erasable and writable, a cache memory (13) that temporarily stores data of the flash-EEPROM nonvolatile memory (11), a control circuit (12, 14) that controls the flash-EEPROM nonvolatile memory (11) and the cache memory (13), and an interface circuit (16) that communicates with a host, in which the control circuit functions to read data from a desired target area to-be-determined of the flash-EEPROM nonvolatile memory and detect an erased area to determine a written area/unwritten area by using as a determination condition whether or not a count number of data “0” of the read data has reached a preset criterion count number.
摘要翻译：一种存储系统（10），其包括具有多个存储单元的闪存EEPROM非易失性存储器（11），所述多个存储器单元具有浮动栅极，并且其中数据项是电可擦除和可写的;高速缓冲存储器（13），其临时存储闪存EEPROM非易失性存储器（11）的数据，控制闪存EEPROM非易失性存储器（11）和高速缓存存储器（13）的控制电路（12,14）以及与主机，其中控制电路用于从要被确定的闪存EEPROM非易失性存储器的期望目标区域读取数据，并且通过使用作为确定条件来检测擦除区域以确定写入区域/未写入区域读取数据的数据“0”的计数数已经达到预设的标准计数。

80. 发明申请

US20140258587A1 SELF RECOVERY IN A SOLID STATE DRIVE 有权
标题翻译：在固态驱动中自恢复
公开(公告)号：US20140258587A1
公开(公告)日：2014-09-11
申请号：US13796264
申请日：2013-03-12
申请人： LSI CORPORATION
发明人： Leonid Baryudin , Earl T. Cohen , Alex G. Tang
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F2212/7201 , G06F2212/7209
摘要： An apparatus having a nonvolatile memory and a controller. The memory stores information in multiple pages. The information includes data units and headers. Each data unit is associated with a respective identifier in an address space of the apparatus and a respective location in the memory, has a respective header having the respective identifier, and is associated with a respective time stamp. Multiple headers include ones of the time stamps. The controller is configured to (i) read information stored in the pages, (ii) determine an order in which the data units were written based on the time stamps, (iii) locate based on the order (a) each last-written occurrence of the respective identifiers and (b) the respective locations of the data units associated with the last-written occurrences, and (iv) rebuild a map of the controller according to the respective locations of each last-written occurrence of each respective identifier.
摘要翻译：一种具有非易失性存储器和控制器的装置。内存将信息存储在多个页面中。信息包括数据单元和标题。每个数据单元与设备的地址空间中的相应标识符相关联，并且存储器中的相应位置具有相应标题，并且与相应的时间戳相关联。多个标题包括时间戳中的一个。控制器被配置为（i）读取存储在页面中的信息，（ii）基于时间戳确定写入数据单元的顺序，（iii）基于顺序（a）每个最后写入的事件和（b）与最后写入的事件相关联的数据单元的相应位置，以及（iv）根据每个相应标识符的每个最后写入的发生的相应位置来重建控制器的映射。

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