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71. 发明申请

US20050087821A1 Aluminum nitride and aluminum oxide/aluminum nitride heterostructure gate dielectric stack based field effect transistors and method for forming same 失效
标题翻译：氮化铝和氧化铝/氮化铝异质结构栅极电介质堆叠的场效应晶体管及其形成方法
公开(公告)号：US20050087821A1
公开(公告)日：2005-04-28
申请号：US10976068
申请日：2004-10-29
申请人： Nestor Bojarczuk , Eduard Cartier , Supratik Guha , Lars-Ake Ragnarsson
发明人： Nestor Bojarczuk , Eduard Cartier , Supratik Guha , Lars-Ake Ragnarsson
IPC分类号： H01L29/78 , H01L21/28 , H01L21/316 , H01L21/318 , H01L29/51 , H01L29/772
CPC分类号： H01L21/28202 , H01L21/28194 , H01L29/513 , H01L29/517 , H01L29/518
摘要： A structure (e.g., field effect transistor) and a method for making the structure, include a substrate having a source region, a drain region, and a channel region therebetween, an insulating layer disposed over the channel region, the insulating layer including a layer including aluminum nitride disposed over the channel region, and a gate electrode disposed over the insulating layer.
摘要翻译：一种结构（例如场效应晶体管）和一种制造该结构的方法包括：具有源极区，漏极区和沟道区的衬底，设置在沟道区上方的绝缘层，绝缘层包括层包括设置在沟道区域上的氮化铝，以及设置在绝缘层上的栅电极。

72. 发明授权

US5879962A III-V/II-VI Semiconductor interface fabrication method 失效
标题翻译： III-V / II-VI半导体接口制造方法
公开(公告)号：US5879962A
公开(公告)日：1999-03-09
申请号：US571607
申请日：1995-12-13
申请人： James M. DePuydt , Michael A. Haase , Kwok-Keung Law , Thomas J. Miller , James M. Gaines , Supratik Guha , Bor-Jen Wu
发明人： James M. DePuydt , Michael A. Haase , Kwok-Keung Law , Thomas J. Miller , James M. Gaines , Supratik Guha , Bor-Jen Wu
IPC分类号： H01L21/363 , H01L21/443 , H01L33/00 , H01S5/00 , H01S5/347 , H01L21/00
CPC分类号： H01L33/0087 , H01L21/02395 , H01L21/02463 , H01L21/02477 , H01L21/02502 , H01L21/02557 , H01L21/0256 , H01L21/02576 , H01L21/02579 , H01L21/02631 , H01L21/02661 , H01L21/443
摘要： A method for repeatably fabricating GaAs/ZnSe and other III-V/II-VI semiconductor interfaces with relatively low stacking fault densities in II-VI semiconductor devices such as laser diodes. The method includes providing a molecular beam epitaxy (MBE) system including at least a group III element source, a group II element source, a group V element source and a group VI element source. A semiconductor substrate having a III-V semiconductor surface on which the interface is to be fabricated is positioned within the MBE system. The substrate is then heated to a temperature suitable for III-V semiconductor growth, and a crystalline III-V semiconductor buffer layer grown on the III-V surface of the substrate. The temperature of the semiconductor substrate is then adjusted to a temperature suitable for II-VI semiconductor growth, and a crystalline II-VI semiconductor buffer layer grown on the III-V buffer layer by alternating beam epitaxy. The group II and group VI sources are operated to expose the III-V buffer layer to a group II element flux before exposing the III-V buffer layer to a group VI element flux.
摘要翻译：一种用于在II-VI半导体器件（例如激光二极管）中重复制造GaAs / ZnSe和其他具有相对较低堆垛层错密度的III-V / II-VI半导体界面的方法。该方法包括提供包括至少III族元素源，II族元素源，V族元素源和VI族元素源的分子束外延（MBE）系统。具有要在其上制造界面的III-V半导体表面的半导体衬底位于MBE系统内。然后将衬底加热到适于III-V半导体生长的温度，以及在衬底的III-V表面上生长的晶体III-V半导体缓冲层。然后将半导体衬底的温度调节到适合于II-VI半导体生长的温度，以及通过交替射束外延在III-V缓冲层上生长的晶体II-VI半导体缓冲层。在将III-V缓冲层暴露于VI族元素通量之前，组II和VI族源被操作以将III-V缓冲层暴露于II族元素通量。

73. 发明授权

US09496140B2 Silicon wafer based structure for heterostructure solar cells 有权
标题翻译：基于硅晶片的异质结构太阳能电池结构
公开(公告)号：US09496140B2
公开(公告)日：2016-11-15
申请号：US13372974
申请日：2012-02-14
申请人： Supratik Guha , Harold J. Hovel
发明人： Supratik Guha , Harold J. Hovel
IPC分类号： H01L21/02 , H01L31/0687 , H01L31/18 , H01L31/0304 , H01L31/0693
CPC分类号： H01L21/02642 , H01L21/02381 , H01L21/0245 , H01L21/0251 , H01L21/02532 , H01L21/02647 , H01L21/02667 , H01L31/0687 , H01L31/1852 , H01L31/1872 , H01L31/1892 , Y02E10/544 , Y02P70/521
摘要： A multi-junction photovoltaic device includes a silicon substrate and a dielectric layer formed on the silicon substrate. A germanium layer is formed on the dielectric layer. The germanium includes a crystalline structure that is substantially similar to the crystalline structure of the silicon substrate. A first photovoltaic sub-cell includes a first plurality of doped semiconductor layers formed on the germanium layer. At least a second photovoltaic sub-cell includes a second plurality of doped semiconductor layers formed on the first photovoltaic sub-cell that is on the germanium layer that is on the dielectric layer.
摘要翻译：多结光伏器件包括硅衬底和形成在硅衬底上的电介质层。在电介质层上形成锗层。锗包括基本上类似于硅衬底的晶体结构的晶体结构。第一光伏子电池包括形成在锗层上的第一多个掺杂半导体层。至少第二光伏子电池包括形成在位于电介质层上的锗层上的第一光伏子电池上的第二多个掺杂半导体层。

74. 发明授权

US09157657B2 Method of cooling a solar concentrator 有权
标题翻译：冷却太阳能集热器的方法
公开(公告)号：US09157657B2
公开(公告)日：2015-10-13
申请号：US13600482
申请日：2012-08-31
申请人： Supratik Guha , Yves C. Martin , Robert L. Sandstrom , Theodore G. van Kessel
发明人： Supratik Guha , Yves C. Martin , Robert L. Sandstrom , Theodore G. van Kessel
IPC分类号： F24J2/08 , F28D15/02 , F28D15/04 , H01L31/052 , H01L31/054 , F24J2/52
CPC分类号： F24S23/31 , F24S2025/011 , F28D15/0233 , F28D15/046 , H01L31/052 , H01L31/0521 , H01L31/0543 , Y02E10/43 , Y02E10/52
摘要： A method of cooling a solar concentrator includes absorbing heat from solar energy collectors into a chamber section. The chamber section is arranged below, in a heat exchange relationship, the solar energy collectors.
摘要翻译：一种冷却太阳能聚光器的方法包括将太阳能收集器的热量吸收到室部分中。室部分以热交换关系布置在太阳能收集器的下方。

75. 发明授权

US08669466B2 Grid-line-free contact for a photovoltaic cell 有权
标题翻译：光伏电池的无栅极接触
公开(公告)号：US08669466B2
公开(公告)日：2014-03-11
申请号：US13364171
申请日：2012-02-01
申请人： Supratik Guha , Yves Martin , Naim Moumen , Robert L. Sandstrom , Theodore G. van Kessel
发明人： Supratik Guha , Yves Martin , Naim Moumen , Robert L. Sandstrom , Theodore G. van Kessel
IPC分类号： H01L31/18 , H01L31/02
CPC分类号： H01L31/1804 , H01L31/02245 , H01L31/0682 , Y02E10/547 , Y02P70/521
摘要： Electrical contact to the front side of a photovoltaic cell is provided by an array of conductive through-substrate vias, and optionally, an array of conductive blocks located on the front side of the photovoltaic cell. A dielectric liner provides electrical isolation of each conductive through-substrate via from the semiconductor material of the photovoltaic cell. A dielectric layer on the backside of the photovoltaic cell is patterned to cover a contiguous region including all of the conductive through-substrate vias, while exposing a portion of the backside of the photovoltaic cell. A conductive material layer is deposited on the back surface of the photovoltaic cell, and is patterned to form a first conductive wiring structure that electrically connects the conductive through-substrate vias and a second conductive wiring structure that provides electrical connection to the backside of the photovoltaic cell.
摘要翻译：与光伏电池正面的电接触由导电贯穿衬底通孔的阵列以及可选地位于光伏电池正面的导电块的阵列提供。电介质衬垫提供每个导电贯穿衬底通孔与光伏电池的半导体材料的电隔离。在光伏电池的背面上的电介质层被图案化以覆盖包括所有导电贯穿衬底通孔的连续区域，同时暴露光伏电池的背面的一部分。导电材料层沉积在光伏电池的背表面上，并被图案化以形成第一导电布线结构，其电连接导电贯穿衬底通孔和第二导电布线结构，该第二导电布线结构提供与光伏背面的电连接细胞。

76. 发明申请

US20140034118A1 THIN FILM SOLAR CELLS 有权
标题翻译：薄膜太阳能电池
公开(公告)号：US20140034118A1
公开(公告)日：2014-02-06
申请号：US13567407
申请日：2012-08-06
申请人： Nestor A. Bojarczuk , Keith E. Fogel , Supratik Guha , Byungha Shin
发明人： Nestor A. Bojarczuk , Keith E. Fogel , Supratik Guha , Byungha Shin
IPC分类号： H01L31/076
CPC分类号： H01L31/0326 , H01L31/022466 , H01L31/022475 , H01L31/022483 , H01L31/0392 , H01L31/03925 , H01L31/03926 , H01L31/072 , H01L31/073 , H01L31/1896 , Y02E10/50 , Y02E10/543 , Y02P70/521
摘要： Embodiments relate to a solar cell apparatus including a molybdenum (Mo) contact layer and an annealed absorber layer including zinc and sulfur directly adjacent to the Mo contact layer. The apparatus has no molybdenum disulfide (MoS2) layer located between the Mo contact layer and the annealed absorber layer. The apparatus further includes a buffer layer adjacent to the annealed absorber layer.
摘要翻译：实施例涉及包括钼（Mo）接触层和包含与Mo接触层直接相邻的锌和硫的退火吸收体层的太阳能电池装置。该装置在Mo接触层和退火的吸收层之间没有二硫化钼（MoS2）层。该装置还包括与退火的吸收层相邻的缓冲层。

77. 发明授权

US08637361B2 Semiconductor nanostructures, semiconductor devices, and methods of making same 有权
公开(公告)号：US08637361B2
公开(公告)日：2014-01-28
申请号：US13041740
申请日：2011-03-07
申请人： Joerg Appenzeller , Supratik Guha , Emanuel Tutuc
发明人： Joerg Appenzeller , Supratik Guha , Emanuel Tutuc
IPC分类号： H01L21/336
CPC分类号： H01L21/30604 , B82Y10/00 , H01L21/02603 , H01L29/0665 , H01L29/0673 , H01L29/068 , H01L29/1041 , H01L29/125 , H01L29/42392 , H01L29/66439 , H01L29/78696
摘要： A semiconductor structure is provided, which includes multiple sections arranged along a longitudinal axis. Preferably, the semiconductor structure comprises a middle section and two terminal sections located at opposite ends of the middle section. A semiconductor core having a first dopant concentration preferably extends along the longitudinal axis through the middle section and the two terminal sections. A semiconductor shell having a second, higher dopant concentration preferably encircles a portion of the semiconductor core at the two terminal sections, but not at the middle section, of the semiconductor structure. It is particularly preferred that the semiconductor structure is a nanostructure having a cross-sectional dimension of not more than 100 nm.

78. 发明授权

US08617915B2 Annealing thin films 有权
标题翻译：退火薄膜
公开(公告)号：US08617915B2
公开(公告)日：2013-12-31
申请号：US13153381
申请日：2011-06-03
申请人： Supratik Guha , David B. Mitzi , Teodor K. Todorov , Kejia Wang
发明人： Supratik Guha , David B. Mitzi , Teodor K. Todorov , Kejia Wang
IPC分类号： H01L21/00
CPC分类号： H01L21/02491 , H01L21/02422 , H01L21/02568 , H01L21/02614 , H01L31/0326 , H01L31/1864 , Y02E10/50 , Y02P70/521
摘要： In an annealing process, a Kesterite film is provided on a substrate. The Kesterite film and the substrate are generally planar, have an interface, and have a substrate exterior side and a Kesterite exterior side. An additional step includes locating the cap adjacent the Kesterite exterior side. A further step includes applying sufficient heat to the Kesterite film and the substrate for a sufficient time to anneal the Kesterite film. The annealing is carried out with the cap adjacent the Kesterite exterior side. In another aspect, the film is not limited to Kesterite, and the cap is employed without any precursor layer thereon. Solar cell manufacturing techniques employing the annealing techniques are also disclosed.
摘要翻译：在退火工艺中，在基材上提供Kesterite薄膜。 Kesterite膜和基材通常是平面的，具有界面，并且具有基材外侧和Kesterite外侧。另外的步骤包括将盖子定位在Kesterite外侧附近。另外的步骤包括向Kesterite薄膜和基底施加足够的时间以使Kesterite薄膜退火足够的时间。退火是在与Kesterite外侧相邻的盖上进行的。另一方面，该膜不限于Kesterite，并且在其上没有任何前体层的情况下使用该盖。还公开了采用退火技术的太阳能电池制造技术。

79. 发明授权

US08592675B2 Photovoltaic devices with enhanced efficiencies using high-aspect-ratio nanostructures 有权
标题翻译：使用高纵横比纳米结构提高效率的光伏器件
公开(公告)号：US08592675B2
公开(公告)日：2013-11-26
申请号：US12039900
申请日：2008-02-29
申请人： Supratik Guha , Oki Gunawan
发明人： Supratik Guha , Oki Gunawan
IPC分类号： H01L31/0236
CPC分类号： H01L31/035227 , H01L31/022425 , H01L31/03529 , H01L31/07 , H01L31/18 , Y02E10/50
摘要： Photovoltaic devices and techniques for enhancing efficiency thereof are provided. In one aspect, a photovoltaic device is provided. The photovoltaic device comprises a photocell having a first photoactive layer and a second photoactive layer adjacent to the first photoactive layer so as to form a heterojunction between the first photoactive layer and the second photoactive layer; and a plurality of high-aspect-ratio nanostructures on one or more surfaces of the second photoactive layer. The plurality of high-aspect-ratio nanostructures are configured to act as a scattering media for incident light. The plurality of high-aspect-ratio nanostructures can also be configured to create an optical resonance effect in the incident light.
摘要翻译：提供了用于提高效率的光伏器件和技术。一方面，提供一种光电器件。光电器件包括具有第一光活性层的光电池和与第一光活性层相邻的第二光活性层，以在第一光活性层和第二光活性层之间形成异质结; 以及在所述第二光敏层的一个或多个表面上的多个高纵横比纳米结构。多个高纵横比纳米结构被配置为用作入射光的散射介质。多个高纵横比纳米结构也可以被配置为在入射光中产生光学共振效应。

80. 发明授权

US08518766B2 Method of forming switching device having a molybdenum oxynitride metal gate 有权
标题翻译：形成具有氮氧化钼金属栅极的开关器件的方法
公开(公告)号：US08518766B2
公开(公告)日：2013-08-27
申请号：US13536366
申请日：2012-06-28
申请人： Nestor A. Bojarczuk , Michael P. Chudzik , Matthew W. Copel , Supratik Guha , Richard A. Haight , Vijay Narayanan , Martin P. O'Boyle , Vamsi K. Paruchuri
发明人： Nestor A. Bojarczuk , Michael P. Chudzik , Matthew W. Copel , Supratik Guha , Richard A. Haight , Vijay Narayanan , Martin P. O'Boyle , Vamsi K. Paruchuri
IPC分类号： H01L21/336 , H01L21/8234 , H01L21/3205 , H01L21/4763 , H01L21/70
CPC分类号： H01L21/28088 , H01L29/4966 , H01L29/51
摘要： A field effect transistor (FET) includes a body region and a source region disposed at least partially in the body region. The FET also includes a drain region disposed at least partially in the body region and a molybdenum oxynitride (MoNO) gate. The FET also includes a dielectric having a high dielectric constant (k) disposed between the body region and the MoNO gate.
摘要翻译：场效应晶体管（FET）包括至少部分地设置在身体区域中的体区和源区。 FET还包括至少部分地设置在体区中的漏极区域和氮氧化钼（MoNO）栅极。 FET还包括具有高介电常数（k）的电介质，其布置在体区和MoNO门之间。

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