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71. 发明申请

US20120121455A1 Low lead ingot 审中-公开
标题翻译：低铅锭
公开(公告)号：US20120121455A1
公开(公告)日：2012-05-17
申请号：US13317785
申请日：2011-10-28
申请人： Michael Murray , Mahi Sahoo
发明人： Michael Murray , Mahi Sahoo
IPC分类号： C22C9/04 , C22C1/02
CPC分类号： C22C1/02 , C21C7/0006 , C22C9/02 , C22C9/04 , C22F1/08
摘要： A composition for a low lead ingot comprising primarily copper and including tin, zinc, sulfur, phosphorus, nickel. The composition may contain manganese. The low lead ingot, when solidified, includes sulfur or sulfur containing compounds such as sulfides distributed through the ingot. The presence and a substantially uniform distribution of these sulfur compounds imparts improved machinability and better mechanical properties.
摘要翻译：用于低铅锭的组合物，其主要包括铜并包括锡，锌，硫，磷，镍。组合物可含有锰。低铅锭在固化时包括硫或硫化合物，例如分布在锭中的硫化物。这些硫化合物的存在和基本均匀的分布赋予了改善的机械加工性和更好的机械性能。

72. 发明申请

US20110296261A1 APPARATUS, METHODS, AND SYSTEM OF NAND DEFECT MANAGEMENT 有权
标题翻译： NAND缺陷管理的设备，方法和系统
公开(公告)号：US20110296261A1
公开(公告)日：2011-12-01
申请号：US13194212
申请日：2011-07-29
申请人： Michael Murray
发明人： Michael Murray
IPC分类号： G06F11/07 , G06F12/06
CPC分类号： G11C29/04 , G06F12/0246 , G06F2212/7201 , G11C29/08 , G11C29/76
摘要： Various embodiments comprise apparatus, methods, and systems including method comprising searching for a group address among a plurality of group addresses in a mapping table, and if a match is found, performing a memory operation on a first plurality of memory blocks indicated by the mapping table, and if a match is not found, performing a memory operation on a second plurality of memory blocks, the second plurality of memory blocks having the group address.
摘要翻译：各种实施例包括装置，方法和系统，包括在映射表中搜索多个组地址之中的组地址的方法，并且如果找到匹配，则对由映射指示的第一多个存储块执行存储器操作表，并且如果没有找到匹配，则对第二多个存储块执行存储器操作，所述第二多个存储块具有组地址。

73. 发明授权

US07953954B2 Flash storage partial page caching 有权
标题翻译： Flash存储部分页面缓存
公开(公告)号：US07953954B2
公开(公告)日：2011-05-31
申请号：US11698456
申请日：2007-01-26
申请人： Viet Ly , Michael Murray
发明人： Viet Ly , Michael Murray
IPC分类号： G06F12/08
CPC分类号： G11C16/0483 , G06F12/0246 , G06F2212/7203 , G11C11/5628 , G11C16/10
摘要： Methods and apparatus may operate to receive allocation requests from a processor configured to manage memory comprising a non-volatile memory device configurable as a plurality of blocks comprising a plurality of sectors, assign partial page blocks from the plurality of blocks for memory storage, fill some of the sectors by storing data bits associated with the allocation request in the at least one of the plurality of sectors, determine that the sectors are full, assigning a full page block from the plurality of blocks, and transfer the data bits associated with the allocation request from the partial page blocks to the full page block. Other apparatus, systems, and methods are disclosed.
摘要翻译：方法和装置可以操作以从配置成管理存储器的处理器接收分配请求，该存储器包括可配置为包括多个扇区的多个块的非易失性存储器件，从多个块中分配部分页块用于存储器存储，填充一些通过将与分配请求相关联的数据位存储在多个扇区中的至少一个扇区中，确定扇区是满的，从多个块分配全页块，并传送与分配相关联的数据位从部分页面块到全页块的请求。公开了其他装置，系统和方法。

74. 发明授权

US07944748B2 Erase block data splitting 有权
标题翻译：擦除块数据分割
公开(公告)号：US07944748B2
公开(公告)日：2011-05-17
申请号：US12470183
申请日：2009-05-21
申请人： David Eggleston , Anthony Moschopoulos , Michael Murray , Brady Keays
发明人： David Eggleston , Anthony Moschopoulos , Michael Murray , Brady Keays
IPC分类号： G11C16/04
CPC分类号： G06F11/1008 , G06F11/1068 , G11C16/16
摘要： A Flash memory device, system, and data handling routine is detailed with a distributed erase block sector user/overhead data scheme that splits the user data and overhead data and stores them in differing associated erase blocks. The erase blocks of the Flash memory are arranged into associated erase block pairs in “super blocks” such that when user data is written to/read from the user data area of a sector of an erase block of the super block pair, the overhead data is written to/read from the overhead data area of a sector of the other associated erase block. This data splitting enhances fault tolerance and reliability of the Flash memory device.
摘要翻译：使用分布式擦除块扇区用户/开销数据方案详细描述了闪存设备，系统和数据处理例程，其分割用户数据和开销数据并将它们存储在不同的相关联的擦除块中。闪速存储器的擦除块被布置成“超级块”中的相关联的擦除块对，使得当用户数据被写入/读取超块对的擦除块的扇区的用户数据区时，开销数据被写入到/从另一个相关联的擦除块的扇区的开销数据区读取。这种数据分割增强了闪存设备的容错能力和可靠性。

75. 发明授权

US07783532B2 E-couponing 有权
标题翻译：电子优惠券
公开(公告)号：US07783532B2
公开(公告)日：2010-08-24
申请号：US11750064
申请日：2007-05-17
申请人： Michael Shing-Chung Hsu , Michael Murray
发明人： Michael Shing-Chung Hsu , Michael Murray
IPC分类号： G06F176/60
CPC分类号： G06Q30/0225 , G06Q10/087 , G06Q20/045 , G06Q20/227 , G06Q20/32 , G06Q20/387 , G06Q30/02 , G06Q30/0208 , G06Q30/0214 , G06Q30/0221 , G06Q30/0229 , G06Q30/0234 , G06Q30/0236 , G06Q30/0238 , G06Q30/06 , G07F17/42
摘要： Handling electronic coupons includes accessing information indicating association of an electronic coupon with an account of a user that identifies multiple retail entities associated with the user. Information indicating association of electronic coupons with the user's account may be transmitted to respective computer systems associated with the multiple retail entities. The computer systems may associate electronic coupons with the user such that the user may redeem the electronic coupons at a retail store upon presentation of a user identifier. When the user redeems an electronic coupon, cancellation information for the electronic coupon may be transmitted to the computer systems of other retail entities associated with the user. Receipt of the cancellation information may cause the respective computer systems to cancel the redeemability of the electronic coupon such that the user is prevented from redeeming the electronic coupon at a retail store associated with the corresponding retail entity.
摘要翻译：处理电子优惠券包括访问指示电子优惠券与识别与用户相关联的多个零售实体的用户的帐户的关联的信息。指示电子优惠券与用户帐户的关联的信息可以被发送到与多个零售实体相关联的相应的计算机系统。计算机系统可以将电子优惠券与用户相关联，使得用户可以在呈现用户标识符时在零售商店兑换电子优惠券。当用户兑换电子优惠券时，电子优惠券的取消信息可以被发送到与用户相关联的其他零售实体的计算机系统。接收取消信息可能导致相应的计算机系统取消电子优惠券的可兑换性，使得用户被阻止在与相应的零售实体相关联的零售商店兑换电子优惠券。

76. 发明申请

US20090225606A1 ERASE BLOCK DATA SPLITTING 有权
标题翻译：擦除数据分割
公开(公告)号：US20090225606A1
公开(公告)日：2009-09-10
申请号：US12470183
申请日：2009-05-21
申请人： David Eggleston , Anthony Moschopoulos , Michael Murray , Brady Keays
发明人： David Eggleston , Anthony Moschopoulos , Michael Murray , Brady Keays
IPC分类号： G11C16/16
CPC分类号： G06F11/1008 , G06F11/1068 , G11C16/16
摘要： A Flash memory device, system, and data handling routine is detailed with a distributed erase block sector user/overhead data scheme that splits the user data and overhead data and stores them in differing associated erase blocks. The erase blocks of the Flash memory are arranged into associated erase block pairs in “super blocks” such that when user data is written to/read from the user data area of a sector of an erase block of the super block pair, the overhead data is written to/read from the overhead data area of a sector of the other associated erase block. This data splitting enhances fault tolerance and reliability of the Flash memory device.
摘要翻译：使用分布式擦除块扇区用户/开销数据方案详细描述了闪存设备，系统和数据处理例程，其分割用户数据和开销数据并将它们存储在不同的相关联的擦除块中。闪速存储器的擦除块被布置成“超级块”中的相关联的擦除块对，使得当用户数据被写入/读取超块对的擦除块的扇区的用户数据区时，开销数据被写入到/从另一个相关联的擦除块的扇区的开销数据区读取。这种数据分割增强了闪存设备的容错能力和可靠性。

77. 发明申请

US20080137462A1 TWO-BIT PER I/O LINE WRITE DATA BUS FOR DDR1 AND DDR2 OPERATING MODES IN A DRAM 审中-公开
标题翻译：用于DRAM中DDR1和DDR2操作模式的I / O线写入数据总线的两位
公开(公告)号：US20080137462A1
公开(公告)日：2008-06-12
申请号：US12020352
申请日：2008-01-25
申请人： Jon Allan Faue , Steve Eaton , Michael Murray
发明人： Jon Allan Faue , Steve Eaton , Michael Murray
IPC分类号： G11C7/00
CPC分类号： G11C7/1078 , G11C7/1072 , G11C7/1093 , G11C7/1096
摘要： A data bus circuit for an integrated circuit memory includes a 4-bit bus per I/O pad that is used to connect the memory with an I/O block, but only two bits per I/O are utilized for writing. Four bits per I/O pad are used for reading. At every falling edge of an input data strobe, the last two bits are transmitted over the bus, which eliminates the need for the precise counting of input data strobe pulses. The data bus circuit is compatible with both DDR1 and DDR2 operating modes.
摘要翻译：用于集成电路存储器的数据总线电路包括用于将存储器与I / O块连接的每个I / O焊盘的4位总线，但每个I / O仅使用两位用于写入。使用四位每个I / O焊盘进行读取。在输入数据选通的每个下降沿，最后两位通过总线发送，这样就不需要精确计数输入数据选通脉冲。数据总线电路兼容DDR1和DDR2工作模式。

78. 发明授权

US07349289B2 Two-bit per I/O line write data bus for DDR1 and DDR2 operating modes in a DRAM 有权
标题翻译：在DRAM中为DDR1和DDR2工作模式写入数据总线的两位I / O线
公开(公告)号：US07349289B2
公开(公告)日：2008-03-25
申请号：US11177537
申请日：2005-07-08
申请人： Jon Allan Faue , Steve Eaton , Michael Murray
发明人： Jon Allan Faue , Steve Eaton , Michael Murray
IPC分类号： G11C7/22 , G11C7/10 , G11C11/4093 , G11C11/4096
CPC分类号： G11C7/1078 , G11C7/1072 , G11C7/1093 , G11C7/1096
摘要： A data bus circuit for an integrated circuit memory includes a 4-bit bus per I/O pad that is used to connect the memory with an I/O block, but only two bits per I/O are utilized for writing. Four bits per I/O pad are used for reading. At every falling edge of an input data strobe, the last two bits are transmitted over the bus, which eliminates the need for the precise counting of input data strobe pulses. The data bus circuit is compatible with both DDR1 and DDR2 operating modes.
摘要翻译：用于集成电路存储器的数据总线电路包括用于将存储器与I / O块连接的每个I / O焊盘的4位总线，但每个I / O仅使用两位用于写入。使用四位每个I / O焊盘进行读取。在输入数据选通的每个下降沿，最后两位通过总线发送，这样就不需要精确计数输入数据选通脉冲。数据总线电路兼容DDR1和DDR2工作模式。

79. 发明申请

US20080009621A1 Control of Cyanate in Aqueous Urea Solutions by non-1,2-Ethylene Diamine like Compounds for the Protection of Protein/Peptide Carbamylation 审中-公开
标题翻译：通过非1,2-亚乙基二胺类化合物控制氰尿酸盐在水溶液中用于保护蛋白质/肽氨基甲酸化
公开(公告)号：US20080009621A1
公开(公告)日：2008-01-10
申请号：US11844600
申请日：2007-08-24
申请人： Philip Ropp , Christie Williams , Michael Murray , Miao Lin
发明人： Philip Ropp , Christie Williams , Michael Murray , Miao Lin
IPC分类号： C07C229/08 , C07C215/12 , C07C229/22 , C07C229/26 , C07C279/14 , C07C309/14 , C07D207/16 , C07D233/64 , C07D237/34
CPC分类号： C12N9/96 , A61K38/00 , C07K1/006 , C07K1/04 , C07K1/064 , C12N9/22
摘要： Embodiments of the present invention generally relate to processing of peptides in urea solutions and substantial prevention of carbamylation of the peptide.
摘要翻译：本发明的实施方案一般涉及尿素溶液中肽的处理和基本上预防肽的氨基甲酰化。

80. 发明申请

US20070264083A1 Above-ground storage system and method 有权
标题翻译：地面存储系统及方法
公开(公告)号：US20070264083A1
公开(公告)日：2007-11-15
申请号：US11800053
申请日：2007-05-02
申请人： Michael Murray
发明人： Michael Murray
IPC分类号： B65G5/00
CPC分类号： E04H4/0043 , A62C99/00
摘要： An above ground water storage device includes a plurality of modular walls coupled together in series to form a substantially continuous perimeter. Each of the plurality of modular walls includes a wall panel that is inclinable with respect to a horizontal orientation, and a support base that is coupled to a portion of the wall panel. A liner covers an internal side of the plurality of modular walls and an area encompassed by the continuous perimeter. At least one modular corner wall is positioned with the plurality of modular wall panels to form a corner in the substantially continuous perimeter. The at least one modular corner wall has an angled side with an angle corresponding to the inclined angle of an adjacent modular wall.
摘要翻译：地上储水装置包括多个联接在一起的多个模块化壁，以形成基本上连续的周长。多个模块化壁中的每一个包括可相对于水平取向倾斜的壁板，以及耦合到壁板的一部分的支撑基座。衬套覆盖多个模块化壁的内侧和由连续周界包围的区域。至少一个模块化角壁定位成具有多个模块化的壁板，以在基本上连续的周边中形成拐角。至少一个模块化角壁具有成角度的一侧，其角度对应于相邻模块化壁的倾斜角。

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