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71. 发明授权

US07889509B2 Ceramic capacitor 有权
标题翻译：陶瓷电容器
公开(公告)号：US07889509B2
公开(公告)日：2011-02-15
申请号：US11513039
申请日：2006-08-31
申请人： Kazuhiro Urashima , Shinji Yuri , Manabu Sato , Yasuhiro Sugimoto
发明人： Kazuhiro Urashima , Shinji Yuri , Manabu Sato , Yasuhiro Sugimoto
IPC分类号： H05K7/00
CPC分类号： H05K1/185 , H01G2/06 , H01G4/385 , H01L23/49816 , H01L23/50 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16235 , H01L2924/00014 , H01L2924/01019 , H01L2924/01078 , H01L2924/09701 , H01L2924/14 , H01L2924/15174 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/3025 , H05K1/0231 , H05K3/4602 , H05K2201/10045 , H05K2201/10674 , H05K2201/10712 , H01L2224/05599
摘要： A circuit board (10, 10″, 10′″) comprising: a board core (11) having a main core surface (12) and a rear core surface (13); a ceramic capacitor (101, 101′, 101″, 101′″, 101″″, 101″″′, 101″″″) having a main capacitor surface (102) and a rear capacitor surface (103), having a structure in which a first inner electrode layer (141) and a second inner electrode layer (142) are alternately stacked with a ceramic dielectric layer (105) interposed therebetween, and having a plurality of capacitor function units (107, 108) being electrically independent from each other, the ceramic capacitor (101, 101′, 101″, 101′″, 101″″, 101″″′, 101″″″) being buried in the board core (11) in a state where the main core surface (12) and the main capacitor surface (102) are directed in a same direction; and a buildup layer (31) having a structure in which an interlayer insulating layer (33, 35) and a conductor layer (42) are alternately stacked on the main core surface (12) and the main capacitor surface (102) and having a semiconductor integrated circuit device mounting region (23, 51, 52) for mounting a semiconductor integrated circuit device (21, 53, 54) having a plurality of processor cores (24, 25) on a surface (39) of the buildup layer (31), wherein the plurality of capacitor function units (107, 108) are capable of being electrically connected to the plurality of processor cores (24, 25), respectively.
摘要翻译：一种电路板（10,10“，10”），包括：具有主芯表面（12）和后芯表面（13）的板芯（11）; 具有主电容器表面（102）和后电容器表面（103）的陶瓷电容器（101,101'，101“，101”，101“”，101“”，101“”“），其中第一内部电极层（141）和第二内部电极层（142）交替层叠有介于其间的陶瓷介电层（105），并且具有多个电容器功能单元（107,108），其电独立于相互之间的陶瓷电容器（101,101'，101“，101”，101“，101”，101“”101“”）被埋在板芯11中，（12）和主电容器表面（102）指向相同的方向; 以及具有层间绝缘层（33,35）和导体层（42）在主芯面（12）和主电容器表面（102）上交替层叠的结构的积层（31），具有半导体集成电路器件安装区域（23,51,52），用于安装具有多个处理器核心（24,25）的半导体集成电路器件（21,53,54），所述多个处理器核心（24,25）在所述生成层（31）的表面（39）上），其中所述多个电容器功能单元（107,108）能够分别电连接到所述多个处理器核（24,25）。

72. 发明授权

US07787433B2 Wireless communication method, wireless communication system using the same, and wireless terminal thereof 有权
标题翻译：无线通信方法，使用其的无线通信系统及其无线终端
公开(公告)号：US07787433B2
公开(公告)日：2010-08-31
申请号：US10586146
申请日：2005-01-13
申请人： Manabu Sato
发明人： Manabu Sato
IPC分类号： H04B7/208 , H04M1/00
CPC分类号： H04W68/12 , H04W88/04 , H04W88/06
摘要： A business wireless communication system, which includes both a repeater relay station of a wireless network using a repeater system and an FDMA relay station of a wireless network using FDMA system, comprises means for ensuring that the repeater relay station, when receiving a call signal from a repeater wireless terminal of the wireless communication network of the repeater system, is communication-line-connected to the FDMA relay station so as to forward the call signal to the FDMA relay station, which sets the forwarded call signal to a control signal and transmits it to an FDMA wireless terminal of the wireless communication network of the FDMA system; and means for ensuring that the FDMA wireless terminal receives the control signal to communicate with the repeater wireless terminal via the repeater relay station. In this way, there can be provided a wireless communication method, a system using the same, and a wireless terminal thereof, wherein a single reception frequency is used to attend to call signals of two different wireless communication systems.
摘要翻译：包括使用中继器系统的无线网络的中继站中继站和使用FDMA系统的无线网络的FDMA中继站的业务无线通信系统包括用于确保中继器中继站在接收到来自中继器系统的无线通信网络的中继器无线终端通信线路连接到FDMA中继站，以将呼叫信号转发到FDMA中继站，FDMA中继站将转发的呼叫信号设置为控制信号，并发送它到FDMA系统的无线通信网络的FDMA无线终端; 以及用于确保FDMA无线终端经由中继器中继站接收到与中继器无线终端通信的控制信号的装置。以这种方式，可以提供一种无线通信方法，使用该无线通信方法的系统及其无线终端，其中使用单个接收频率来接收两个不同无线通信系统的呼叫信号。

73. 发明授权

US07532453B2 Built-in capacitor type wiring board and method for manufacturing the same 失效
标题翻译：内置电容式布线板及其制造方法
公开(公告)号：US07532453B2
公开(公告)日：2009-05-12
申请号：US11601760
申请日：2006-11-20
申请人： Hiroshi Yamamoto , Toshitake Seki , Yasuhiko Inui , Jun Otsuka , Manabu Sato
发明人： Hiroshi Yamamoto , Toshitake Seki , Yasuhiko Inui , Jun Otsuka , Manabu Sato
IPC分类号： H01G4/228
CPC分类号： H01G4/30 , H01G4/232 , H01L23/49822 , H01L23/49838 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16235 , H01L2224/16237 , H01L2924/00014 , H01L2924/01019 , H01L2924/01078 , H01L2924/09701 , H01L2924/15174 , H01L2924/15311 , H05K1/0231 , H05K1/112 , H05K1/185 , H05K1/186 , H05K3/4602 , H05K2201/10674 , H05K2201/10712 , H01L2224/05599
摘要： In order to provide a built-in capacitor type wiring board capable of preventing misalignment of the capacitor, a capacitor built-in type wiring board is provided which includes a core board; a multilayer portion disposed on at least one side of the core board and formed by a plurality of interlayer insulating layers; and a plurality of conductor layers alternately laminated on the core board. The capacitor is of a chip-like shape with first and second main surfaces and includes a dielectric layer; electrode layers laminated on the dielectric layer; and a hole portion opening at least at the second main surface. The capacitor is embedded in the interlayer insulating layers so that the second main surface faces the core board.
摘要翻译：为了提供能够防止电容器未对准的内置电容器型布线板，提供了一种电容器内置型布线板，其包括芯板; 多层部分，设置在所述芯板的至少一侧上，并由多个层间绝缘层形成; 以及在芯板上交替层叠的多个导体层。电容器是具有第一和第二主表面的芯片状形状并且包括电介质层; 层压在电介质层上的电极层; 以及至少在所述第二主表面处开口的孔部分。电容器嵌入在层间绝缘层中，使得第二主表面面向芯板。

74. 发明授权

US07362560B2 Multilayer electronic component and method for producing the same 有权
标题翻译：多层电子元件及其制造方法
公开(公告)号：US07362560B2
公开(公告)日：2008-04-22
申请号：US11144741
申请日：2005-06-06
申请人： Yasuhiro Tsujimura , Akifumi Tosa , Motonobu Kurahashi , Manabu Sato
发明人： Yasuhiro Tsujimura , Akifumi Tosa , Motonobu Kurahashi , Manabu Sato
IPC分类号： H01G4/228
CPC分类号： H01G4/232 , H01G2/065 , H01L2924/15311 , H05K1/0306 , H05K1/113 , H05K1/162 , H05K3/248 , H05K3/4061 , H05K3/4611 , H05K3/4629 , H05K2201/035 , H05K2201/0367 , H05K2201/09845 , H05K2201/10734
摘要： A multilayer electronic component including a multilayer ceramic capacitor is disclosed, which includes a laminate of dielectric layers and internal electrodes disposed on the dielectric layers; at least one via-conductor penetrating the dielectric layers and connecting to the internal electrodes; and at least one external terminal formed on an outer surface of the laminate and connecting to an end of the via-conductor, wherein the external terminal includes a lower bump formed on the outer surface of the laminate and an upper bump formed on the lower bump, and a diameter of the upper bump is smaller than that of the lower bump.
摘要翻译：公开了一种包括多层陶瓷电容器的多层电子部件，其包括设置在电介质层上的电介质层和内部电极的叠层体; 至少一个通孔导体穿透电介质层并连接到内部电极; 以及至少一个外部端子，形成在所述层叠体的外表面上并且连接到所述通孔导体的端部，其中所述外部端子包括形成在所述层叠体的外表面上的下凸块和形成在所述下凸块上的上凸起，并且上凸块的直径小于下凸块的直径。

75. 发明授权

US07321495B2 Capacitor and method for manufacturing the same 有权
标题翻译：电容器及其制造方法
公开(公告)号：US07321495B2
公开(公告)日：2008-01-22
申请号：US11003784
申请日：2004-12-06
申请人： Kazuhiro Hayashi , Jun Otsuka , Manabu Sato
发明人： Kazuhiro Hayashi , Jun Otsuka , Manabu Sato
IPC分类号： H01L23/48 , H01L21/44
CPC分类号： H05K1/162 , H01G4/30 , H01G4/40 , H01L2924/0002 , H05K1/141 , H05K3/4688 , H05K2201/0191 , H05K2201/10674 , H05K2203/061 , Y10S257/924 , Y10S438/957 , Y10T29/435 , Y10T29/49155 , H01L2924/00
摘要： A multilayer ceramic capacitor (10) having reduced inductance which is separated into a first layer body (11) and a second layer body (12). The first layer body (11) and the second layer body (12) are formed by alternately layering inner electrodes (inner electrode 13a, inner electrode 13b) so as to face each other and sandwich ceramic layers (14). The ceramic layers (14) of the second layer body (12) are thicker than the ceramic layers (14) of the first layer body (11), so as to compensate for electrode height difference. Moreover, in the second layer body (12), the inner electrodes (13b) are electrically connected by via electrode (15b) so that the part of the via electrode (15b) extending without connection to an inner electrode (13b) is shortened.
摘要翻译：具有减小的电感的多层陶瓷电容器（10）被分离成第一层体（11）和第二层体（12）。第一层体（11）和第二层体（12）通过交替层叠内部电极（内部电极13a，内部电极13b）以使其彼此面对并夹着陶瓷层（14）形成。第二层体（12）的陶瓷层（14）比第一层体（11）的陶瓷层（14）厚，以补偿电极的高度差。此外，在第二层体（12）中，内部电极（13b）通过电极（15b）电连接，使得通孔电极（15b）的一部分不与内部电极（13b）连接）缩短。

76. 发明申请

US20070221493A1 PLASMA PROCESSING APPARATUS, PLASMA PROCESSING METHOD, AND STORAGE MEDIUM 有权
标题翻译：等离子体处理装置，等离子体处理方法和储存介质
公开(公告)号：US20070221493A1
公开(公告)日：2007-09-27
申请号：US11689065
申请日：2007-03-21
申请人： Masanobu HONDA , Yutaka Matsui , Manabu Sato
发明人： Masanobu HONDA , Yutaka Matsui , Manabu Sato
IPC分类号： G06F19/00 , C23C14/32 , C23C14/00
CPC分类号： H01J37/32174 , H01J37/32091 , H01J37/32165 , H01J37/3255 , H01J37/32706 , H01J37/32862 , H01J37/32926 , H01L21/02532 , H01L21/31116 , H01L21/31122 , H01L21/31138 , H01L21/31144 , H01L21/67069
摘要： A plasma processing apparatus that enables polymer to be removed from an electrically insulated electrode. A susceptor of the plasma processing apparatus is disposed in a substrate processing chamber having a processing space therein. A radio frequency power source is connected to the susceptor. An upper electrode plate is electrically insulated from a wall of the substrate processing chamber and from the susceptor. A DC power source is connected to the upper electrode plate. A controller of the plasma processing apparatus determines a value of a negative DC voltage to be applied to the upper electrode plate in accordance with processing conditions for RIE processing to be carried out.
摘要翻译：一种使聚合物能够从电绝缘电极移除的等离子体处理装置。等离子体处理装置的基座设置在其中具有处理空间的基板处理室中。射频电源连接到基座。上电极板与基板处理室的壁和基座电绝缘。直流电源连接到上电极板。等离子体处理装置的控制器根据要执行的RIE处理的处理条件确定施加到上电极板的负DC电压的值。

77. 发明申请

US20070165355A1 PLASMA ETCHING METHOD AND COMPUTER-READABLE STORAGE MEDIUM 有权
标题翻译：等离子体蚀刻方法和计算机可读存储介质
公开(公告)号：US20070165355A1
公开(公告)日：2007-07-19
申请号：US11617440
申请日：2006-12-28
申请人： Manabu Sato , Yoshiki Igarashi , Yoshimitsu Kon , Masanobu Honda
发明人： Manabu Sato , Yoshiki Igarashi , Yoshimitsu Kon , Masanobu Honda
IPC分类号： H01T23/00
CPC分类号： H01L21/0273 , H01L21/31116 , H01L21/31138 , H01L21/31144
摘要： A plasma processing apparatus includes a first and a second electrode disposed to face each other in a processing chamber, the second electrode supporting a substrate; a first RF power supply for applying a first RF power of a higher frequency to the second electrode; a second RF power supply for applying a second RF power of a lower frequency to the second electrode; and a DC power source for applying a DC voltage to the first electrode. In a plasma etching method for etching a substrate by using the plasma processing apparatus, the first and the second radio frequency power are applied to the second electrode to convert a processing gas containing no CF-based gas into a plasma and a DC voltage is applied to the first electrode, to thereby etch an organic film or an amorphous film on the substrate by using a silicon-containing mask.
摘要翻译：等离子体处理装置包括在处理室中彼此面对的第一和第二电极，第二电极支撑基板; 用于向第二电极施加较高频率的第一RF功率的第一RF电源; 用于将较低频率的第二RF功率施加到所述第二电极的第二RF电源; 以及用于向第一电极施加DC电压的DC电源。在通过使用等离子体处理装置蚀刻基板的等离子体蚀刻方法中，将第一和第二射频功率施加到第二电极，以将不含CF基气体的处理气体转换成等离子体，并施加DC电压从而通过使用含硅掩模在基板上蚀刻有机膜或非晶膜。

78. 发明申请

US20070117338A1 Via array capacitor, wiring board incorporating a via array capacitor, and method of manufacturing the same 失效
标题翻译：通过阵列电容器，并入通孔阵列电容器的布线板及其制造方法
公开(公告)号：US20070117338A1
公开(公告)日：2007-05-24
申请号：US11603161
申请日：2006-11-22
申请人： Hiroshi Yamamoto , Toshitake Seki , Jun Otsuka , Manabu Sato , Masahiko Okuyama
发明人： Hiroshi Yamamoto , Toshitake Seki , Jun Otsuka , Manabu Sato , Masahiko Okuyama
IPC分类号： H01L21/20 , H01L29/00
CPC分类号： H05K1/186 , H01G4/232 , H01G4/30 , H01L23/49822 , H01L23/50 , H01L24/81 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/16235 , H01L2224/81192 , H01L2224/81801 , H01L2224/82039 , H01L2224/82047 , H01L2924/01019 , H01L2924/01078 , H01L2924/09701 , H01L2924/14 , H01L2924/15174 , H01L2924/15311 , H01L2924/3511 , H05K1/0231 , H05K1/112 , H05K3/4602 , H05K2201/10674 , H05K2201/10712 , H01L2924/00
摘要： A via array capacitor comprising: a capacitor body including a first main surface and a second main surface and having a structure in which dielectric layers and inner electrode layers are alternately laminated; a plurality of via conductors which conduct the inner electrode layers to each other and are, as a whole, arranged in array form; and metal-containing layers which are disposed on at least one of the first main surface and the second main surface, wherein a total of a thickness of the metal-containing layers disposed on the first main surface and a thickness of the metal-containing layers disposed on the second main surface is from 15% to 80% of an overall thickness of the via array capacitor.
摘要翻译：一种通孔阵列电容器，包括：电容器主体，包括第一主表面和第二主表面，并且具有交替层叠电介质层和内电极层的结构; 多个通孔导体，其将内部电极层彼此导引并且整体上排列成阵列形式; 和设置在第一主表面和第二主表面中的至少一个上的含金属层，其中设置在第一主表面上的含金属层的厚度和含金属层的厚度的总和设置在第二主表面上的通孔阵列电容器的总厚度的15％至80％。

79. 发明授权

US07203280B2 X-ray apparatus 有权
标题翻译： X光装置
公开(公告)号：US07203280B2
公开(公告)日：2007-04-10
申请号：US11404779
申请日：2006-04-17
申请人： Hidero Anno , Koichi Kitade , Takayuki Kitami , Hironori Nakamuta , Manabu Sato
发明人： Hidero Anno , Koichi Kitade , Takayuki Kitami , Hironori Nakamuta , Manabu Sato
IPC分类号： H01J35/00
CPC分类号： H05G1/04 , H05G1/08
摘要： The present invention relates to an X-ray apparatus comprising an electron radiation source which generates an electron to an anode, a shaft which rotatably supports the anode, a stator which generates a force to rotate a rotor shaft, an enclosure which maintains at least the anode, electron radiation source and rotor shaft in vacuum, and a housing which contains a cooling medium around the enclosure. The X-ray apparatus is characterized in that an electric wire material to supply power to the electron radiation source and stator, or a connector used for connection with the electric wire material is molded by a material having an electrical insulating property.
摘要翻译：本发明涉及一种X射线设备，其包括：向阳极产生电子的电子辐射源，可旋转地支撑阳极的轴，产生转动轴的力的定子，至少保持阳极，电子辐射源和真空中的转子轴，以及在外壳周围包含冷却介质的壳体。 X射线装置的特征在于，用于向电子辐射源和定子供电的电线材料或用于与电线材料连接的连接器由具有电绝缘性的材料模制。

80. 发明申请

US20070030628A1 Capacitor for incorporation in wiring board, wiring board, method of manufacturing wiring board, and ceramic chip for embedment 有权
标题翻译：用于布线板的电容器，布线板，制造布线板的方法和用于嵌入的陶瓷芯片
公开(公告)号：US20070030628A1
公开(公告)日：2007-02-08
申请号：US11498785
申请日：2006-08-04
申请人： Hiroshi Yamamoto , Toshitake Seki , Shinji Yuri , Masaki Muramatsu , Motohiko Sato , Kazuhiro Hayashi , Jun Otsuka , Manabu Sato
发明人： Hiroshi Yamamoto , Toshitake Seki , Shinji Yuri , Masaki Muramatsu , Motohiko Sato , Kazuhiro Hayashi , Jun Otsuka , Manabu Sato
IPC分类号： H01G4/06
CPC分类号： H01G4/232 , H01G4/30 , H01L23/49822 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16235 , H01L2924/00014 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/15311 , H01L2924/3511 , H05K1/0231 , H05K1/112 , H05K1/185 , H05K3/4602 , H05K2201/096 , H05K2201/09781 , H05K2201/10674 , H05K2201/10712 , H01L2224/05599
摘要： A capacitor comprising: a capacitor body including a plurality of laminated dielectric layers, a plurality of inner electrode layers which are respectively disposed between mutually adjacent ones of the dielectric layers, a first main surface located in a laminated direction of the dielectric layers, and a second main surface opposite to the first main surface; a first outer electrode formed on the first main surface of the capacitor body and electrically connected to the inner electrode layers; a second outer electrode formed on the second main surface of the capacitor body and electrically connected to the inner electrode layers; a first dummy electrode formed on the first main surface of the capacitor body; and a second dummy electrode formed on the second main surface of the capacitor body.
摘要翻译：一种电容器，包括：电容器主体，包括多个叠层电介质层，多个内部电极层，分别设置在相互相邻的电介质层之间，第一主表面位于电介质层的层叠方向上，第二主表面与第一主表面相对; 第一外电极，形成在所述电容器主体的所述第一主表面上并电连接到所述内电极层; 形成在所述电容器主体的所述第二主表面上并与内部电极层电连接的第二外部电极; 形成在所述电容器主体的所述第一主表面上的第一虚拟电极; 以及形成在电容器主体的第二主表面上的第二虚拟电极。

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