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    • 9. 发明申请
    • Ceramic capacitor
    • 陶瓷电容器
    • US20070064375A1
    • 2007-03-22
    • US11513039
    • 2006-08-31
    • Kazuhiro UrashimaShinji YuriManabu SatoYasuhiro Sugimoto
    • Kazuhiro UrashimaShinji YuriManabu SatoYasuhiro Sugimoto
    • H01G4/06
    • H05K1/185H01G2/06H01G4/385H01L23/49816H01L23/50H01L2224/05568H01L2224/05573H01L2224/16225H01L2224/16235H01L2924/00014H01L2924/01019H01L2924/01078H01L2924/09701H01L2924/14H01L2924/15174H01L2924/15311H01L2924/19041H01L2924/19042H01L2924/3025H05K1/0231H05K3/4602H05K2201/10045H05K2201/10674H05K2201/10712H01L2224/05599
    • A circuit board (10, 10″, 10″′) comprising: a board core (11) having a main core surface (12) and a rear core surface (13); a ceramic capacitor (101, 101′, 101″, 101″′, 101″″, 101″″′, 101″″″) having a main capacitor surface (102) and a rear capacitor surface (103), having a structure in which a first inner electrode layer (141) and a second inner electrode layer (142) are alternately stacked with a ceramic dielectric layer (105) interposed therebetween, and having a plurality of capacitor function units (107, 108) being electrically independent from each other, the ceramic capacitor (101, 101′, 101″, 101″′, 101″″, 101″″′, 101″″″) being buried in the board core (11) in a state where the main core surface (12) and the main capacitor surface (102) are directed in a same direction; and a buildup layer (31) having a structure in which an interlayer insulating layer (33, 35) and a conductor layer (42) are alternately stacked on the main core surface (12) and the main capacitor surface (102) and having a semiconductor integrated circuit device mounting region (23, 51, 52) for mounting a semiconductor integrated circuit device (21, 53, 54) having a plurality of processor cores (24, 25) on a surface (39) of the buildup layer (31), wherein the plurality of capacitor function units (107, 108) are capable of being electrically connected to the plurality of processor cores (24, 25), respectively.
    • 一种电路板(10,10“,10”),包括:具有主芯表面(12)和后芯表面(13)的板芯(11); 具有主电容器表面(102)和后部电容器(102)的陶瓷电容器(101,101',101“,101”',101“',101”',101“',101”',101“ 电容器表面(103),其具有第一内部电极层(141)和第二内部电极层(142)与陶瓷介电层(105)交替层叠的结构,并且具有多个电容器功能单元 (101,101',101“,101”,101“,101”,101“,101”,101“,101”,101“ )以主芯表面(12)和主电容器表面(102)指向相同方向的状态埋在板芯(11)中; 以及具有层间绝缘层(33,35)和导体层(42)在主芯面(12)和主电容器表面(102)上交替层叠的结构的积层(31),具有 半导体集成电路器件安装区域(23,51,52),用于安装具有多个处理器核心(24,25)的半导体集成电路器件(21,53,54),所述多个处理器核心(24,25)在所述生成层(31)的表面(39)上 ),其中所述多个电容器功能单元(107,108)能够分别电连接到所述多个处理器核(24,25)。
    • 10. 发明授权
    • Sintered alumina ceramic, method for producing the same, and cutting tool
    • 烧结氧化铝陶瓷,其制造方法和切削工具
    • US06753284B2
    • 2004-06-22
    • US10198956
    • 2002-07-22
    • Hiroshi YamamotoTakeshi MitsuokaKazuhiro Urashima
    • Hiroshi YamamotoTakeshi MitsuokaKazuhiro Urashima
    • C04B35111
    • C04B35/50C04B35/117C04B35/505
    • A sintered alumina ceramic obtained by preparing a raw material powder mixture containing alumina and a Group 3A metal oxide or a Group 3A metal compound which provides a Group 3A metal oxide on heating, and firing said raw material powder mixture. The sintered ceramic contains alumina particles having an average particle diameter of 4.0 &mgr;m or smaller. In the sintered ceramic, the total content of alkali metal elements, alkaline earth metal elements, Si, and Ti as converted to oxides accounts for 0.1 mol or less with respect to 100 mols of alumina, the total peak intensity for the principal peaks for ReAlO3 and Re3Al5O12 (Re: Group 3A metal) amounts to from 1 to 75% of the intensity of the principal peak of alumina as measured by X-ray diffraction, and the relative density is 99.0% or higher with respect to the theoretical density.
    • 通过制备含有氧化铝和3A族金属氧化物的原料粉末混合物或在加热时提供3A族金属氧化物的3A族金属化合物,烧制所述原料粉末混合物而获得的烧结氧化铝陶瓷。 烧结陶瓷含有平均粒径为4.0μm以下的氧化铝粒子。 在烧结陶瓷中,转化为氧化物的碱金属元素,碱土金属元素,Si和Ti的总含量相对于100摩尔氧化铝为0.1摩尔以下,ReAlO 3的主峰的总峰强度 和Re 3 Al 5 O 12(Re:3A族金属)相当于通过X射线衍射测定的氧化铝主峰的强度的1〜75%,相对密度相对于理论密度为99.0%以上。