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71. 发明申请

US20130112936A1 RESISTANCE CHANGE ELEMENT AND MANUFACTURING METHOD THEREFOR 有权
标题翻译：电阻变化元件及其制造方法
公开(公告)号：US20130112936A1
公开(公告)日：2013-05-09
申请号：US13810708
申请日：2012-01-18
申请人： Zhiqiang WEI , Takeshi Takagi , Satoru Mitani , Yoshio Kawashima , Ichirou Takahashi
发明人： Zhiqiang WEI , Takeshi Takagi , Satoru Mitani , Yoshio Kawashima , Ichirou Takahashi
IPC分类号： H01L45/00
CPC分类号： H01L45/1253 , H01L45/08 , H01L45/1233 , H01L45/1273 , H01L45/146 , H01L45/16 , H01L45/1625 , H01L45/1675
摘要： A variable resistance element including: a first electrode; a second electrode; and a variable resistance layer having a resistance value which reversibly changes according to electrical signals applied, wherein the variable resistance layer includes a first variable resistance layer comprising a first oxygen-deficient transition metal oxide, and a second variable resistance layer comprising a second transition metal oxide having a degree of oxygen deficiency lower than a degree of oxygen deficiency of the first transition metal oxide layer, the second electrode has a single needle-shaped part at the interface with the second variable resistance layer, and the second variable resistance layer is interposed between the first variable resistance layer and the second electrode, is in contact with the first variable resistance layer and the second electrode, and covers the needle-shaped part.
摘要翻译：一种可变电阻元件，包括：第一电极; 第二电极; 以及可变电阻层，其具有根据施加的电信号可逆地改变的电阻值，其中所述可变电阻层包括包含第一氧缺乏过渡金属氧化物的第一可变电阻层和包含第二过渡金属的第二可变电阻层具有低于第一过渡金属氧化物层的氧缺乏程度的氧缺乏的氧化物，第二电极在与第二可变电阻层的界面处具有单个针状部分，并且插入第二可变电阻层在第一可变电阻层和第二电极之间，与第一可变电阻层和第二电极接触并覆盖针状部分。

72. 发明授权

US08432721B2 Method of programming variable resistance element, method of initializing variable resistance element, and nonvolatile storage device 有权
标题翻译：编程可变电阻元件的方法，初始化可变电阻元件的方法和非易失性存储器件
公开(公告)号：US08432721B2
公开(公告)日：2013-04-30
申请号：US13201890
申请日：2011-02-01
申请人： Mitsuteru Iijima , Takeshi Takagi
发明人： Mitsuteru Iijima , Takeshi Takagi
IPC分类号： G11C11/00
CPC分类号： G11C13/0069 , G11C13/0007 , G11C13/0097 , G11C2013/0073 , G11C2013/0083 , G11C2213/32 , G11C2213/72 , G11C2213/79 , H01L45/08 , H01L45/146
摘要： Programming a variable resistance element includes: a writing step of applying a writing voltage pulse to transition metal oxide comprising two stacked metal oxide layers to decrease resistance of the metal oxide, each metal oxide layer having different oxygen deficiency; and an erasing step of applying an erasing voltage pulse, of different polarity than the writing pulse, to the metal oxide to increase resistance of the metal oxide. |Vw1|>|Vw2|, Vw1 representing voltage of the writing pulse for first to N-th writing steps, and Vw2 representing voltage of the writing pulse for (N+1)-th and subsequent writing steps, N being at least equal to 1, te1>te2, te1 representing pulse width of the erasing pulse for first to M-th erasing steps, and te2 representing pulse width of the erasing pulse for (M+1)-th and subsequent erasing steps. M>1. The (N+1)-th writing step follows the M-th erasing step.
摘要翻译：编程可变电阻元件包括：写入步骤，对包含两个堆叠的金属氧化物层的过渡金属氧化物施加写入电压脉冲，以降低金属氧化物的电阻，每个金属氧化物层具有不同的氧缺乏; 以及将与写入脉冲不同的擦除电压脉冲施加到金属氧化物以增加金属氧化物的电阻的擦除步骤。 | Vw1 |> | Vw2 |，表示第一至第N写入步骤的写入脉冲的电压的Vw1，以及表示第（N + 1）个和后续写入步骤的写入脉冲的电压的Vw2，N至少相等到1，te1> te2，te1表示第一到第M擦除步骤的擦除脉冲的脉冲宽度，te2表示用于（M + 1）个和随后的擦除步骤的擦除脉冲的脉冲宽度。 M> 1。第（N + 1）个写入步骤在第M擦除步骤之后。

73. 发明申请

US20130010530A1 METHOD FOR DRIVING NON-VOLATILE MEMORY ELEMENT, AND NON-VOLATILE MEMORY DEVICE 有权
标题翻译：驱动非易失性存储器元件的方法和非易失性存储器件
公开(公告)号：US20130010530A1
公开(公告)日：2013-01-10
申请号：US13636258
申请日：2011-03-18
申请人： Koji Katayama , Takeshi Takagi , Mitsuteru Iijima
发明人： Koji Katayama , Takeshi Takagi , Mitsuteru Iijima
IPC分类号： G11C11/00
CPC分类号： G11C13/0007 , G11C2213/72 , H01L27/2409 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1625
摘要： Provided is a method for driving a non-volatile memory element in which a variable resistance element including a first electrode, a second electrode, and a variable resistance layer capable of reversibly changing between a high resistance state and a low resistance state with application of electrical signals having different polarities is connected in series with a current steering element having bidirectional rectifying characteristics with respect to an applied voltage. After the non-volatile memory element is manufactured, the resistance value of the variable resistance layer is reduced from a resistance value in the initial resistance state higher than that in the high resistance state by applying, to the non-volatile memory element, a voltage pulse having the polarity identical to that of the voltage pulse for changing the variable resistance layer from the low resistance state to the high resistance state in the normal operations.
摘要翻译：提供一种用于驱动非易失性存储元件的方法，其中包括第一电极，第二电极和可变电阻层的可变电阻元件，所述可变电阻元件能够通过施加电而在高电阻状态和低电阻状态之间可逆地变化具有不同极性的信号与具有相对于施加电压的双向整流特性的电流导向元件串联连接。在制造非易失性存储元件之后，通过向非易失性存储元件施加电压，可变电阻层的电阻值比初始电阻状态中的电阻值高于高电阻状态的电阻值脉冲具有与用于在正常操作中将可变电阻层从低电阻状态改变为高电阻状态的电压脉冲的极性相同的脉冲。

74. 发明申请

US20120320661A1 METHOD OF PROGRAMMING VARIABLE RESISTANCE ELEMENT AND NONVOLATILE STORAGE DEVICE 有权
标题翻译：可变电阻元件和非易失性存储器件的编程方法
公开(公告)号：US20120320661A1
公开(公告)日：2012-12-20
申请号：US13596154
申请日：2012-08-28
申请人： Shunsaku MURAOKA , Takeshi Takagi , Satoru Mitani , Koji Katayama
发明人： Shunsaku MURAOKA , Takeshi Takagi , Satoru Mitani , Koji Katayama
IPC分类号： G11C11/00
CPC分类号： G11C13/0007 , G11C13/0069 , G11C2013/0083 , G11C2213/72 , G11C2213/79 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1625
摘要： A method includes applying a first polarity writing voltage pulse to a metal oxide layer to change its resistance state from high to low into a write state, applying a second polarity erasing voltage pulse different from the first polarity to the metal oxide layer to change its resistance state from low to high into an erase state, and applying an initial voltage pulse having the second polarity to the metal oxide layer before first application of the writing voltage pulse, to change an initial resistance value of the metal oxide layer. R0>RH>RL and |V0|>|Ve|≧|Vw| are satisfied where R0, RL, and RH are the resistance values of the initial, write, and erase states, respectively, of the metal oxide layer, and V0, Vw, and Ve are voltage values of the initial, writing, and erasing voltage pulses, respectively.
摘要翻译：一种方法包括：将第一极性写入电压脉冲施加到金属氧化物层，以将其电阻状态从高变为低电平变为写入状态，将不同于第一极性的第二极性擦除电压脉冲施加到金属氧化物层以改变其电阻状态从低到高进入擦除状态，以及在首次施加写入电压脉冲之前将具有第二极性的初始电压脉冲施加到金属氧化物层，以改变金属氧化物层的初始电阻值。 R0> RH> RL和| V0 |> | Ve |≥| Vw | 满足R0，RL和RH分别是金属氧化物层的初始，写入和擦除状态的电阻值，V0，Vw和Ve是初始，写入和擦除电压的电压值脉冲。

75. 发明授权

US08258493B2 Nonvolatile semiconductor memory apparatus and manufacturing method thereof 有权
标题翻译：非易失性半导体存储装置及其制造方法
公开(公告)号：US08258493B2
公开(公告)日：2012-09-04
申请号：US12515379
申请日：2007-11-13
申请人： Takumi Mikawa , Takeshi Takagi
发明人： Takumi Mikawa , Takeshi Takagi
IPC分类号： H01L29/00
CPC分类号： H01L27/101 , G11C13/0007 , G11C2213/32 , G11C2213/72 , G11C2213/73 , H01L27/0688 , H01L27/112 , H01L27/115 , H01L27/2409 , H01L27/2418 , H01L27/2463 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1683
摘要： A nonvolatile semiconductor memory apparatus (10) of the present invention comprises a substrate (10), lower-layer electrode wires (15) provided on the substrate (11), an interlayer insulating layer (16) which is disposed on the substrate (11) including the lower-layer electrode wires (15) and is provided with contact holes at locations respectively opposite to the lower-layer electrode wires (15), resistance variable layers (18) which are respectively connected to the lower-layer electrode wires (15); and non-ohmic devices (20) which are respectively provided on the resistance variable layers (18) such that the non-ohmic devices are respectively connected to the resistance variable layers (18). The non-ohmic devices (20) each has a laminated-layer structure including plural semiconductor layers, a laminated-layer structure including a metal electrode layer and an insulator layer, or a laminated-layer structure including a metal electrode layer and a semiconductor layer. One layer of the laminated-layer structure is embedded to fill each of the contact holes and the semiconductor layer or the insulator layer which is the other layer of the laminated-layer structure has a larger area than an opening of each of the contact holes and is provided on the interlayer insulating layer (16).
摘要翻译：本发明的非易失性半导体存储装置（10）具备基板（10），设置在基板（11）上的下层电极布线（15），设置在基板（11）上的层间绝缘层（16）），并且在分别与下层电极线（15）相对的位置设置接触孔，电阻变化层（18）分别与下层电极线（15）连接 15）; 和非欧姆器件（20），其分别设置在电阻变化层（18）上，使得非欧姆器件分别连接到电阻变化层（18）。非欧姆装置（20）各自具有包括多个半导体层的层叠层结构，包括金属电极层和绝缘体层的层叠层结构，或者包括金属电极层和半导体层的层叠层结构。嵌入层叠层结构的一层以填充每个接触孔，作为层叠层结构的另一层的半导体层或绝缘体层的面积比每个接触孔的开口大，设置在层间绝缘层（16）上。

76. 发明授权

US08094482B2 Nonvolatile memory apparatus and nonvolatile data storage medium 有权
标题翻译：非易失性存储装置和非易失性数据存储介质
公开(公告)号：US08094482B2
公开(公告)日：2012-01-10
申请号：US12529466
申请日：2008-10-28
申请人： Zhiqiang Wei , Takeshi Takagi , Ken Kawai , Kazuhiko Shimakawa
发明人： Zhiqiang Wei , Takeshi Takagi , Ken Kawai , Kazuhiko Shimakawa
IPC分类号： G11C11/00
CPC分类号： H01L27/101 , G11C11/5685 , G11C13/0007 , G11C13/004 , G11C13/0069 , G11C2013/0054 , G11C2013/0073 , G11C2013/009 , G11C2211/5646 , G11C2213/31 , G11C2213/32 , G11C2213/34 , G11C2213/79
摘要： A nonvolatile memory apparatus and a nonvolatile data storage medium of the present invention, including nonvolatile memory elements each of which changes its resistance in response to electric pulses applied, comprises a first write circuit for performing first write in which a first electric pulse is applied to the nonvolatile memory element to switch a resistance value of the nonvolatile memory element from a first resistance value to a second resistance value and a second electric pulse which is opposite in polarity to the first electric pulse is applied to the nonvolatile memory element to switch the resistance value of the nonvolatile memory element from the second resistance value to the first resistance value.
摘要翻译：本发明的非易失性存储装置和非易失性数据存储介质，包括各自根据施加的电脉冲改变其电阻的非易失性存储元件，包括用于执行第一写入的第一写入电路，其中施加第一电脉冲到将非易失性存储元件的电阻值从第一电阻值切换到与第一电脉冲极性相反的第二电阻值和第二电脉冲的非易失性存储元件施加到非易失性存储元件，以将电阻非易失性存储元件的值从第二电阻值到第一电阻值。

77. 发明授权

US08093578B2 Nonvolatile memory element, nonvolatile memory element array, and method for manufacturing nonvolatile memory element 有权
标题翻译：非易失性存储元件，非易失性存储元件阵列和用于制造非易失性存储元件的方法
公开(公告)号：US08093578B2
公开(公告)日：2012-01-10
申请号：US12513638
申请日：2007-11-16
申请人： Takeshi Takagi , Takumi Mikawa
发明人： Takeshi Takagi , Takumi Mikawa
IPC分类号： H01L27/10 , H01L21/02
CPC分类号： H01L27/101 , H01L27/1021 , H01L27/2409 , H01L27/2418 , H01L27/2463 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1683
摘要： The present invention is configured such that a resistance variable element (16) and a rectifying element (20) are formed on a substrate (12). The resistance variable element (16) is configured such that a resistance variable layer (14) made of a metal oxide material is sandwiched between a lower electrode (13) and an upper electrode (15). The rectifying element (20) is connected to the resistance variable element (16), and is configured such that a blocking layer (18) is sandwiched between a first electrode layer (17) located on a lower side of the blocking layer (18) and a second electrode layer (19) located on an upper side of the blocking layer (18). The resistance variable element (16) and the rectifying element (20) are connected to each other in series in a thickness direction of the resistance variable layer (14), and the blocking layer (18) is formed as a barrier layer having a hydrogen barrier property.
摘要翻译：本发明被构造成使得在基板（12）上形成电阻可变元件（16）和整流元件（20）。电阻可变元件（16）被构造为使得由金属氧化物材料制成的电阻变化层（14）夹在下电极（13）和上电极（15）之间。整流元件（20）连接到电阻可变元件（16），并且被构造为使阻挡层（18）夹在位于阻挡层（18）的下侧的第一电极层（17）之间，以及位于阻挡层（18）的上侧的第二电极层（19）。电阻可变元件（16）和整流元件（20）在电阻变化层（14）的厚度方向上串联连接，并且阻挡层（18）形成为具有氢的阻挡层屏障属性。

78. 发明申请

US20110174708A1 SAMPLE STIRRING DEVICE, LIQUID CHROMATOGRAPHY DEVICE USING SAME, AND SAMPLE CONTAINER STAND 有权
标题翻译：样品搅拌装置，使用相同的液相色谱装置和样品容器
公开(公告)号：US20110174708A1
公开(公告)日：2011-07-21
申请号：US13121872
申请日：2009-10-02
申请人： Shin-ichi Oota , Hidenari Yamagata , Takeshi Takagi , Koji Egawa
发明人： Shin-ichi Oota , Hidenari Yamagata , Takeshi Takagi , Koji Egawa
IPC分类号： B01F9/00 , B01D15/08 , B01L9/00
CPC分类号： G01N35/1097 , B01F11/0002 , B01F11/0037 , B01L9/06 , B01L2300/0851 , G01N30/06 , G01N2035/00524
摘要： A sample stirring device of the present invention includes a driving roller and two follower rollers for coming into contact with a sample container including a cylindrical portion for containing a sample to be stirred. The driving roller is driven for rotation to stir the sample contained in the sample container. The two follower rollers have rotation axes inclined with respect to an axial direction of the cylindrical portion. This arrangement allows the sample container such as a blood collection tube to be rotated stably.
摘要翻译：本发明的样品搅拌装置包括驱动辊和两个从动辊，用于与包括用于容纳待搅拌样品的圆筒部分的样品容器接触。驱动辊被驱动旋转以搅拌包含在样品容器中的样品。两个从动辊具有相对于圆筒部的轴向倾斜的旋转轴。这种布置允许诸如采血管的样品容器能够稳定地旋转。

79. 发明授权

US07801186B2 Light source 失效
标题翻译：光源
公开(公告)号：US07801186B2
公开(公告)日：2010-09-21
申请号：US11952647
申请日：2007-12-07
申请人： Sugio Wako , Atsushi Koyama , Xiongfei Zhang , Hiroshi Matsuura , Satoru Abe , Takeshi Takagi
发明人： Sugio Wako , Atsushi Koyama , Xiongfei Zhang , Hiroshi Matsuura , Satoru Abe , Takeshi Takagi
IPC分类号： H01S3/30
CPC分类号： H01S3/09415 , G01N2201/06113 , G02B6/29317 , G02B6/29358 , H01S3/06708 , H01S3/0675 , H01S3/08036 , H01S3/1062 , H01S3/1618
摘要： A spatial coupling provided between an amplified-light waveguide and an output-light waveguide includes a wavelength selecting element that selectively transmits a light having a desired wavelength band out of a spontaneous emission light generated in the amplified-light waveguide and a lens unit that couples the spontaneous emission light to the wavelength selecting unit. An input-side light reflecting unit provided between a semiconductor pumping laser and the amplified-light waveguide and an output-side light reflecting unit formed on an output side of the spatial coupling unit form a laser resonator.
摘要翻译：提供在放大光波导和输出光波导之间的空间耦合包括波长选择元件，其选择性地透射在放大光波导中产生的自发发射光中具有期望波长带的光;以及透镜单元，其耦合对波长选择单元的自发发射光。设置在半导体泵浦激光器和放大光波导之间的输入侧光反射单元和形成在空间耦合单元的输出侧的输出侧光反射单元形成激光谐振器。

80. 发明申请

US20100200432A1 METHOD AND APPARATUS FOR DETERMINING SUBSTRATE CONCENTRATION AND REAGENT FOR DETERMINING SUBSTRATE CONCENTRATION 审中-公开
标题翻译：用于确定底物浓度和测定底物浓度的试剂的方法和装置
公开(公告)号：US20100200432A1
公开(公告)日：2010-08-12
申请号：US12449732
申请日：2008-02-24
申请人： Tatsuo Kamata , Takeshi Takagi
发明人： Tatsuo Kamata , Takeshi Takagi
IPC分类号： G01N27/26 , C01B21/08
CPC分类号： C12Q1/006 , C12Q1/28
摘要： The present invention relates to a method, a reagent and an apparatus for determining a substrate concentration based on an amount of hydrogen peroxide generated from a substrate. In the present invention, a suppressing agent for suppressing a reaction between the hydrogen peroxide and an inhibitor is added. As the suppressing agent, an azide compound such as sodium azide or a nitrite compound such as sodium nitrite is used. In the invention, a supporting electrolyte, such as sodium chloride or potassium chloride may be further added.
摘要翻译：本发明涉及一种基于从基底产生的过氧化氢量来确定底物浓度的方法，试剂和装置。在本发明中，添加抑制过氧化氢与抑制剂的反应的抑制剂。作为抑制剂，可以使用叠氮化钠等叠氮化合物，亚硝酸钠等亚硝酸酯化合物。在本发明中，可以进一步添加氯化钠或氯化钾等担载电解质。

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