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71. 发明授权

US5356722A Method for depositing ozone/TEOS silicon oxide films of reduced surface sensitivity 失效
标题翻译：沉积表面灵敏度降低的臭氧/ TEOS氧化硅膜的方法
公开(公告)号：US5356722A
公开(公告)日：1994-10-18
申请号：US896296
申请日：1992-06-10
申请人： Bang Nguyen , Ellie Yieh , Maria Galiano
发明人： Bang Nguyen , Ellie Yieh , Maria Galiano
IPC分类号： H01L21/205 , C23C16/40 , C23C16/452 , H01L21/314 , H01L21/316 , C23C16/00
CPC分类号： H01L21/02164 , C23C16/402 , C23C16/452 , H01L21/02271 , H01L21/02304 , H01L21/3144 , H01L21/31612
摘要： A process for depositing void-free silicon oxide layers over stepped topography comprising depositing a first silicon oxide seed layer which is doped with nitrogen from a plasma of tetraethoxysilane and a nitrogen-containing gas, and depositing thereover a silicon oxide layer from a mixture of tetraethoxysilane, ozone and oxygen at low temperatures to produce a silicon oxide layer having improved properties.
摘要翻译：一种用于在阶梯形地貌上沉积无空隙氧化硅层的方法，包括从四乙氧基硅烷和含氮气体的等离子体中沉积氮掺杂的第一氧化硅晶种层，并从四乙氧基硅烷的混合物沉积氧化硅层，臭氧和氧在低温下产生具有改进性能的氧化硅层。

72. 发明申请

US20170069488A1 METHOD AND SYSTEM FOR THREE-DIMENSIONAL (3D) STRUCTURE FILL 审中-公开
标题翻译：三维（3D）结构填充的方法和系统
公开(公告)号：US20170069488A1
公开(公告)日：2017-03-09
申请号：US15356475
申请日：2016-11-18
申请人： Ellie Yieh , Ludovic Godet , Srinivas Nemani , Er-Xuan Ping , Gary Dickerson
发明人： Ellie Yieh , Ludovic Godet , Srinivas Nemani , Er-Xuan Ping , Gary Dickerson
IPC分类号： H01L21/02 , H01L21/285 , H01L21/3213 , C23C14/02 , C23C16/455 , C23C16/02 , C23C16/04 , H01J37/32 , C23C16/50 , H01L21/311 , C23C14/04
CPC分类号： H01L21/02271 , C23C14/021 , C23C14/046 , C23C16/0227 , C23C16/045 , C23C16/45544 , C23C16/50 , H01J37/32009 , H01J2237/334 , H01L21/02266 , H01L21/02274 , H01L21/0228 , H01L21/02315 , H01L21/2855 , H01L21/28556 , H01L21/31116 , H01L21/32136 , H01L21/67017 , H01L21/67213 , H01L21/76224
摘要： Embodiments include methods and systems of 3D structure fill. In one embodiment, a method of filling a trench in a wafer includes performing directional plasma treatment with an ion beam at an angle with respect to a sidewall of the trench to form a treated portion of the sidewall and an untreated bottom of the trench. A material is deposited in the trench. The deposition rate of the material on the treated portion of the sidewall is different than a second deposition rate on the untreated bottom of the trench. In one embodiment, a method includes depositing a material on the wafer, filling a bottom of the trench and forming a layer on a sidewall of the trench and a top surface adjacent to the trench. The method includes etching the layer with an ion beam at an angle with respect to the sidewall.
摘要翻译：实施例包括3D结构填充的方法和系统。在一个实施例中，在晶片中填充沟槽的方法包括使用离子束相对于沟槽的侧壁以一定角度执行定向等离子体处理，以形成侧壁的处理部分和沟槽的未处理底部。材料沉积在沟槽中。材料在侧壁的处理部分上的沉积速率不同于沟槽的未处理底部上的第二沉积速率。在一个实施例中，一种方法包括在晶片上沉积材料，填充沟槽的底部并在沟槽的侧壁上形成层，以及邻近沟槽的顶表面。该方法包括用相对于侧壁成一定角度的离子束蚀刻该层。

73. 发明授权

US08741775B2 Method of patterning a low-K dielectric film 有权
标题翻译：图案化低K电介质膜的方法
公开(公告)号：US08741775B2
公开(公告)日：2014-06-03
申请号：US13187224
申请日：2011-07-20
申请人： Srinivas D. Nemani , Yifeng Zhou , Dmitry Lubomirsky , Ellie Yieh
发明人： Srinivas D. Nemani , Yifeng Zhou , Dmitry Lubomirsky , Ellie Yieh
IPC分类号： H01L21/3105
CPC分类号： H01L21/3105 , H01L21/02126 , H01L21/02203 , H01L21/31116 , H01L21/31138 , H01L21/31144
摘要： Methods of patterning low-k dielectric films are described. For example, a method includes forming and patterning a mask layer above a low-k dielectric layer, the low-k dielectric layer disposed above a substrate. Exposed portions of the low-k dielectric layer are modified with a plasma process. The modified portions of the low-k dielectric layer are removed selective to the mask layer and unmodified portions of the low-k dielectric layer.
摘要翻译：描述了低k介电膜图案的方法。例如，一种方法包括在低k电介质层之上形成和图案化掩模层，低k电介质层设置在衬底之上。低等离子体介质层的露出部分用等离子体工艺进行改性。低k电介质层的修改部分被选择性地去除低k电介质层的掩模层和未修饰部分。

74. 发明申请

US20070132054A1 MEMORY CELL HAVING STRESSED LAYERS 失效
标题翻译：具有压力层的记忆体
公开(公告)号：US20070132054A1
公开(公告)日：2007-06-14
申请号：US11609851
申请日：2006-12-12
申请人： Reza Arghavani , Ellie Yieh , Hichem M'Saad
发明人： Reza Arghavani , Ellie Yieh , Hichem M'Saad
IPC分类号： H01L29/00
CPC分类号： H01L29/7846 , H01L27/105 , H01L27/1052 , H01L29/66825 , H01L29/7883
摘要： A memory cell comprises a p-doped substrate with a pair of spaced apart n-doped regions on the substrate that form a source and drain about the channel. A stack of layers on the channel comprises, in sequence, (i) a tunnel oxide layer, (ii) a floating gate, (iii) an inter-gate dielectric, and (iv) a control gate. A polysilicon layer is on the source and drain. A cover layer covering the stack of layers comprises a spacer layer and a pre-metal-deposition layer. Optionally, contacts are used to contact each of the source, drain, and silicide layers, and each have exposed portions. A shallow isolation trench is provided about n-doped regions, the trench comprising a stressed silicon oxide layer having a tensile stress of at least about 200 MPa. The stressed layer reduces leakage of charge held in the floating gate during operation of the memory cell.
摘要翻译：存储单元包括在基板上具有一对间隔开的n掺杂区域的p掺杂衬底，其在沟道周围形成源极和漏极。通道上的层叠层包括（i）隧道氧化物层，（ii）浮动栅极，（iii）栅极间电介质和（iv）控制栅极。源极和漏极上的多晶硅层。覆盖层叠层的覆盖层包括间隔层和预金属沉积层。可选地，使用触点来接触源极，漏极和硅化物层中的每一个，并且每个都具有暴露部分。围绕n掺杂区域提供浅的隔离沟槽，沟槽包括具有至少约200MPa的拉伸应力的应力氧化硅层。应力层在存储器单元的操作期间减少了保持在浮动栅极中的电荷的泄漏。

75. 发明申请

US20060144334A1 Method and apparatus for deposition of low dielectric constant materials 审中-公开
公开(公告)号：US20060144334A1
公开(公告)日：2006-07-06
申请号：US11369689
申请日：2006-03-07
申请人： Kang Yim , Soovo Sen , Dian Sugiarto , Peter Lee , Ellie Yieh
发明人： Kang Yim , Soovo Sen , Dian Sugiarto , Peter Lee , Ellie Yieh
IPC分类号： C23C16/00 , H01L21/20
CPC分类号： C23C16/45565 , C23C16/5096 , H01J37/32082 , H01J37/3244
摘要： A showerhead adapted for distributing gases into a process chamber and a method for forming dielectric layers on a substrate are generally provided. In one embodiment, a showerhead for distributing gases in a processing chamber includes an annular body coupled between a disk and a mounting flange. The disk has a plurality of holes formed therethrough. A lip extends from a side of the disk opposite the annular body and away from the mounting flange. The showerhead may be used for the deposition of dielectric materials on a substrate. In one embodiment, silicon nitride and silicon oxide layers are formed on the substrate without removing the substrate from a processing chamber utilizing the showerhead of the present invention.

76. 发明授权

US08232176B2 Dielectric deposition and etch back processes for bottom up gapfill 有权
标题翻译：介质沉积和回填工艺，用于自下而上的间隙填充
公开(公告)号：US08232176B2
公开(公告)日：2012-07-31
申请号：US11765944
申请日：2007-06-20
申请人： Dmitry Lubomirsky , Srinivas D. Nemani , Ellie Yieh
发明人： Dmitry Lubomirsky , Srinivas D. Nemani , Ellie Yieh
IPC分类号： H01L21/762
CPC分类号： H01L21/76229
摘要： Methods to reduce film cracking in a dielectric layer are described. The methods may include the steps of depositing a first dielectric film on a substrate and removing a top portion of the first dielectric film by performing an etch on the film. The methods may also include depositing a second dielectric film over the etched first film, and removing a top portion of the second dielectric film. In addition, the methods may include annealing the first and second dielectric films to form the dielectric layer, where the removal of the top portions from the first and the second dielectric films reduces a stress level in the dielectric layer.
摘要翻译：描述了减少电介质层中的膜破裂的方法。所述方法可以包括以下步骤：在衬底上沉积第一电介质膜并通过对膜进行蚀刻来去除第一电介质膜的顶部。所述方法还可以包括在蚀刻的第一膜上沉积第二电介质膜，以及去除第二电介质膜的顶部。此外，所述方法可以包括退火第一和第二介电膜以形成电介质层，其中从第一和第二电介质膜去除顶部部分降低了介电层中的应力水平。

77. 发明授权

US07867923B2 High quality silicon oxide films by remote plasma CVD from disilane precursors 有权
标题翻译：通过远离等离子体CVD从乙硅烷前体获得高质量的氧化硅膜
公开(公告)号：US07867923B2
公开(公告)日：2011-01-11
申请号：US11876538
申请日：2007-10-22
申请人： Abhijit Basu Mallick , Srinivas D. Nemani , Ellie Yieh
发明人： Abhijit Basu Mallick , Srinivas D. Nemani , Ellie Yieh
IPC分类号： H01L21/02
CPC分类号： C23C16/345 , C23C16/452 , C23C16/56
摘要： A method of depositing a silicon and nitrogen containing film on a substrate. The method includes introducing silicon-containing precursor to a deposition chamber that contains the substrate, wherein the silicon-containing precursor comprises at least two silicon atoms. The method further includes generating at least one radical nitrogen precursor with a remote plasma system located outside the deposition chamber. Moreover, the method includes introducing the radical nitrogen precursor to the deposition chamber, wherein the radical nitrogen and silicon-containing precursors react and deposit the silicon and nitrogen containing film on the substrate. Furthermore, the method includes annealing the silicon and nitrogen containing film in a steam environment to form a silicon oxide film, wherein the steam environment includes water and acidic vapor.
摘要翻译：一种在衬底上沉积含硅和氮的膜的方法。该方法包括将含硅前体引入到包含基底的沉积室中，其中含硅前体包含至少两个硅原子。该方法还包括用位于沉积室外部的远程等离子体系统产生至少一种自由基氮前体。此外，该方法包括将自由基氮前体引入沉积室，其中自由基含氮和含硅前体将含硅和氮的膜反应并沉积在基底上。此外，该方法包括在蒸汽环境中退火含硅和氮的膜以形成氧化硅膜，其中蒸汽环境包括水和酸性蒸汽。

78. 发明申请

US20070289534A1 PROCESS CHAMBER FOR DIELECTRIC GAPFILL 审中-公开
标题翻译：电介质加工室
公开(公告)号：US20070289534A1
公开(公告)日：2007-12-20
申请号：US11754858
申请日：2007-05-29
申请人： Dmitry Lubomirsky , Qiwei Liang , Soonam Park , Kien Chuc , Ellie Yieh
发明人： Dmitry Lubomirsky , Qiwei Liang , Soonam Park , Kien Chuc , Ellie Yieh
IPC分类号： C23C16/452
CPC分类号： C23C16/46 , C23C16/452 , C23C16/45565 , C23C16/45574 , H01L21/67115
摘要： A system to form a dielectric layer on a substrate from a plasma of dielectric precursors is described. The system may include a deposition chamber, a substrate stage in the deposition chamber to hold the substrate, and a remote plasma generating system coupled to the deposition chamber, where the plasma generating system is used to generate a dielectric precursor having one or more reactive radicals. The system may also include a radiative heating system to heat the substrate that includes at least one light source, where at least some of the light emitted from the light source travels through the top side of the deposition chamber before reaching the substrate. The system may also include a precursor distribution system to introduce the reactive radical precursor and additional dielectric precursors to the deposition chamber. An in-situ plasma generating system may also be included to generate the plasma in the deposition chamber from the dielectric precursors supplied to the deposition chamber.
摘要翻译：描述了从电介质前体的等离子体在衬底上形成电介质层的系统。该系统可以包括沉积室，用于保持衬底的沉积室中的衬底台和耦合到沉积室的远程等离子体生成系统，其中等离子体产生系统用于产生具有一个或多个反应性基团的电介质前体。该系统还可以包括辐射加热系统以加热包括至少一个光源的基板，其中从光源发射的至少一些光在到达基板之前穿过沉积室的顶侧。该系统还可以包括将反应性基团前体和另外的电介质前体引入沉积室的前体分配系统。还可以包括原位等离子体产生系统，以从沉积室中提供的电介质前体在沉积室中产生等离子体。

79. 发明申请

US20070277734A1 PROCESS CHAMBER FOR DIELECTRIC GAPFILL 审中-公开
标题翻译：电介质加工室
公开(公告)号：US20070277734A1
公开(公告)日：2007-12-06
申请号：US11754916
申请日：2007-05-29
申请人： Dmitry Lubomirsky , Qiwei Liang , Soonam Park , Kien Chuc , Ellie Yieh
发明人： Dmitry Lubomirsky , Qiwei Liang , Soonam Park , Kien Chuc , Ellie Yieh
IPC分类号： C23C16/00
CPC分类号： C23C16/45565 , C23C16/402 , C23C16/45574 , C23C16/505
摘要： A system to form a dielectric layer on a substrate from a plasma of dielectric precursors is described. The system may include a deposition chamber, a substrate stage in the deposition chamber to hold the substrate, and a remote plasma generating system coupled to the deposition chamber, where the plasma generating system is used to generate a dielectric precursor having one or more reactive radicals. The system may also include a precursor distribution system comprising a dual-channel showerhead positioned above the substrate stage. The showerhead may have a faceplate with a first set of openings through which the reactive radical precursor enters the deposition chamber, and a second set of openings through which a second dielectric precursor enters the deposition chamber. An in-situ plasma generating system may also be included to generate the plasma in the deposition chamber from the dielectric precursors supplied to the deposition chamber.
摘要翻译：描述了从电介质前体的等离子体在衬底上形成电介质层的系统。该系统可以包括沉积室，用于保持衬底的沉积室中的衬底台和耦合到沉积室的远程等离子体生成系统，其中等离子体产生系统用于产生具有一个或多个反应性基团的电介质前体。该系统还可以包括前体分配系统，其包括位于衬底台上方的双通道喷头。喷头可以具有面板，其具有第一组开口，反应性自由基前体通过该开口进入沉积室，以及第二组开口，第二介电体前体通过该开口进入沉积室。还可以包括原位等离子体产生系统，以从沉积室中提供的电介质前体在沉积室中产生等离子体。

80. 发明申请

US20070212850A1 GAP-FILL DEPOSITIONS IN THE FORMATION OF SILICON CONTAINING DIELECTRIC MATERIALS 审中-公开
标题翻译：形成含硅介质材料的GAP填充沉积
公开(公告)号：US20070212850A1
公开(公告)日：2007-09-13
申请号：US11686863
申请日：2007-03-15
申请人： Nitin Ingle , Sidharth Bhatia , Won Bang , Zheng Yuan , Ellie Yieh , Shankar Venkatraman
发明人： Nitin Ingle , Sidharth Bhatia , Won Bang , Zheng Yuan , Ellie Yieh , Shankar Venkatraman
IPC分类号： H01L21/762
CPC分类号： C23C16/045 , C23C16/402 , C23C16/448 , C23C16/52 , H01L21/02164 , H01L21/02271 , H01L21/02274 , H01L21/02337 , H01L21/31612 , H01L21/76224 , H01L21/76837
摘要： A chemical vapor deposition method for forming a dielectric material in a trench formed on a substrate, where the method includes the steps of generating water vapor by contacting hydrogen gas and oxygen gas with a water vapor generation catalyst, and providing the water vapor to the process chamber. The method also includes flowing a silicon-containing precursor into the process chamber housing the substrate, flowing an oxidizing gas into the chamber, and causing a reaction between the silicon-containing precursor, the oxidizing gas and the water vapor to form the dielectric material in the trench. The method may also include increasing over time a ratio of the silicon-containing precursor to the oxidizing gas flowed into the chamber to alter a rate of deposition of the dielectric material.
摘要翻译：一种用于在形成在衬底上的沟槽中形成电介质材料的化学气相沉积方法，其中所述方法包括通过使氢气和氧气与水蒸汽发生催化剂接触而产生水蒸气的步骤，并将水蒸汽提供给该过程房间。该方法还包括将含硅前体流入容纳基底的处理室，使氧化气体流入室内，并使含硅前体，氧化气体和水蒸汽之间的反应形成为沟渠。该方法还可以包括随着时间的推移，含硅前体与氧化气体的比例流入室以改变电介质材料的沉积速率。

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