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71. 发明授权

US07915120B2 Method of fabricating non-volatile memory device 有权
标题翻译：制造非易失性存储器件的方法
公开(公告)号：US07915120B2
公开(公告)日：2011-03-29
申请号：US12432187
申请日：2009-04-29
申请人： Jung-Woo Park , Jin-Ki Jung , Kwon Hong , Ki-Seon Park
发明人： Jung-Woo Park , Jin-Ki Jung , Kwon Hong , Ki-Seon Park
IPC分类号： H01L21/336
CPC分类号： H01L27/11519 , H01L27/11521
摘要： Provided is a method of fabricating a non-volatile semiconductor device. The method includes: forming a first hard mask layer over a substrate; etching the first hard mask layer and the substrate to form a plurality of isolation trenches extending in parallel to one another in a first direction; burying a dielectric layer in the isolation trenches to form a isolation layer; forming a plurality of floating gate mask patterns extending in parallel to one another in a second direction intersecting with the first direction over a resulting structure where the isolation layer is formed; etching the first hard mask layer by using the floating gate mask patterns as an etch barrier to form a plurality of island-shaped floating gate electrode trenches; and burying a conductive layer in the floating gate electrode trenches to form a plurality of island-shaped floating gate electrodes.
摘要翻译：提供一种制造非易失性半导体器件的方法。该方法包括：在衬底上形成第一硬掩模层; 蚀刻第一硬掩模层和衬底以形成在第一方向上彼此平行延伸的多个隔离沟槽; 在隔离沟槽中埋置介电层以形成隔离层; 在形成所述隔离层的结果上形成在与所述第一方向相交的第二方向上彼此平行延伸的多个浮栅掩模图案; 通过使用浮栅掩模图案作为蚀刻势垒来蚀刻第一硬掩模层，以形成多个岛状浮栅电极沟槽; 并在所述浮栅电极沟槽中埋设导电层以形成多个岛状浮栅。

72. 发明申请

US20100317166A1 METHOD FOR FABRICATING VERTICAL CHANNEL TYPE NONVOLATILE MEMORY DEVICE 有权
标题翻译：用于制造垂直通道型非易失性存储器件的方法
公开(公告)号：US20100317166A1
公开(公告)日：2010-12-16
申请号：US12493439
申请日：2009-06-29
申请人： Ki-Hong Lee , Moon-Sig Joo , Kwon Hong , Sun-Hwan Hwang
发明人： Ki-Hong Lee , Moon-Sig Joo , Kwon Hong , Sun-Hwan Hwang
IPC分类号： H01L21/336
CPC分类号： H01L29/66833 , H01L21/2236 , H01L27/11578 , H01L27/11582
摘要： A method for fabricating a vertical channel type nonvolatile memory device includes: stacking a plurality of interlayer insulating layers and a plurality of gate electrode conductive layers alternately over a substrate; etching the interlayer insulating layers and the gate electrode conductive layers to form a channel trench exposing the substrate; forming an undoped first channel layer over the resulting structure including the channel trench; doping the first channel layer with impurities through a plasma doping process; and filling the channel trench with a second channel layer.
摘要翻译：一种用于制造垂直通道型非易失性存储器件的方法，包括：在衬底上交替堆叠多个层间绝缘层和多个栅电极导电层; 蚀刻层间绝缘层和栅电极导电层以形成暴露衬底的沟槽; 在包括沟道沟槽的所得结构上形成未掺杂的第一沟道层; 通过等离子体掺杂工艺对具有杂质的第一沟道层进行掺杂; 以及用第二通道层填充沟槽。

73. 发明授权

US07846797B2 Tunnel insulating layer of flash memory device and method of forming the same 失效
标题翻译：闪存器件的隧道绝缘层及其形成方法
公开(公告)号：US07846797B2
公开(公告)日：2010-12-07
申请号：US12345617
申请日：2008-12-29
申请人： Kwon Hong
发明人： Kwon Hong
IPC分类号： H01L21/336
CPC分类号： H01L29/513 , H01L21/28273 , H01L21/3144
摘要： The present invention discloses a tunnel insulating layer in a flash memory device and a method of forming the same, the method according to the present invention comprises the steps of forming a first oxide layer on a semiconductor substrate through a first oxidation process; forming a nitride layer on an interface between the semiconductor substrate and the first oxide layer through a first nitridation process; forming a second nitride layer on the first oxide layer through a second nitridation process; forming a second oxide layer on the second nitride layer through a second oxidation process; and forming a third nitride layer on the second oxide layer through a third nitridation process.
摘要翻译：本发明公开了闪速存储器件中的隧道绝缘层及其形成方法，根据本发明的方法包括以下步骤：通过第一氧化工艺在半导体衬底上形成第一氧化物层; 通过第一氮化工艺在所述半导体衬底和所述第一氧化物层之间的界面上形成氮化物层; 通过第二氮化工艺在所述第一氧化物层上形成第二氮化物层; 通过第二氧化工艺在所述第二氮化物层上形成第二氧化物层; 以及通过第三次氮化处理在所述第二氧化物层上形成第三氮化物层。

74. 发明授权

US07838364B2 Semiconductor device with bulb-type recessed channel and method for fabricating the same 有权
标题翻译：具有灯泡型凹槽的半导体器件及其制造方法
公开(公告)号：US07838364B2
公开(公告)日：2010-11-23
申请号：US11862453
申请日：2007-09-27
申请人： Yong-Soo Kim , Hong-Seon Yang , Se-Aug Jang , Seung-Ho Pyi , Kwon Hong , Heung-Jae Cho , Kwan-Yong Lim , Min-Gyu Sung , Seung-Ryong Lee , Tae-Yoon Kim
发明人： Yong-Soo Kim , Hong-Seon Yang , Se-Aug Jang , Seung-Ho Pyi , Kwon Hong , Heung-Jae Cho , Kwan-Yong Lim , Min-Gyu Sung , Seung-Ryong Lee , Tae-Yoon Kim
IPC分类号： H01L21/336
CPC分类号： H01L29/66553 , H01L27/10876 , H01L29/518 , H01L29/66621
摘要： A method for fabricating a semiconductor device includes providing a substrate having a bulb-type recessed region, forming a gate insulating layer over the bulb-type recessed region and the substrate, and forming a gate conductive layer over the gate insulating layer. The gate conductive layer fills the bulb-type recessed region. The gate conductive layer includes two or more conductive layers and a discontinuous interface between the conductive layers.
摘要翻译：一种制造半导体器件的方法，包括提供具有灯泡型凹陷区域的衬底，在灯泡型凹陷区域上形成栅极绝缘层和衬底，并在栅极绝缘层上形成栅极导电层。栅极导电层填充灯泡型凹陷区域。栅极导电层包括两个或多个导电层和导电层之间的不连续界面。

75. 发明申请

US20100283096A1 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100283096A1
公开(公告)日：2010-11-11
申请号：US12640491
申请日：2009-12-17
申请人： Sung-Jin Whang , Moon-Sig Joo , Kwon Hong , Jung-Yeon Lim , Won-Kyu Kim , Bo-Min Seo , Kyoung-Eun Chang
发明人： Sung-Jin Whang , Moon-Sig Joo , Kwon Hong , Jung-Yeon Lim , Won-Kyu Kim , Bo-Min Seo , Kyoung-Eun Chang
IPC分类号： H01L29/792 , H01L23/48 , H01L21/768
CPC分类号： H01L21/28518 , H01L21/28273 , H01L21/28282 , H01L21/321 , H01L21/7685 , H01L24/02 , H01L27/10873 , H01L29/413 , H01L29/42324 , H01L29/513 , H01L29/7881 , H01L2224/0401 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01022 , H01L2924/01027 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/04941 , H01L2924/12032 , H01L2924/00
摘要： A semiconductor device including a conductive layer, a diffusion barrier layer formed over the conductive layer, including a refractory metal compound, and acquired after a surface treatment, and a metal silicide layer formed over the diffusion barrier layer. The adhesion between a diffusion barrier layer and a metal silicide layer may be improved by increasing the surface energy of the diffusion barrier layer through a surface treatment. Therefore, although the metal silicide layer is fused in a high-temperature process, it is possible to prevent a void from being caused at the interface between the diffusion barrier layer and the metal silicide layer. Moreover, it is possible to increase the adhesion between a conductive layer and the diffusion barrier layer by increasing the surface energy of the conductive layer through the surface treatment.
摘要翻译：一种半导体器件，包括导电层，形成在导电层上的扩散阻挡层，包括难熔金属化合物，并在表面处理之后获得，以及形成在扩散阻挡层上的金属硅化物层。通过表面处理增加扩散阻挡层的表面能，可以改善扩散阻挡层和金属硅化物层之间的粘合性。因此，尽管金属硅化物层在高温工艺中熔合，但是可以防止在扩散阻挡层和金属硅化物层之间的界面处产生空隙。此外，通过表面处理增加导电层的表面能，可以增加导电层与扩散阻挡层之间的粘合性。

76. 发明申请

US20100181611A1 DIELECTRIC STRUCTURE IN NONVOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME 失效
标题翻译：非易失存储器件中的电介质结构及其制造方法
公开(公告)号：US20100181611A1
公开(公告)日：2010-07-22
申请号：US12748967
申请日：2010-03-29
申请人： Kwon Hong , Kwan-Yong Lim
发明人： Kwon Hong , Kwan-Yong Lim
IPC分类号： H01L29/788
CPC分类号： H01L21/28273 , H01L29/513 , H01L29/7881
摘要： A dielectric structure in a nonvolatile memory device and a method for fabricating the same are provided. The dielectric structure includes: a first oxide layer; a first high-k dielectric film formed on the first oxide layer, wherein the first high-k dielectric film includes one selected from materials with a dielectric constant of approximately 9 or higher and a compound of at least two of the materials; and a second oxide layer formed on the first high-k dielectric film.
摘要翻译：提供了一种非易失性存储器件中的电介质结构及其制造方法。介电结构包括：第一氧化物层; 形成在所述第一氧化物层上的第一高k电介质膜，其中所述第一高k电介质膜包括介电常数约为9或更高的材料和至少两种所述材料的化合物中的一种; 以及形成在第一高k电介质膜上的第二氧化物层。

77. 发明申请

US20070166921A1 FLASH MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
公开(公告)号：US20070166921A1
公开(公告)日：2007-07-19
申请号：US11479051
申请日：2006-06-30
申请人： Kwon Hong , Eun Shil Park , Min Sik Jang
发明人： Kwon Hong , Eun Shil Park , Min Sik Jang
IPC分类号： H01L21/336
CPC分类号： H01L21/28273 , H01L29/513 , H01L29/7881
摘要： A non-volatile memory device has a gate dielectric film formed between a floating gate and a control gate. The gate dielectric film is formed by forming an oxide film and a ZrO2/Al2O3/ZrO2 (ZAZ) film. Accordingly, the reliability of non-volatile memory devices can be improved while securing a high coupling ratio.

78. 发明申请

US20060225301A1 Apparatus and method for controlling washing/drying system 有权
公开(公告)号：US20060225301A1
公开(公告)日：2006-10-12
申请号：US11450398
申请日：2006-06-12
申请人： Jae Lyu , Seong Jo , Deug Lee , Kwon Hong , Byung Ahn
发明人： Jae Lyu , Seong Jo , Deug Lee , Kwon Hong , Byung Ahn
IPC分类号： F26B11/02
CPC分类号： D06F29/00 , D06F29/005 , D06F33/02 , D06F39/005 , D06F58/28 , D06F2058/2883 , D06F2210/00
摘要： Provided is an apparatus and method for controlling a washing/drying system including a washing machine and a dryer used in one pair. Since the washing machine can communicate with the dryer according to a wireless communication regulation, the dryer can operate more conveniently. According to the apparatus and method, convenience in using the washing machine and the dryer together is further enhanced.

79. 发明申请

US20060141702A1 Method for depositing titanium oxide layer and method for fabricating capacitor by using the same 审中-公开
标题翻译：氧化钛层的沉积方法及其制造方法
公开(公告)号：US20060141702A1
公开(公告)日：2006-06-29
申请号：US11150421
申请日：2005-06-09
申请人： Hyun-Kyung Woo , Seung-Jin Yeom , Deok-Sin Kil , Kwon Hong
发明人： Hyun-Kyung Woo , Seung-Jin Yeom , Deok-Sin Kil , Kwon Hong
IPC分类号： H01L21/8242 , H01L21/20 , H01L21/44
CPC分类号： H01L28/91 , H01L21/02381 , H01L21/02395 , H01L21/02565 , H01L21/02614 , H01L21/02617 , H01L27/10817 , H01L27/10852 , H01L28/65
摘要： Disclosed are a method for depositing a titanium oxide (TiO2) layer and a method for fabricating a capacitor by using the same. The method for forming the TiO2 layer includes the steps of: a) adsorbing titanium hydride (TiH2) on a wafer loaded into a chamber by supplying TiH2 to the chamber; b) purging out the non-adsorbed TiH2; c) forming an TiO2 layer on the wafer by inducing a reaction between the TiH2 and the oxygen source with supplying an oxygen source as a reaction gas to the chamber; and d) purging out the non-reacted oxygen source and a by-product. The method for fabricating the capacitor includes the steps of: forming a lower electrode on a wafer; depositing a titanium oxide (TiO2) layer on the lower electrode by using titanium hydride (TiH2) as a precursor; and forming an upper electrode on the TiO2 layer.
摘要翻译：公开了一种用于沉积氧化钛（TiO 2）层的方法及其制造方法。形成TiO 2层的方法包括以下步骤：a）通过提供TiH 2，将负载在室中的晶片上的钛氢化物（TiH 2 H 2）吸附在室中到房间; b）清除未吸附的TiH 2 O 2; c）通过在所述室中提供氧源作为反应气体而引起TiH 2 2和氧源之间的反应，在晶片上形成TiO 2层; 以及d）清除未反应的氧源和副产物。制造电容器的方法包括以下步骤：在晶片上形成下电极; 通过使用氢化钛（TiH 2 N 2）作为前体，在下电极上沉积氧化钛（TiO 2）层; 并在TiO 2层上形成上电极。

80. 发明授权

US06605538B2 Methods for forming ferroelectric capacitors 失效
标题翻译：形成铁电电容器的方法
公开(公告)号：US06605538B2
公开(公告)日：2003-08-12
申请号：US09221621
申请日：1998-12-28
申请人： Kwon Hong
发明人： Kwon Hong
IPC分类号： H01L2100
CPC分类号： H01L28/56 , H01L21/31641 , H01L28/57
摘要： Provided are methods for forming ferroelectric capacitors, which prevent decreasing ferroelectric characteristics due to the reaction of a ferroelectric layer with hydroxyl group induced from a inter-layer insulating film which will be formed and contacted with the ferroelectric layer after the formation of the ferroelectric capacitor. After a ferroelectric film such as Pb(Zr,Ti)O3 (PZT) is formed, a ZrO2 film, which is insulator and excellent in diffusion barrier characteristics, is formed so as to enclose the entire ferroelectric layer in order to prevent the damage generated by the reaction. The characteristics of the ferroelectric capacitor are enhanced by the invention.
摘要翻译：提供了形成铁电电容器的方法，其防止了在形成铁电电容器之后将形成并与铁电层接触的层间绝缘膜引起的铁电层与羟基反应的铁电特性降低。在形成诸如Pb（Zr，Ti）O 3（PZT）的铁电体膜之后，形成绝缘体并具有优异的扩散阻挡特性的ZrO 2膜，以便包围整个铁电层，以防止产生的损伤通过反应。本发明增强了铁电电容器的特性。

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