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71. 发明申请

US20090323387A1 One-Time Programmable Memory and Operating Method Thereof 有权
标题翻译：一次性可编程存储器及其操作方法
公开(公告)号：US20090323387A1
公开(公告)日：2009-12-31
申请号：US12146753
申请日：2008-06-26
申请人： Chrong-Jung Lin , Ya-Chin King
发明人： Chrong-Jung Lin , Ya-Chin King
IPC分类号： G11C17/00 , H01L29/76 , G11C7/00
CPC分类号： H01L29/4983 , H01L27/112 , H01L27/11206 , H01L27/11226
摘要： A one-time programmable memory cell is provided, the one-time programmable memory cell comprises: a gate dielectric layer disposed on a well; a gate electrode disposed on the gate dielectric layer; source/drain regions disposed in the well at the sides of the gate electrode, respectively; a first salicide layer disposed on one of the source/drain regions; a capacitive dielectric layer disposed on the gate electrode and the other of the source/drain regions; a first conductive plug disposed on the first salicide layer; and a second conductive plug disposed on the capacitive dielectric layer. The size of the first conductive plug is different form the size of the second conductive plug.
摘要翻译：提供一次性可编程存储单元，一次性可编程存储单元包括：设置在阱上的栅介质层; 设置在所述栅极介电层上的栅电极; 源极/漏极区域分别设置在栅电极的侧面的阱中; 设置在所述源极/漏极区域之一上的第一自对准硅化物层; 设置在所述栅极电极和所述源极/漏极区域中的另一个之间的电容性介电层; 设置在所述第一自对准硅化物层上的第一导电插塞; 以及设置在所述电容电介质层上的第二导电插塞。第一导电插头的尺寸与第二导电插头的尺寸不同。

72. 发明申请

US20090289920A1 OPTICAL REFLECTED TOUCH PANEL AND PIXELS AND SYSTEM THEREOF 有权
标题翻译：光学反射面板及其像素及其系统
公开(公告)号：US20090289920A1
公开(公告)日：2009-11-26
申请号：US12465666
申请日：2009-05-14
申请人： Wen-Jen Chiang , An-Thung Cho , Chrong-Jung Lin , Chia-Tien Peng , Ya-Chin King , Kun-Chih Lin , Chih-Wei Chao , Chien-Sen Weng , Feng-Yuan Gan
发明人： Wen-Jen Chiang , An-Thung Cho , Chrong-Jung Lin , Chia-Tien Peng , Ya-Chin King , Kun-Chih Lin , Chih-Wei Chao , Chien-Sen Weng , Feng-Yuan Gan
IPC分类号： G06F3/042
CPC分类号： G06F3/0412 , G06F3/0421
摘要： An optical reflective touch panel and pixels and a system thereof are provided. Each pixel of the optical reflective touch panel includes a display circuit and a sensing circuit. The display circuit controls the display of the pixel. The sensing circuit is coupled to the display circuit for sensing a sensitization state of the pixel during a turned-on period and a turned-off period of a backlight module and outputting a digital signal to notify an optical reflective touch panel system that whether the pixel is touched or not.
摘要翻译：提供光反射式触摸面板及其像素及其系统。光反射式触摸面板的每个像素包括显示电路和感测电路。显示电路控制像素的显示。感测电路耦合到显示电路，用于在背光模块的导通周期和关闭周期期间感测像素的感光状态，并输出数字信号以通知光反射式触摸面板系统，该像素是否是像素是否被触动

73. 发明申请

US20090283814A1 SINGLE-POLY NON-VOLATILE MEMORY CELL 审中-公开
标题翻译：单波非易失性存储器单元
公开(公告)号：US20090283814A1
公开(公告)日：2009-11-19
申请号：US12122739
申请日：2008-05-19
申请人： Hsin-Ming Chen , Shao-Chang Huang , Shih-Chen Wang , Wen-Hao Ching , Chrong-Jung Lin
发明人： Hsin-Ming Chen , Shao-Chang Huang , Shih-Chen Wang , Wen-Hao Ching , Chrong-Jung Lin
IPC分类号： H01L27/112
CPC分类号： H01L27/112 , G11C17/16 , H01L23/5256 , H01L27/11206 , H01L2924/0002 , H01L2924/00
摘要： A non-volatile memory cell includes an ion well of a semiconductor substrate; a first half-transistor having a firs select gate, a first diffusion region in the ion well, and a first gate dielectric layer between the first select gate and the ion well; a second half-transistor disposed adjacent to the first half-transistor, wherein the second half-transistor has a second select gate spaced apart from the first select gate, a second diffusion region in the ion well, and a second gate dielectric layer between the second select gate and the ion well. The first and second half-transistors are mirror-symmetrical to each other.
摘要翻译：非易失性存储单元包括半导体衬底的离子阱; 具有第一选择栅极的第一半晶体管，离子阱中的第一扩散区域和第一选择栅极与离子阱之间的第一栅极介电层; 与所述第一半晶体管相邻设置的第二半晶体管，其中所述第二半晶体管具有与所述第一选择栅极间隔开的第二选择栅极，所述离子阱中的第二扩散区域和所述第二栅极介电层之间的第二栅极介电层第二选择门和离子阱。第一和第二半晶体管彼此镜像对称。

74. 发明申请

US20090283772A1 PHOTO SENSITIVE UNIT AND PIXEL STRUCTURE AND LIQUID CRYSTAL DISPLAY PANEL HAVING THE SAME 审中-公开
标题翻译：照片敏感单元和像素结构和液晶显示面板
公开(公告)号：US20090283772A1
公开(公告)日：2009-11-19
申请号：US12405992
申请日：2009-03-17
申请人： An-Thung Cho , Wen-Jen Chiang , Chia-Tien Peng , Chrong-Jung Lin , Kun-Chih Lin , Ya-Chin King , Chih-Wei Chao , Feng-Yuan Gan
发明人： An-Thung Cho , Wen-Jen Chiang , Chia-Tien Peng , Chrong-Jung Lin , Kun-Chih Lin , Ya-Chin King , Chih-Wei Chao , Feng-Yuan Gan
IPC分类号： H01L33/00
CPC分类号： H01L27/1446 , H01L27/1214 , H01L31/153
摘要： A pixel structure suitable for being disposed on a substrate is provided. The pixel structure includes a display unit and a photo sensitive unit. The display unit includes an active device and a pixel electrode. The active device is disposed on the substrate, and the pixel electrode is electrically connected to the active device. The photo sensitive unit includes a photocurrent readout unit, a shielding electrode, a photosensitive dielectric layer, and a transparent electrode. The shielding electrode is electrically connected to the photocurrent readout unit, and the photosensitive dielectric layer is disposed on the shielding electrode. The transparent electrode is disposed on the photosensitive dielectric layer that is interposed between the shielding electrode and the transparent electrode.
摘要翻译：提供适合于设置在基板上的像素结构。像素结构包括显示单元和光敏单元。显示单元包括有源器件和像素电极。有源器件设置在衬底上，并且像素电极电连接到有源器件。光敏单元包括光电流读出单元，屏蔽电极，光敏介电层和透明电极。屏蔽电极电连接到光电流读出单元，并且光敏介电层设置在屏蔽电极上。透明电极设置在介于屏蔽电极和透明电极之间的光敏电介质层上。

75. 发明申请

US20070297224A1 MOS based nonvolatile memory cell and method of operating the same 审中-公开
标题翻译：基于MOS的非易失性存储单元及其操作方法
公开(公告)号：US20070297224A1
公开(公告)日：2007-12-27
申请号：US11475114
申请日：2006-06-27
申请人： Ya-Chin King , Chrong-Jung Lin
发明人： Ya-Chin King , Chrong-Jung Lin
IPC分类号： G11C16/06 , G11C16/04 , G11C11/34
CPC分类号： G11C16/0475 , G11C16/0425 , G11C16/10 , H01L29/42348 , H01L29/7923
摘要： A non-volatile memory cell formed on a sidewall of MOS transistor and method of operating the same are disclosed. The MOS based non-volatile memory cell is formed in the n-well and compatible with CMOS processes comprising a selecting gate, two ONO spacers, a p+ source/drain, and a p extended source region and an n extended drain. To program the cell, two strategies can be taken: (1) a band to band hot electron injection can be carried out and (2) channel hot hole induced hot electron injection. To read the nonvolatile cell, a reverse read is taken. In the reading process, the biased on the selecting gate has to make sure form a channel beneath selecting gate having its narrower end contacting with a the depletion boundary due to a reverse bias exerted on the source and n-well body so that if the cell stored with electron therein, a hole current flowing from the drain to the source can be read. To erase the datum in the cell, two approaching can be carried out. One is by FN erase, the other is by band to band induced hot hole injection.
摘要翻译：公开了一种形成在MOS晶体管的侧壁上的非易失性存储单元及其操作方法。基于MOS的非易失性存储单元形成在n阱中并且与包括选择栅极，两个ONO间隔物，p +源极/漏极以及p扩展源极区域和n个延伸漏极的CMOS工艺兼容。为了对电池进行编程，可以采取两种策略：（1）可以进行带带热电子注入，（2）通道热孔诱导热电子注入。要读取非易失性单元，进行反向读取。在读取过程中，由于施加在源极和n阱体上的反向偏压，选择栅极上的偏置必须确保形成其选择栅极之下的通道，其中窄栅极具有与耗尽边界接触的较窄端，使得如果电池与其中的电子一起存储，可以读取从漏极流到源极的空穴电流。要擦除单元格中的基准，可以进行两次逼近。一种是通过FN擦除，另一种是通过频带带诱导热空穴注入。

76. 发明申请

US20070272974A1 TWIN-GATE NON-VOLATILE MEMORY CELL AND METHOD OF OPERATING THE SAME 审中-公开
标题翻译：双门非易失性存储器单元及其操作方法
公开(公告)号：US20070272974A1
公开(公告)日：2007-11-29
申请号：US11752250
申请日：2007-05-22
申请人： Ya-Chin King , Chrong-Jung Lin , Hsin-Ming Chen
发明人： Ya-Chin King , Chrong-Jung Lin , Hsin-Ming Chen
IPC分类号： H01L29/792
CPC分类号： H01L29/7923 , H01L27/115 , H01L27/11568 , H01L29/4234 , H01L29/66833
摘要： A non-volatile memory cell with twin gates formed on an N-well is provided. The non-volatile memory cell includes at least a first gate, a second gate, a pair of NO (Nitride/Oxide) spacer layers, a pair of ONO (Oxide/Nitride/Oxide) spacers, a source, a drain, an extension source and an extension drain. The NO spacer layers are formed at the inner sidewalls of the first gate and the second gate to form a U-shape spacer for storing one bit of data. The ONO spacers are formed at the outer sidewalls of the first gate and the second gate. The source and drain and the extension source and the extension drain have P-type impurity dopants.
摘要翻译：提供了形成在N阱上的具有双门的非易失性存储单元。非易失性存储单元包括至少第一栅极，第二栅极，一对NO（氮化物/氧化物）间隔层，一对ONO（氧化物/氮化物/氧化物）间隔物，源极，漏极，延伸部源和延伸流失。 NO间隔层形成在第一栅极和第二栅极的内侧壁处，以形成用于存储一位数据的U形间隔物。 ONO间隔件形成在第一栅极和第二栅极的外侧壁处。源极和漏极以及扩展源和扩展漏极具有P型杂质掺杂物。

77. 发明申请

US20050026368A1 Method of making the selection gate in a split-gate flash EEPROM cell its and structure 失效
标题翻译：在分闸器快闪EEPROM单元中选择栅极的方法和结构
公开(公告)号：US20050026368A1
公开(公告)日：2005-02-03
申请号：US10929397
申请日：2004-08-31
申请人： Wen-Ting Chu , Jack Yeh , Chrong-Jung Lin
发明人： Wen-Ting Chu , Jack Yeh , Chrong-Jung Lin
IPC分类号： H01L21/28 , H01L21/336 , H01L21/8247 , H01L27/115 , H01L29/423 , H01L29/788
CPC分类号： H01L27/11521 , H01L21/28273 , H01L27/115 , H01L29/42324 , H01L29/66553 , H01L29/7885
摘要： A method of making the selection gate in a split-gate flash EEPROM cell forms a selection gate on a trench sidewall of a semiconductor substrate to minimize the sidewise dimension of the selection gate and to maintain the channel length. The disclosed method includes the steps of: forming a trench on a semiconductor substrate on one side of a suspending gate structure; forming an inter polysilicon dielectric layer on the sidewall of the suspending gate structure and the trench; and forming a polysilicon spacer on the inter polysilicon dielectric layer as the selection gate. Such a split-gate flash EEPROM cell can produce ballistic hot electrons, improving the data writing efficiency and lowering the writing voltage.
摘要翻译：在分裂栅极快闪EEPROM单元中形成选择栅极的方法在半导体衬底的沟槽侧壁上形成选择栅极，以最小化选择栅极的侧向尺寸并保持沟道长度。所公开的方法包括以下步骤：在悬挂栅结构的一侧上的半导体衬底上形成沟槽; 在悬挂栅结构和沟槽的侧壁上形成多晶硅间介质层; 以及在多晶硅间介质层上形成多晶硅间隔物作为选择栅极。这种分裂栅极快速EEPROM电池可以产生弹道热电子，提高数据写入效率并降低写入电压。

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