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71. 发明授权

US06207582B1 Native oxide removal with fluorinated chemistry before cobalt silicide formation using nitride spacers 有权
标题翻译：在使用氮化物间隔物形成钴硅化物之前，使用氟化物进行原生氧化物去除
公开(公告)号：US06207582B1
公开(公告)日：2001-03-27
申请号：US09357767
申请日：1999-07-21
申请人： Jeffrey A. Shields , Bharath Rangarajan
发明人： Jeffrey A. Shields , Bharath Rangarajan
IPC分类号： H01L21301
CPC分类号： H01L29/665 , H01L21/28518 , H01L21/31116
摘要： A native oxide removal process utilizes a fluorinated plasma used in a sputter etch in order to remove the native oxide prior to a cobalt oxide formation process is initiated. The fluorinated plasma, such as CF4, is performed at between 50 to 100 volts bias on a substrate on which the native oxide is to be removed, and is performed in-situ. The fluorinated plasma provides both a chemical and a physical etching of the native oxide, without harming a gate oxide layer. The substrate is formed with nitride spacers and not oxide spacers, in order to lessen the possibility of any oxide being resputtered into the region in which the native oxide layer is being removed.
摘要翻译：自然氧化物去除方法利用溅射蚀刻中使用的氟化等离子体，以便在开始氧化钴形成过程之前除去天然氧化物。氟化等离子体，例如CF 4，在其上待除去天然氧化物的基底上的50至100伏偏压之间进行，并且原位进行。氟化等离子体对天然氧化物进行化学和物理蚀刻，而不会损害栅极氧化物层。衬底由氮化物间隔物而不是氧化物间隔物形成，以便减少任何氧化物被重新溅射到其中自然氧化物层被去除的区域中的可能性。

72. 发明授权

US06191046B1 Deposition of an oxide layer to facilitate photoresist rework on polygate layer 有权
标题翻译：沉积氧化物层以促进多晶硅层上的光致抗蚀剂返修
公开(公告)号：US06191046B1
公开(公告)日：2001-02-20
申请号：US09266362
申请日：1999-03-11
申请人： Bhanwar Singh , Sanjay K. Yedur , Bharath Rangarajan
发明人： Bhanwar Singh , Sanjay K. Yedur , Bharath Rangarajan
IPC分类号： H01L21302
CPC分类号： H01L21/31133 , H01L21/0276 , H01L21/0332 , H01L21/0337
摘要： A method of reworking a photoresist used to pattern a semiconductor structure is provided. A dielectric layer is formed over an anti-reflective coating, the anti-reflective coating covering a first underlayer, the first underlayer covering a second underlayer. A first photoresist layer is formed and patterened over the dielectric layer to yield a desired photoresist pattern. An undesired feature in the patterned first photoresist layer is determined. The patterned first photoresist layer is removed. A second photoresist layer is formed and patterned over the dielectric layer. Exposed portions of the dielectric layer, the anti-reflective coating and the first underlayer are etched. A thin photoresist layer is formed over exposed portions of the second underlayer. A CMP process is performed to remove the dielectric layer. The thin photoresist layer is stripped.
摘要翻译：提供了对用于图案化半导体结构的光致抗蚀剂进行返工的方法。在抗反射涂层上形成电介质层，抗反射涂层覆盖第一底层，第一底层覆盖第二底层。形成第一光致抗蚀剂层，并在电介质层上涂覆以产生所需的光致抗蚀剂图案。确定图案化的第一光致抗蚀剂层中的不期望的特征。去除图案化的第一光致抗蚀剂层。在介电层上形成并图案化第二光致抗蚀剂层。蚀刻介电层，抗反射涂层和第一底层的露出部分。在第二底层的暴露部分上形成薄的光致抗蚀剂层。执行CMP处理以去除电介质层。剥去薄的光致抗蚀剂层。

73. 发明授权

US6034771A System for uniformly heating photoresist 有权
标题翻译：光刻胶均匀加热系统
公开(公告)号：US6034771A
公开(公告)日：2000-03-07
申请号：US185981
申请日：1998-11-04
申请人： Bharath Rangarajan , Bhanwar Singh , Sanjay K. Yedur , Michael K. Templeton
发明人： Bharath Rangarajan , Bhanwar Singh , Sanjay K. Yedur , Michael K. Templeton
IPC分类号： G03F7/16 , G03F7/38 , G03F7/40 , G01B9/02
CPC分类号： G03F7/38 , G03F7/168 , G03F7/40
摘要： A system for regulating heating temperature of a material is provided. The material may be a photoresist, a top or bottom anti-reflective coating, a low K dielectric material, SOG or other spin-on material, for example. The system includes a plurality of optical fibers, each optical fiber directing radiation to respective portions of the material. Radiation reflected from the respective portions are collected by a measuring system which processes the collected radiation. The reflected radiation are indicative of the temperature of the respective portions of the material. The measuring system provides material temperature related data to a processor which determines the temperature of the respective portions of the material. The system also includes a plurality of heating devices; each heating device corresponds to a respective portion of the material and provides for the heating thereof. The processor selectively controls the heating devices so as to regulate temperature of the respective portions of the material.
摘要翻译：提供了用于调节材料的加热温度的系统。该材料可以是例如光致抗蚀剂，顶部或底部抗反射涂层，低K电介质材料，SOG或其它旋涂材料。该系统包括多个光纤，每个光纤将辐射引导到材料的相应部分。从相应部分反射的辐射由处理收集的辐射的测量系统收集。反射的辐射表示材料各部分的温度。测量系统将材料温度相关数据提供给确定材料各部分的温度的处理器。该系统还包括多个加热装置; 每个加热装置对应于材料的相应部分并提供其加热。处理器选择性地控制加热装置以便调节材料的各个部分的温度。

74. 发明授权

US07158896B1 Real time immersion medium control using scatterometry 失效
标题翻译：实时浸入介质控制采用散射法
公开(公告)号：US07158896B1
公开(公告)日：2007-01-02
申请号：US10978604
申请日：2004-11-01
申请人： Bhanwar Singh , Srikanteswara Dakshina-Murthy , Khoi A. Phan , Ramkumar Subramanian , Bharath Rangarajan , Iraj Emami
发明人： Bhanwar Singh , Srikanteswara Dakshina-Murthy , Khoi A. Phan , Ramkumar Subramanian , Bharath Rangarajan , Iraj Emami
IPC分类号： G06F19/00
CPC分类号： G03F7/70916 , G03F7/2041 , G03F7/70341
摘要： Systems and/or methods are disclosed for measuring and/or controlling an amount of impurity that is dissolved within an immersion medium employed with immersion lithography. The impurity can be photoresist from a photoresist layer coated upon a substrate surface. A known grating structure is built upon the substrate. A real time immersion medium monitoring component facilitates measuring and/or controlling the amount of impurities dissolved within the immersion medium by utilizing light scattered from the known grating structure.
摘要翻译：公开了用于测量和/或控制溶解在浸入式光刻中使用的浸渍介质中的杂质量的系统和/或方法。杂质可以是来自涂覆在基材表面上的光致抗蚀剂层的光致抗蚀剂。已知的光栅结构被构建在衬底上。实时浸没介质监测部件通过利用从已知光栅结构散射的光来便于测量和/或控制溶解在浸没介质中的杂质的量。

75. 发明授权

US07153364B1 Re-circulation and reuse of dummy-dispensed resist 失效
标题翻译：虚拟分配抗蚀剂的再循环和再利用
公开(公告)号：US07153364B1
公开(公告)日：2006-12-26
申请号：US10000208
申请日：2001-10-23
申请人： Bharath Rangarajan , Ramkumar Subramanian , Khoi A. Phan , Ursula Q. Quinto , Michael K. Templeton
发明人： Bharath Rangarajan , Ramkumar Subramanian , Khoi A. Phan , Ursula Q. Quinto , Michael K. Templeton
IPC分类号： B05B1/28 , B05B15/04 , B05B3/00
CPC分类号： H01L21/6715 , B05B15/50 , B05C11/08
摘要： The present invention provides a system and methodology for dummy-dispensing resist though a dispense head while mitigating waste associated with the dummy-dispense process. The dummy dispensed resist is returned to a reservoir from which it was taken. Between substrate applications, the dispense head can be positioned to dispense resist into a return line. The flow of resist from the dispense head keeps resist from drying at the dispense head. By funneling the dummy-dispensed resist into a return line with low volume, for example, waste from the dummy-dispensing process can be mitigated.
摘要翻译：本发明提供了一种用于分配头的虚拟分配抗蚀剂的系统和方法，同时减轻与虚拟分配过程相关的废物。虚拟分配的抗蚀剂返回到被采集的储存器。在基板应用之间，分配头可以被定位成将抗蚀剂分配到返回线中。来自分配头的抗蚀剂的流动在分配头保持抗干燥。通过将虚拟分配的抗蚀剂漏出到具有低体积的返回管线中，例如，可以减轻来自虚拟分配过程的废物。

76. 发明授权

US07145653B1 In situ particle monitoring for defect reduction 有权
标题翻译：用于缺陷减少的原位粒子监测
公开(公告)号：US07145653B1
公开(公告)日：2006-12-05
申请号：US09591017
申请日：2000-06-09
申请人： Michael K. Templeton , Bharath Rangarajan
发明人： Michael K. Templeton , Bharath Rangarajan
IPC分类号： G01N21/00
CPC分类号： G01N21/5907 , G01N15/0205 , G01N21/94 , G01N21/9501 , G01N2021/5961 , G01N2021/8411 , H01L22/10
摘要： A system and method is provided for monitoring and controlling the contaminant particle count contained in an aerosol during a photoresist coating and/or development process of a semiconductor. The monitoring system monitors the contaminate particle count present in the environment of the photoresist coating and/or development process, such as in a process chamber or a cup, enclosing the wafer during the process. The present invention employs in situ laser scattering or laser doppler anemometry techniques to detect the particle count level in the chamber or cup. A plurality of lasers and detectors can be positioned at different heights in or outside of a chamber or cup to facilitate detecting particles at different height levels. A laser could be used in conjunction with mirrors to provide a similar measurement. The particle count level can be used to compare with the defect level, so that it can be determined if a cleaner environment and/or process should be implemented.
摘要翻译：提供了一种系统和方法，用于在半导体的光致抗蚀剂涂覆和/或显影过程期间监测和控制包含在气溶胶中的污染物颗粒数。监测系统监测光致抗蚀剂涂层和/或显影过程环境中存在的污染颗粒数，例如在处理室或杯中，在处理过程中包围晶片。本发明采用原位激光散射或激光多普勒血流计技术来检测腔室或杯子中的颗粒计数水平。多个激光器和检测器可以位于室或杯内或室外的不同高度处，以便于检测不同高度水平的颗粒。激光可以与镜子一起使用以提供类似的测量。可以使用粒子计数水平与缺陷水平进行比较，以便可以确定是否应实施更清洁的环境和/或过程。

77. 发明授权

US07078348B1 Dual layer patterning scheme to make dual damascene 失效
标题翻译：双层图案方案制作双镶嵌
公开(公告)号：US07078348B1
公开(公告)日：2006-07-18
申请号：US09893188
申请日：2001-06-27
申请人： Bhanwar Singh , Ramkumar Subramanian , Bharath Rangarajan , Michael K. Templeton
发明人： Bhanwar Singh , Ramkumar Subramanian , Bharath Rangarajan , Michael K. Templeton
IPC分类号： H01L21/302 , H01L21/3065
CPC分类号： H01L21/31144 , H01L21/76807 , H01L21/76811 , H01L21/76813
摘要： One aspect of the present invention relates to a method for making a dual damascene pattern in an insulative layer in a single etch process involving providing a wafer having at least one insulative layer formed thereon; depositing a first photoresist layer over the at least one insulative layer; patterning a first image into the first photoresist layer; curing the first patterned photoresist layer; depositing a second photoresist layer over the first patterned photoresist layer; patterning a second image into the second photoresist layer; and etching the at least one insulative layer through the first patterned photoresist layer and the second patterned photoresist layer simultaneously in the single etch process.
摘要翻译：本发明的一个方面涉及在单一蚀刻工艺中在绝缘层中制造双镶嵌图案的方法，该方法包括提供其上形成有至少一个绝缘层的晶片; 在所述至少一个绝缘层上沉积第一光致抗蚀剂层; 将第一图像图案化成第一光致抗蚀剂层; 固化第一图案化光致抗蚀剂层; 在所述第一图案化光致抗蚀剂层上沉积第二光致抗蚀剂层; 将第二图像图案化成第二光致抗蚀剂层; 以及在单次蚀刻工艺中同时蚀刻通过第一图案化光致抗蚀剂层和第二图案化光致抗蚀剂层的至少一个绝缘层。

78. 发明授权

US07052575B1 System and method for active control of etch process 有权
标题翻译：用于主动控制蚀刻工艺的系统和方法
公开(公告)号：US07052575B1
公开(公告)日：2006-05-30
申请号：US09845454
申请日：2001-04-30
申请人： Bharath Rangarajan , Bhanwar Singh , Ramkumar Subramanian
发明人： Bharath Rangarajan , Bhanwar Singh , Ramkumar Subramanian
IPC分类号： C23F1/00
CPC分类号： H01L21/67253 , H01J37/32935 , H01L21/67063 , H01L22/34
摘要： A system for regulating an etch process is provided. The system includes one or more light sources, each light source directing light to one or more features and/or gratings on a wafer. Light reflected from the features and/or gratings is collected by a measuring system, which processes the collected light. The collected light is indicative of the dimensions achieved at respective portions of the wafer. The measuring system provides etching related data to a processor that determines the acceptability of the etching of the respective portions of the wafer. The system also includes one or more etching devices, each such device corresponding to a portion of the wafer and providing for the etching thereof. The processor selectively controls the etching devices to regulate etching of the portions of the wafer.
摘要翻译：提供了一种用于调节蚀刻工艺的系统。该系统包括一个或多个光源，每个光源将光引导到晶片上的一个或多个特征和/或光栅。从特征和/或光栅反射的光由测量系统收集，该系统处理收集的光。所收集的光指示在晶片的相应部分处获得的尺寸。测量系统向处理器提供蚀刻相关数据，该处理器确定晶片的相应部分的蚀刻的可接受性。该系统还包括一个或多个蚀刻装置，每个这样的装置对应于晶片的一部分并提供其蚀刻。处理器选择性地控制蚀刻装置来调节晶片的部分的蚀刻。

79. 发明授权

US07001830B2 System and method of pattern recognition and metrology structure for an X-initiative layout design 失效
标题翻译：用于X主动布局设计的模式识别和计量结构的系统和方法
公开(公告)号：US07001830B2
公开(公告)日：2006-02-21
申请号：US10653309
申请日：2003-09-02
申请人： Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh
发明人： Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh
IPC分类号： H01L21/20 , H01L21/36
CPC分类号： G03F7/70625 , G03F7/70633 , G03F9/7076 , Y10S438/975
摘要： The present invention relates to inspection methods and systems utilized to provide a best means for inspection of a wafer. The methods and systems include wafer-to-reticle alignment, layer-to-layer alignment and wafer surface feature inspection. The wafer-to-reticle alignment is improved by the addition of diagonal lines to existing alignment marks to decrease the intersection size and corresponding area that a desired point can reside. Layer-to-layer alignment is improved in a similar manner by the addition of oblique and/or non-linear line segments to existing overlay targets. Also, providing for wafer surface inspection in a multitude of desired diagonal axes allows for more accurate feature measurement.
摘要翻译：本发明涉及用于提供用于检查晶片的最佳方法的检查方法和系统。该方法和系统包括晶片到标线片对准，层间对准和晶片表面特征检查。通过将对角线添加到现有的对准标记来减小交叉点大小和期望点可以驻留的对应区域来改善晶片到标线阵列对准。通过向现有覆盖目标添加倾斜和/或非线性线段，以类似的方式改善了层间对齐。此外，在多个所需的对角轴中提供晶片表面检查允许更精确的特征测量。

80. 发明授权

US06931618B1 Feed forward process control using scatterometry for reticle fabrication 有权
标题翻译：使用分光镜制作的散射法进行前馈过程控制
公开(公告)号：US06931618B1
公开(公告)日：2005-08-16
申请号：US10050472
申请日：2002-01-16
申请人： Cyrus E. Tabery , Bharath Rangarajan , Bhanwar Singh , Ramkumar Subramanian
发明人： Cyrus E. Tabery , Bharath Rangarajan , Bhanwar Singh , Ramkumar Subramanian
IPC分类号： G01B9/00 , G03F1/00 , G06F17/50 , G03H9/00
CPC分类号： G03F1/84 , G03F1/00
摘要： A system for selectively generating and feeding forward reticle fabrication data is provided. The system includes components for fabricating a reticle and a control system operatively connected to the fabricating components, where the control system can control the operation of the fabricating components. The control system bases its control of the fabricating components, at least in part, on feed forward control information generated by a processor that analyzes scatterometry based reticle fabrication data gathered from measurement components. The scatterometry data is compared to data stored in a signature data store that facilitates analyzing gathered scatterometry signatures to produce feed forward control information that can be employed to manipulate subsequent reticle fabrication processes and/or apparatus.
摘要翻译：提供了一种用于选择性地生成和馈送标线制造数据的系统。该系统包括用于制造掩模版的部件和可操作地连接到制造部件的控制系统，其中控制系统可以控制制造部件的操作。控制系统至少部分地基于由分析从测量部件收集的基于散射仪的掩模版制造数据的处理器生成的前馈控制信息的制造部件的控制。将散射测量数据与存储在签名数据存储器中的数据进行比较，其有助于分析所收集的散射光标签以产生可用于操纵随后的标线制造工艺和/或设备的前馈控制信息。

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