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61. 发明授权

US06632591B2 Nanolaminated thin film circuitry materials 有权
标题翻译：纳米层压薄膜电路材料
公开(公告)号：US06632591B2
公开(公告)日：2003-10-14
申请号：US09781462
申请日：2001-02-12
申请人： Andrew T. Hunt , Wen-Yi Lin , Richard W. Carpenter
发明人： Andrew T. Hunt , Wen-Yi Lin , Richard W. Carpenter
IPC分类号： G03F700
CPC分类号： H05K1/162 , H05K1/167 , H05K3/4623 , H05K2201/0179 , H05K2201/0317 , H05K2201/0355 , H05K2201/09309 , H05K2203/0338 , H05K2203/1338 , Y10T428/24917
摘要： Nanolaminates are formed by alternating deposition, e.g., by combustion chemical vapor deposition (CCVD), layers of resistive material and layers of dielectric material. Outer resistive material layers are patterned to form discrete patches of resistive material. Electrical pathways between opposed patches of resistive material on opposite sides of the laminate act as capacitors. Electrical pathways horizontally through resistive material layers, which may be connected by via plated holes, act as resistors.
摘要翻译：通过交替沉积，例如通过燃烧化学气相沉积（CCVD），电阻材料层和电介质材料层形成纳米级氨酸盐。外部电阻材料层被图案化以形成电阻材料的离散贴片。在层压板相对两侧的相对电阻材料片之间的电气通路用作电容器。可通过电镀孔连接的电阻材料层的水平电路作为电阻

62. 发明授权

US06500350B1 Formation of thin film resistors 有权
标题翻译：薄膜电阻的形成
公开(公告)号：US06500350B1
公开(公告)日：2002-12-31
申请号：US09779990
申请日：2001-02-08
申请人： Andrew T. Hunt , Wen-Yi Lin , Shara S. Shoup , Richard W. Carpenter , Stephen E. Bottomley , Tzyy Jiuan Hwang , Michelle Hendrick
发明人： Andrew T. Hunt , Wen-Yi Lin , Shara S. Shoup , Richard W. Carpenter , Stephen E. Bottomley , Tzyy Jiuan Hwang , Michelle Hendrick
IPC分类号： H01C112
CPC分类号： H01L28/20 , C23C16/40 , C23C16/453 , H01C7/006 , H01C17/20 , H01C17/2416 , H05K1/167 , H05K3/064 , H05K2201/0317 , H05K2201/0355 , H05K2203/0338 , H05K2203/1338
摘要： A method is provided for forming a patterned layer of resistive material in electrical contact with a layer of electrically conducting material. A three-layer structure is formed which comprises a metal conductive layer, an intermediate layer formed of material which is degradable by a chemical etchant, and a layer of resistive material of sufficient porosity such that the chemical etchant for said intermediate layer may seep through the resistive material and chemically degrade said intermediate layer so that the resistive material may be ablated from said conductive layer wherever the intermediate layer is chemically degraded. A patterned photoresist layer is formed on the resistive material layer. The resistive material layer is exposed to the chemical etchant for said intermediate layer so that the etchant seeps through the porous resistive material layer and degrades the intermediate layer. Then, portions of the resistive material layer are ablated away wherever the intermediate layer has been degraded.
摘要翻译：提供了一种用于形成与导电材料层电接触的电阻材料的图案化层的方法。形成三层结构，其包括金属导电层，由可通过化学蚀刻剂降解的材料形成的中间层和足够孔隙率的电阻材料层，使得所述中间层的化学蚀刻剂可渗透通过电阻材料并化学降解所述中间层，使得电阻材料可以在中间层被化学降解的地方从所述导电层烧蚀。在电阻材料层上形成图案化的光致抗蚀剂层。电阻材料层暴露于所述中间层的化学蚀刻剂，使得蚀刻剂渗透通过多孔电阻材料层并降解中间层。然后，中间层已经劣化的地方，电阻材料层的部分被消融掉。

63. 发明授权

US06211080B1 Repair of dielectric-coated electrode or circuit defects 失效
标题翻译：修复电介质电极或电路缺陷
公开(公告)号：US06211080B1
公开(公告)日：2001-04-03
申请号：US08741480
申请日：1996-10-30
申请人： Abdelkrim Tatah
发明人： Abdelkrim Tatah
IPC分类号： H01L2144
CPC分类号： H05K3/225 , B23K26/351 , C23C14/046 , C23C16/045 , H05K1/0306 , H05K3/0017 , H05K3/146 , H05K3/28 , H05K2203/0528 , H05K2203/0769 , H05K2203/107 , H05K2203/1338 , H05K2203/173
摘要： A method of repairing or augmenting a metal line buried beneath at least one cover layer comprising the steps of creating a via through the cover layer to the metal line, repairing or augmenting the metal line, and filling the via. Also provided is apparatus for repairing or augmenting a metal line buried beneath at least one cover layer comprising means for creating a via through the cover layer to the metal line, means for repairing or augmenting the metal line, and means for filling the via. Also provided is a substrate having a metal line buried beneath at least one cover layer wherein the metal line has been repaired or augmented according to the process comprising the steps of creating a via through the cover layer to the metal line, repairing or augmenting the metal line, and filling the via.
摘要翻译：一种修复或增加掩埋在至少一个覆盖层下面的金属线的方法，包括以下步骤：通过覆盖层形成通向金属线的通孔，修复或增加金属线，以及填充通孔。还提供了用于修复或增加掩埋在至少一个覆盖层下面的金属线的装置，包括用于通过覆盖层形成到金属线的通孔，用于修复或增加金属线的装置，以及用于填充通孔的装置。还提供了一种衬底，其具有埋在至少一个覆盖层下面的金属线，其中金属线已经被修复或增加，根据包括以下步骤的金属线：通过覆盖层形成通孔到金属线，修复或增加金属线，填充通孔。

64. 发明授权

US06208234B1 Resistors for electronic packaging 失效
标题翻译：电子封装用电阻器
公开(公告)号：US06208234B1
公开(公告)日：2001-03-27
申请号：US09069427
申请日：1998-04-29
申请人： Andrew T. Hunt , Wen-Yi Lin , Shara S. Shoup
发明人： Andrew T. Hunt , Wen-Yi Lin , Shara S. Shoup
IPC分类号： H01C1012
CPC分类号： H01L28/20 , C23C16/40 , C23C16/453 , H01C7/006 , H01C17/20 , H01C17/2416 , H05K1/167 , H05K3/064 , H05K2201/0317 , H05K2201/0355 , H05K2203/0338 , H05K2203/1338
摘要： In thin layer resistors comprising a patch of a layer of resistive material on an insulating substrate and means at spaced apart locations on the patch, the resistive material is formed of 95 to 99.5 wt % of a zero valence metal and between 5 and 0.5 wt % of a dielectric material.
摘要翻译：在薄层电阻器中，包括在绝缘衬底上的电阻材料层的贴片和在贴片上的间隔开位置的装置，电阻材料由零价金属的95至99.5重量％和5至0.5重量％的介电材料。

65. 发明授权

US5493076A Structure for repairing semiconductor substrates 失效
标题翻译：修复半导体衬底的结构
公开(公告)号：US5493076A
公开(公告)日：1996-02-20
申请号：US378411
申请日：1995-01-26
申请人： James M. Levite , Michael Berger , Richard L. Chartrand , Mary A. Emmett , Raymond A. Jackson , James J. Petrone , Richard F. Shortt , Roger A. Stinemire
发明人： James M. Levite , Michael Berger , Richard L. Chartrand , Mary A. Emmett , Raymond A. Jackson , James J. Petrone , Richard F. Shortt , Roger A. Stinemire
IPC分类号： H01L21/48 , H05K1/00 , H05K1/09 , H05K3/00 , H05K3/10 , H05K3/22 , H05K3/46 , H05K1/18
CPC分类号： H05K3/222 , H01L21/485 , H05K3/225 , H05K1/0298 , H05K1/095 , H05K2201/10287 , H05K2203/0769 , H05K2203/107 , H05K2203/121 , H05K2203/1338 , H05K2203/173 , H05K3/0017 , H05K3/107 , H05K3/4685 , Y10T29/49155 , Y10T29/49162 , Y10T29/49167 , Y10T29/49742
摘要： The present invention relates generally to a new structure and a method for repairing semiconductor substrates, and more particularly, the invention encompasses a structure and a method for repairing Printed Circuit Boards or other electronic substrates by providing electrical lines on the defective board. On a substrate that has an open or an electrical discontinuity, after the discontinuity has been established, a portion of the electrical line across from the electrical discontinuity are exposed and one or more trenches or grooves are made between the two or more exposed portions of the electrical line. The two exposed portions of the exposed electrical line is then joined by either an electrical wire that is routed through the trench or using a standard deposition process one or more metals or material are deposited in the open trench to provide or restore electrical continuity and the excess deposition material is removed. This invention also provides means for impedance matching of the net that is repaired.
摘要翻译：本发明一般涉及用于修复半导体衬底的新结构和方法，更具体地，本发明包括通过在缺陷板上提供电线来修复印刷电路板或其它电子衬底的结构和方法。在具有开放或电气不连续性的基板上，在不连续性已经建立之后，从电气不连续部分横跨的一部分电线被暴露，并且在两个或多个暴露部分之间形成一个或多个沟槽或凹槽电线。暴露的电线的两个暴露部分然后通过通过沟槽穿过的电线或使用标准沉积工艺连接，一个或多个金属或材料沉积在开放沟槽中，以提供或恢复电连续性，去除沉积材料。本发明还提供了用于修复网络的阻抗匹配的装置。

66. 发明授权

US5244538A Method of patterning metal on a substrate using direct-write deposition of a mask 失效
标题翻译：使用掩模的直接写入沉积在衬底上图案化金属的方法
公开(公告)号：US5244538A
公开(公告)日：1993-09-14
申请号：US736357
申请日：1991-07-26
申请人： Nalin Kumar
发明人： Nalin Kumar
IPC分类号： H01L21/48 , H05K3/00 , H05K3/04 , H05K3/10 , H05K3/14 , H05K3/18 , H05K3/38 , H05K3/46
CPC分类号： H01L21/4857 , H05K3/045 , H05K3/184 , H05K3/465 , H01J2201/30457 , H05K2201/0154 , H05K2201/0166 , H05K2201/0376 , H05K2201/2081 , H05K2203/0554 , H05K2203/107 , H05K2203/121 , H05K2203/1338 , H05K3/0023 , H05K3/0041 , H05K3/107 , H05K3/143 , H05K3/146 , H05K3/185 , H05K3/388 , H05K3/4661
摘要： A method of patterning metal on a substrate without photolithography. The steps include providing a dielectric substrate, forming a metal mask in a predetermined pattern on the substrate without using a mask by direct-write deposition using a particle beam such as a liquid metal cluster force to form the mask, dry etching the substrate to form a plurality of channels therein, depositing a conductive metal into the channels, and removing the mask. The top of the substrate can then be planarized by polishing, or alternatively the dielectric between the metal lines can be etched. The invention is well suited for fabricating copper/polyimide substrates.
摘要翻译：在没有光刻的基板上图案化金属的方法。所述步骤包括提供电介质基板，在基板上以预定图案形成金属掩模，而不用使用诸如液体金属簇力的粒子束的直接写入沉积来形成掩模，干燥蚀刻基板以形成多个通道，将导电金属沉积到通道中，以及去除掩模。然后可以通过抛光将衬底的顶部平坦化，或者可以蚀刻金属线之间的电介质。本发明非常适用于制造铜/聚酰亚胺基片。

67. 发明授权

US4664942A Nickel diffusion bonded to metallized ceramic body and method 失效
标题翻译：镍扩散粘结到金属化陶瓷体和方法
公开(公告)号：US4664942A
公开(公告)日：1987-05-12
申请号：US826436
申请日：1986-02-05
申请人： Dong-Sil Park
发明人： Dong-Sil Park
IPC分类号： C04B41/52 , C04B41/89 , C23C10/28 , H01L21/48 , H05K3/24 , H05K3/10
CPC分类号： H05K3/246 , C04B41/009 , C04B41/52 , C04B41/89 , C23C10/28 , H01L21/4846 , C04B2111/00844 , H05K1/092 , H05K2203/1338
摘要： Packless cementation is used to diffusion bond nickel to discrete exposed areas of tungsten or molybdenum that are in turn bonded to the surface of a ceramic body, e.g. in the preparation of a ceramic chip carrier or other premetallized ceramic device.
摘要翻译：无包层胶结被用于将镍扩散到连接到陶瓷体表面的钨或钼的离散暴露区域，例如，在制备陶瓷芯片载体或其他预金属化陶瓷器件时。

68. 发明申请

US20180070456A1 CONFORMAL COATING OF INTEGRATED CIRCUIT PACKAGES 审中-公开
公开(公告)号：US20180070456A1
公开(公告)日：2018-03-08
申请号：US15257726
申请日：2016-09-06
申请人： Intel Corporation
发明人： Priyanka Dobriyal , Suriyakala Ramalingam , Chester C. Lee , Raiyomand F. Aspandiar
IPC分类号： H05K3/28 , H05K1/18 , H01L21/56
CPC分类号： H05K3/284 , H01L21/563 , H05K1/18 , H05K3/285 , H05K2201/09872 , H05K2201/10977 , H05K2203/1338 , H05K2203/304
摘要： An electronic system may include a printed circuit board (PCB), a component affixed to the PCB, and a conformal coating layer on the PCB and the component. The conformal coating layer may include parylene. Furthermore, the electronic system may include an underfill layer adjacent to the conformal coating layer, filling a gap between the PCB and the component. Other embodiments may be described and/or claimed.

69. 发明申请

US20180042120A1 WATERPROOF STRUCTURE FOR IMPLANTED ELECTRONIC DEVICE 审中-公开
公开(公告)号：US20180042120A1
公开(公告)日：2018-02-08
申请号：US15788328
申请日：2017-10-19
申请人： GiMer Medical Co., Ltd.
发明人： Chi-Heng CHANG , Chan-Yi CHENG , Chen-Tun WU
IPC分类号： H05K3/28 , A61B5/00 , A61N1/36 , A61N1/362 , H05K1/03 , H05K3/00 , A61N1/375 , A61B5/145
CPC分类号： H05K3/285 , A61B5/14503 , A61B5/14532 , A61B5/686 , A61B2503/40 , A61B2562/12 , A61B2562/18 , A61N1/3605 , A61N1/362 , A61N1/375 , H05K1/0326 , H05K3/0011 , H05K3/28 , H05K2201/0162 , H05K2201/0195 , H05K2201/09063 , H05K2203/1327 , H05K2203/1338 , H05K2203/1377
摘要： A waterproof structure for an implanted electronic device is capable of preventing the liquid or moist from entering and damaging the circuit board of the electronic device. The waterproof structure includes a shell, a first material layer, a second material layer, and a third material layer. The first material layer covers at least a part of the implanted electronic device. The second material layer covers the first material layer. The internal space of the shell is configured for accommodating the implanted electronic device. The shell is made of PEEK (polyether ether ketone). The third material layer is disposed between the second material layer and the shell.

70. 发明申请

US20170073546A1 PROCESS FOR PROTECTING AN ELECTRONIC DEVICE BY SELECTIVE DEPOSITION OF POLYMER COATINGS 有权
标题翻译：通过选择性沉积聚合物涂层来保护电子器件的工艺
公开(公告)号：US20170073546A1
公开(公告)日：2017-03-16
申请号：US15261624
申请日：2016-09-09
申请人： Syed Taymur Ahmad , Bruce Acton
发明人： Syed Taymur Ahmad , Bruce Acton
IPC分类号： C09D183/04 , H05K7/14 , C09D133/16 , H04M1/02 , H04M1/18 , H05K3/28 , H05K1/03
CPC分类号： C09D183/04 , C09D133/16 , H01R12/716 , H05K1/0353 , H05K3/282 , H05K3/284 , H05K3/285 , H05K3/40 , H05K7/1427 , H05K2201/0162 , H05K2201/0187 , H05K2203/1173 , H05K2203/121 , H05K2203/1322 , H05K2203/1338 , H05K2203/1361 , H05K2203/1366 , H05K2203/1572
摘要： Methods for protecting an electronic device from contaminants by applying different polymeric materials to different vital components of a device are disclosed. In one embodiment, the method comprises applying a first polymer, such as an acrylic-based polymer, to one or more connectors and components located on the printed circuit board of the device. The method further comprises applying a second polymer, such as a silicone-based polymer, to different connectors and components on the printed circuit board. The method leads to different components being coated with a different polymers, without the need for multilayer coatings on any component. Electronic devices that are protected by such polymeric, hydrophobic coatings are also disclosed. Non-limiting examples of such devices include smart phones, computers, and gaming devices.
摘要翻译：公开了通过将不同的聚合物材料施加到装置的不同重要部件来保护电子装置免受污染物的方法。在一个实施例中，该方法包括将第一聚合物（例如基于丙烯酸的聚合物）施加到位于设备的印刷电路板上的一个或多个连接器和部件。该方法还包括将第二聚合物（例如硅氧烷基聚合物）施加到印刷电路板上的不同连接器和部件上。该方法导致不同的组分被不同的聚合物涂覆，而不需要任何组分上的多层涂层。还公开了由这种聚合物疏水涂层保护的电子器件。这种设备的非限制性示例包括智能电话，计算机和游戏设备。

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