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    • 61. 发明授权
    • Communication control microcomputer
    • 通讯控制微机
    • US4989135A
    • 1991-01-29
    • US534350
    • 1990-06-05
    • Sakae Miki
    • Sakae Miki
    • H04L29/10G06F13/00G06F13/42
    • G06F13/4204
    • Disclosed is a communication control microcomputer which includes components that implement serial communication control in compliance with a communication protocol, a FIFO memory for temporarily holding transaction data, a direct memory access control (DMAC) for implementing DMA transfer between the FIFO memory and the main memory, and a CPU for implementing general control over these components. A signal indicating end of frame (transaction data) is passed between components that control the serial communication and the DMAC through the FIFO memory.
    • 公开了一种通信控制微计算机,其包括根据通信协议实现串行通信控制的组件,用于临时保存事务数据的FIFO存储器,用于在FIFO存储器和主存储器之间实现DMA传输的直接存储器访问控制(DMAC) ,以及用于实现对这些组件的一般控制的CPU。 指示帧结束的信号(事务数据)在控制串行通信的组件和通过FIFO存储器的DMAC之间传递。
    • 62. 发明授权
    • Information processing unit
    • 信息处理单元
    • US4470113A
    • 1984-09-04
    • US339223
    • 1982-01-13
    • Toshio Oura
    • Toshio Oura
    • G06F3/00G06F13/42G06F15/17G06F15/177G06F3/04
    • G06F15/17G06F13/4204G06F13/4221G06F15/177
    • An information processing unit, such as a central processor, microprocessor or one-chip microcomputer, which can be used as either a master unit or a slave unit yet does not require the provision of extra external terminals for control signals. The unit is provided with first and second bidirectional input/output ports and an internal bus coupled to both of the first and second input/output ports. The input/output mode of the two busses can be controlled either by an internally-generated control signal or by an externally-supplied control signal inputted to the unit. The one of the first and second control signals used for controlling the transmission modes of the input/output ports is determined in accordance with data input through one of the input/output ports and stored internally of the unit.
    • 可以用作主单元或从单元的诸如中央处理器,微处理器或单片微计算机的信息处理单元,但不需要为控制信号提供额外的外部端子。 该单元设置有第一和第二双向输入/输出端口以及耦合到第一和第二输入/输出端口两者的内部总线。 两个总线的输入/输出模式可以由内部产生的控制信号或输入到该单元的外部提供的控制信号来控制。 用于控制输入/输出端口的传输模式的第一和第二控制信号中的一个根据通过输入/输出端口之一输入并存储在单元内部的数据来确定。