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61. 发明申请

US20130241652A1 UTILIZING A SENSE AMPLIFIER TO SELECT A SUITABLE CIRCUIT 失效
标题翻译：使用感应放大器选择适合的电路
公开(公告)号：US20130241652A1
公开(公告)日：2013-09-19
申请号：US13418961
申请日：2012-03-13
申请人： Howard H. Chi , Haitao O. Dai , Kai D. Feng , Donald J. Papae
发明人： Howard H. Chi , Haitao O. Dai , Kai D. Feng , Donald J. Papae
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F3/45609 , H03F3/68 , H03F2200/408 , H03F2200/78
摘要： Embodiments of the present invention provide an approach for utilizing a sense amplifier to select a suitable circuit, wherein a suitable circuit generates a voltage that is greater than or equal to a configurable reference voltage. An amplifier gain selector selects a voltage gain of a sense amplifier having input terminals, auxiliary inputs, an output, an array of resistive loads, and the amplifier gain selector. Auxiliary inputs are utilized to nullify direct current (DC) offset voltage of the sense amplifier. Combinatorial logic circuitry connects the input terminals of the sense amplifier to output terminals of a circuit that is within a group of circuits. A comparator circuit determines if the circuit generates a voltage greater than or equal to a configurable reference voltage, based on the output of the sense amplifier.
摘要翻译：本发明的实施例提供了一种利用读出放大器来选择合适电路的方法，其中合适的电路产生大于或等于可配置参考电压的电压。放大器增益选择器选择具有输入端，辅助输入，输出，电阻性负载阵列和放大器增益选择器的读出放大器的电压增益。辅助输入用于消除读出放大器的直流（DC）偏移电压。组合逻辑电路将读出放大器的输入端连接到一组电路内的电路的输出端。比较器电路基于读出放大器的输出来确定电路是否产生大于或等于可配置参考电压的电压。

62. 发明授权

US08482336B2 Variable impedance single pole double throw CMOS switch 失效
标题翻译：可变阻抗单极双掷CMOS开关
公开(公告)号：US08482336B2
公开(公告)日：2013-07-09
申请号：US13082434
申请日：2011-04-08
申请人： Pinping Sun , Kai D. Feng , Essam Mina
发明人： Pinping Sun , Kai D. Feng , Essam Mina
IPC分类号： H03K17/687
CPC分类号： H03K17/693 , H01L21/823878 , H01L21/823892 , H01L27/0928 , H01L29/78 , H03K17/6221 , H03K2017/066 , H03K2217/0018
摘要： A single pole double throw (SPDT) semiconductor switch includes a series connection of a first transmitter-side transistor and a first reception-side transistor between a transmitter node and a reception node. Each of the two first transistors is provided with a gate-side variable impedance circuit, which provides a variable impedance connection between a complementary pair of gate control signals. Further, the body of each first transistor can be connected to a body bias control signal through a body-side variable impedance circuit. In addition, the transmitter node is connected to electrical ground through a second transmitter-side transistor, and the reception node is connected to electrical ground through a second reception-side transistor. Each of the second transistors can have a body bias that is tied to the body bias control signals for the first transistors so that switched-off transistors provide enhanced electrical isolation.
摘要翻译：单极双掷（SPDT）半导体开关包括在发送器节点和接收节点之间的第一发送器侧晶体管和第一接收侧晶体管的串联连接。两个第一晶体管中的每一个设置有栅极侧可变阻抗电路，其在互补的一对栅极控制信号之间提供可变阻抗连接。此外，每个第一晶体管的主体可以通过体侧可变阻抗电路连接到体偏置控制信号。此外，发射机节点通过第二发射机侧晶体管连接到电接地，并且接收节点通过第二接收侧晶体管连接到电接地。每个第二晶体管可以具有连接到第一晶体管的体偏置控制信号的体偏置，使得关断晶体管提供增强的电隔离。

63. 发明授权

US08421183B2 Structure of very high insertion loss of the substrate noise decoupling 有权
公开(公告)号：US08421183B2
公开(公告)日：2013-04-16
申请号：US13016126
申请日：2011-01-28
申请人： Hanyi Ding , Kai D. Feng , Zhong-Xiang He , Xuefeng Liu
发明人： Hanyi Ding , Kai D. Feng , Zhong-Xiang He , Xuefeng Liu
IPC分类号： H01L21/20 , H01L21/36
CPC分类号： H01L23/552 , H01L21/76 , H01L21/76264 , H01L23/585 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A structure includes a substrate comprising a region having a circuit or device which is sensitive to electrical noise. Additionally, the structure includes a first isolation structure extending through an entire thickness of the substrate and surrounding the region and a second isolation structure extending through the entire thickness of the substrate and surrounding the region.

64. 发明申请

US20120266116A1 INTEGRATED MILLIMETER WAVE ANTENNA AND TRANSCEIVER ON A SUBSTRATE 有权
标题翻译：集成的毫米波天线和基座上的收发器
公开(公告)号：US20120266116A1
公开(公告)日：2012-10-18
申请号：US13534350
申请日：2012-06-27
申请人： Hanyi Ding , Kai D. Feng , Zhong-Xiang He , Zhenrong Jin , Xuefeng Liu
发明人： Hanyi Ding , Kai D. Feng , Zhong-Xiang He , Zhenrong Jin , Xuefeng Liu
IPC分类号： G06F17/50
CPC分类号： H01Q1/2283 , H01Q1/40 , H01Q9/26 , H01Q9/285 , H01Q19/108 , H01Q19/30
摘要： A semiconductor chip integrating a transceiver, an antenna, and a receiver is provided. The transceiver is located on a front side of a semiconductor substrate. A through substrate via provides electrical connection between the transceiver and the receiver located on a backside of the semiconductor substrate. The antenna connected to the transceiver is located in a dielectric layer located on the front side of the substrate. The separation between the reflector plate and the antenna is about the quarter wavelength of millimeter waves, which enhances radiation efficiency of the antenna. An array of through substrate dielectric vias may be employed to reduce the effective dielectric constant of the material between the antenna and the reflector plate, thereby reducing the wavelength of the millimeter wave and enhance the radiation efficiency. A design structure for designing, manufacturing, or testing a design for such a semiconductor chip is also provided.
摘要翻译：提供集成收发器，天线和接收器的半导体芯片。收发器位于半导体衬底的前侧。通过基底通孔提供收发器和位于半导体衬底背面的接收器之间的电连接。连接到收发器的天线位于位于基板正面的电介质层中。反射板与天线之间的间隔大约是毫米波的四分之一波长，这提高了天线的辐射效率。可以采用贯穿衬底电介质通孔的阵列来降低天线和反射板之间材料的有效介电常数，由此减小毫米波的波长并提高辐射效率。还提供了用于设计，制造或测试这种半导体芯片的设计的设计结构。

65. 发明授权

US08279572B2 Structure for an on-chip high frequency electro-static discharge device 有权
标题翻译：一种片上高频静电放电装置的结构
公开(公告)号：US08279572B2
公开(公告)日：2012-10-02
申请号：US12144095
申请日：2008-06-23
申请人： Hanyi Ding , Kai D. Feng , Zhong-Xiang He , Xuefeng Liu , Anthony K. Stamper
发明人： Hanyi Ding , Kai D. Feng , Zhong-Xiang He , Xuefeng Liu , Anthony K. Stamper
IPC分类号： H02H9/02
CPC分类号： H01L23/60 , H01L2924/0002 , H01L2924/00
摘要： A design structure for an on-chip high frequency electro-static discharge device is described. In one embodiment, the electro-static discharge structure comprises a first dielectric layer with more than one electrode formed therein. A second dielectric layer with more than one electrode formed therein is located above the first dielectric layer. At least one via connects the more than one electrode in the first dielectric layer with the more than one electrode in the second dielectric layer. A gap is formed through the first dielectric layer and the second dielectric layer, wherein the gap extends between two adjacent electrodes in both the first dielectric layer and the second dielectric layer. A third dielectric layer is disposed over the second dielectric layer, wherein the third dielectric layer hermetically seals the gap to provide electro-static discharge protection on the integrated circuit.
摘要翻译：描述了片上高频静电放电装置的设计结构。在一个实施例中，静电放电结构包括其中形成有多于一个电极的第一电介质层。其中形成有多于一个电极的第二电介质层位于第一介电层的上方。至少一个通孔将第一介电层中的多于一个的电极与第二介电层中的多于一个的电极连接。通过第一电介质层和第二电介质层形成间隙，其中间隙在第一电介质层和第二电介质层中的两个相邻电极之间延伸。第三电介质层设置在第二电介质层上，其中第三介电层气密地密封间隙以在集成电路上提供静电放电保护。

66. 发明授权

US07923808B2 Structure of very high insertion loss of the substrate noise decoupling 有权
标题翻译：非常高的衬底噪声去耦插入损耗的结构
公开(公告)号：US07923808B2
公开(公告)日：2011-04-12
申请号：US11942811
申请日：2007-11-20
申请人： Hanyi Ding , Kai D. Feng , Zhong-Xiang He , Xuefeng Liu
发明人： Hanyi Ding , Kai D. Feng , Zhong-Xiang He , Xuefeng Liu
IPC分类号： H01L21/20 , H01L21/36
CPC分类号： H01L23/552 , H01L21/76 , H01L21/76264 , H01L23/585 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A structure includes a substrate comprising a region having a circuit or device which is sensitive to electrical noise. Additionally, the structure includes a first isolation structure extending through an entire thickness of the substrate and surrounding the region and a second isolation structure extending through the entire thickness of the substrate and surrounding the region.
摘要翻译：一种结构包括具有对电噪声敏感的电路或器件的区域的衬底。此外，该结构包括延伸穿过衬底的整个厚度并围绕该区域的第一隔离结构，以及延伸穿过衬底的整个厚度并围绕该区域的第二隔离结构。

67. 发明授权

US07880158B2 Phase-change TaN resistor based triple-state/multi-state read only memory 有权
标题翻译：相变TaN电阻器基于三态/多态只读存储器
公开(公告)号：US07880158B2
公开(公告)日：2011-02-01
申请号：US12109085
申请日：2008-04-24
申请人： John M. Aitken , Fen Chen , Kai D. Feng
发明人： John M. Aitken , Fen Chen , Kai D. Feng
IPC分类号： H01L47/00
CPC分类号： G11C11/56 , G11C11/5678 , G11C11/5692 , G11C13/0004 , G11C17/16 , G11C17/18 , H01L27/101 , H01L27/2409 , H01L45/06 , H01L45/1226 , H01L45/1233 , H01L45/145
摘要： The present invention relates to a nonvolatile memory such as, for example a ROM or an EPROM, in which the information density of the memory is increased relative to a conventional nonvolatile memory that includes two logic state devices. Specifically, the nonvolatile memory of the present invention includes a SiN/TaN/SiN thin film resistor embedded within a material having a thermal conductivity of about 1 W/m-K or less; and a non-linear Si-containing device coupled to the resistor. Read and write circuits and operations are also provided in the present application.
摘要翻译：本发明涉及诸如ROM或EPROM的非易失性存储器，其中存储器的信息密度相对于包括两个逻辑状态器件的常规非易失性存储器而增加。具体地，本发明的非易失性存储器包括嵌入在热导率为约1W / m-K以下的材料中的SiN / TaN / SiN薄膜电阻器; 以及耦合到电阻器的非线性含Si器件。读写电路和操作也在本申请中提供。

68. 发明授权

US07666712B2 Design of BEOL patterns to reduce the stresses on structures below chip bondpads 失效
标题翻译： BEOL模式的设计，以减少低于芯片焊盘的结构上的应力
公开(公告)号：US07666712B2
公开(公告)日：2010-02-23
申请号：US12133442
申请日：2008-06-05
申请人： Elie Awad , Mariette A. Awad , Kai D. Feng
发明人： Elie Awad , Mariette A. Awad , Kai D. Feng
IPC分类号： H01L21/00
CPC分类号： H01L24/02 , H01L23/562 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/014 , H01L2924/14 , H01L2924/3025
摘要： A semiconductor structure comprising a substrate including a first layer comprising a first material having a first modulus of elasticity; a first structure comprising a conductor and formed within the substrate, the first structure having an upper surface; and a stress diverting structure proximate the first structure and within the first layer, the stress diverting structure providing a low mechanical stress region at the upper surface of the first structure when a physical load is applied to the first structure, wherein said low mechanical stress region comprises stress values below the stress values in areas not protected by the stress diverting structure. The stress diverting structure comprises a second material having a second modulus of elasticity less than the first modulus of elasticity, the second material selectively formed over the upper surface of the first structure for diverting mechanical stress created by the physical load applied to the first structure.
摘要翻译：一种半导体结构，包括：基板，包括第一层，所述第一层包括具有第一弹性模量的第一材料; 包括导体并形成在所述基板内的第一结构，所述第一结构具有上表面; 以及靠近所述第一结构并且在所述第一层内的应力转向结构，所述应力转向结构在向所述第一结构施加物理载荷时在所述第一结构的上表面处提供低机械应力区域，其中所述低机械应力区域包括低于应力转移结构保护区域的应力值。应力转向结构包括具有小于第一弹性模量的第二弹性模量的第二材料，第二材料选择性地形成在第一结构的上表面上，用于转移由施加到第一结构的物理负载产生的机械应力。

69. 发明申请

US20090127652A1 STRUCTURE OF VERY HIGH INSERTION LOSS OF THE SUBSTRATE NOISE DECOUPLING 有权
标题翻译：基底噪声非常高的插入损耗的结构
公开(公告)号：US20090127652A1
公开(公告)日：2009-05-21
申请号：US11942811
申请日：2007-11-20
申请人： Hanyi Ding , Kai D. Feng , Zhong-Xiang He , Xuefeng Liu
发明人： Hanyi Ding , Kai D. Feng , Zhong-Xiang He , Xuefeng Liu
IPC分类号： H01L23/552 , H01L21/76
CPC分类号： H01L23/552 , H01L21/76 , H01L21/76264 , H01L23/585 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A structure includes a substrate comprising a region having a circuit or device which is sensitive to electrical noise. Additionally, the structure includes a first isolation structure extending through an entire thickness of the substrate and surrounding the region and a second isolation structure extending through the entire thickness of the substrate and surrounding the region.
摘要翻译：一种结构包括具有对电噪声敏感的电路或器件的区域的衬底。此外，该结构包括延伸穿过衬底的整个厚度并围绕该区域的第一隔离结构，以及延伸穿过衬底的整个厚度并围绕该区域的第二隔离结构。

70. 发明申请

US20090052153A1 ON CHIP SHIELDING STRUCTURE FOR INTEGRATED CIRCUITS OR DEVICES ON A SUBSTRATE AND METHOD OF SHIELDING 有权
标题翻译：集成电路或基板上的器件的芯片屏蔽结构和屏蔽方法
公开(公告)号：US20090052153A1
公开(公告)日：2009-02-26
申请号：US11844397
申请日：2007-08-24
申请人： Hanyi Ding , Kai D. Feng , Zhong-Xiang He , Xuefeng Liu
发明人： Hanyi Ding , Kai D. Feng , Zhong-Xiang He , Xuefeng Liu
IPC分类号： H05K9/00
CPC分类号： H05K9/0022
摘要： An electromagnetic shielding structure that includes a conductive structure surrounding and accommodating a circuit or a circuit device arranged on a substrate. At least one feed through device is associated with the conductive structure and provides signals to the circuit or circuit device. The method includes forming a shielding structure so that the shielding structure at least one of is at least partially arranged within the substrate and surrounds the circuit or circuit device and associating at least one feed through device with the shielding structure.
摘要翻译：一种电磁屏蔽结构，其包括围绕并容纳布置在基板上的电路或电路装置的导电结构。至少一个馈送装置与导电结构相关联，并向电路或电路装置提供信号。所述方法包括形成屏蔽结构，使得所述屏蔽结构至少部分地至少部分地布置在所述基板内并且围绕所述电路或电路装置并且将至少一个馈送装置与所述屏蔽结构相关联。

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