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61. 发明授权

US5808676A Pixel cells having integrated analog memories and arrays thereof 失效
公开(公告)号：US5808676A
公开(公告)日：1998-09-15
申请号：US368134
申请日：1995-01-03
申请人： David K. Biegelsen , Warren B. Jackson , Robert A. Street
发明人： David K. Biegelsen , Warren B. Jackson , Robert A. Street
IPC分类号： H04N5/66 , G11C27/02 , H01L27/146 , H04N5/357 , H04N5/365 , H04N5/3745 , H04N5/335
CPC分类号： H04N5/3745 , G11C27/024 , H01L27/14609 , H04N5/3572 , H04N5/3651
摘要： Image transduction device pixel cells are described which have analog memory integrated with the pixel transduction elements and arrays made from such pixel cells. The integrated pixel cells are capable of storing information which, for example, can achieve a desired transduction transfer function for a given pixel transduction element. While the present invention may be used with any type of continuously variable, settable, and nonvolatile analog memory, the analog memory is beneficially based on a ferroelectric gate transistor comprised of an amorphous silicon transistor integrated with a ferroelectric gate dielectric layer or an amorphous silicon transistor with a charge storage dielectric gate layer.

62. 发明授权

US5117114A High resolution amorphous silicon radiation detectors 失效
标题翻译：高分辨率非晶硅辐射探测器
公开(公告)号：US5117114A
公开(公告)日：1992-05-26
申请号：US448240
申请日：1989-12-11
申请人： Robert A. Street , Selig N. Kaplan , Victor Perez-Mendez
发明人： Robert A. Street , Selig N. Kaplan , Victor Perez-Mendez
IPC分类号： G01T1/20 , G01T1/24 , H01L31/0232 , H01L31/117
CPC分类号： H01L31/0232 , G01T1/2018 , H01L31/02322 , H01L31/117 , Y10S257/926
摘要： A radiation detector employing amorphous Si:H cells in an array with each detector cell having at least three contiguous layers (n type, intrinsic, p type), positioned between two electrodes to which a bias voltage is applied. An energy conversion layer atop the silicon cells intercepts incident radiation and converts radiation energy to light energy of a wavelength to which the silicon cells are responsive. A read-out device, positioned proximate to each detector element in an array allows each such element to be interrogated independently to determine whether radiation has been detected in that cell. The energy conversion material may be a layer of luminescent material having a columnar structure. In one embodiment a column of luminescent material detects the passage therethrough of radiation to be detected and directs a light beam signal to an adjacent a-Si:H film so that detection may be confined to one or more such cells in the array. One or both electrodes may have a comb structure, and the teeth of each electrode comb may be interdigitated for capacitance reduction. The amorphous Si:H film may be replaced by an amorphous Si:Ge:H film in which up to 40 percent of the amorphous material is Ge. Two dimensional arrays may be used in X-ray imaging, CT scanning, crystallography, high energy physics beam tracking, nuclear medicine cameras and autoradiography.
摘要翻译：一种辐射检测器，其采用阵列中的非晶Si：H电池，其中每个检测器单元具有至少三个相邻层（n型，本征型，p型），位于施加有偏置电压的两个电极之间。硅单元顶部的能量转换层拦截入射辐射，并将辐射能转换成硅单元响应的波长的光能。位于阵列中的每个检测器元件附近的读出装置允许独立地询问每个这样的元件以确定是否在该单元中检测到辐射。能量转换材料可以是具有柱状结构的发光材料层。在一个实施例中，一列发光材料检测待检测的辐射的通过，并将光束信号引导到相邻的a-Si：H膜，使得检测可以局限于阵列中的一个或多个这样的单元。一个或两个电极可以具有梳状结构，并且每个电极梳的齿可以相互交叉以减少电容。非晶Si：H膜可以由非晶Si：Ge：H膜替代，其中高达40％的无定形材料是Ge。二维阵列可用于X射线成像，CT扫描，晶体学，高能物理光束跟踪，核医学相机和放射自显影。

63. 发明授权

US08854403B2 Image forming apparatus with a TFT backplane for xerography without a light source 有权
标题翻译：具有用于无光源的静电复印的TFT背板的图像形成装置
公开(公告)号：US08854403B2
公开(公告)日：2014-10-07
申请号：US12366680
申请日：2009-02-06
申请人： Vladislav Skorokhod , Gregory McGuire , Robert A. Street
发明人： Vladislav Skorokhod , Gregory McGuire , Robert A. Street
IPC分类号： B41J2/39 , B41J2/395 , G03G15/32
CPC分类号： B41J2/39 , G03G15/32
摘要： Systems and methods are described that facilitate using TFT control of electronic discharge for surface potential reduction and latent image formation on an imaging member. Corona charging is performed to first create a background surface potential, followed by selective discharge of individual pixels using an array of TFTs to supply free charge carriers to reduce the electrostatic surface potential to nearly zero. This is followed by discharged area development (DAD) to develop the latent image on a print medium (e.g., paper). The described systems and methods do not require a HVPS to drive the backplane; therefore, the TFT matrix is electrostatically decoupled from the developer and other system components in direct contact with the imaging member. Accordingly, known addressing systems may be used to address the TFT array.
摘要翻译：描述了有助于使用电子放电的TFT控制来在成像构件上进行表面电位降低和潜像形成的系统和方法。执行电晕充电以首先产生背景表面电位，随后使用TFT阵列选择性地放电各个像素，以提供免费电荷载流子，以将静电表面电位降低到接近零。随后是放电区域开发（DAD），以在打印介质（例如纸）上显影潜像。所描述的系统和方法不需要HVPS来驱动背板; 因此，TFT矩阵与显影剂和与成像构件直接接触的其它系统部件静电分离。因此，已知的寻址系统可以用于寻址TFT阵列。

64. 发明授权

US08643685B2 Photoreceptor with a TFT backplane for xerography without a ROS system 有权
标题翻译：具有TFT背板的感光体，用于没有ROS系统的静电复印
公开(公告)号：US08643685B2
公开(公告)日：2014-02-04
申请号：US12366665
申请日：2009-02-06
申请人： Gregory McGuire , Vladislav Skorokhod , Robert A. Street
发明人： Gregory McGuire , Vladislav Skorokhod , Robert A. Street
IPC分类号： B41J2/39 , B41J2/395
CPC分类号： G03G15/32 , G03G15/04054 , G03G2215/0407
摘要： Systems and methods are described that facilitate eliminating a need for a raster output scanner (ROS) or laser when generating a latent image on a photoreceptor. An addressable backplane is employed, comprising an array of field effect transistors (e.g., silicon or organic thin film transistors, or TFTs), wherein each TFT corresponds to a single pixel on a charge transport layer on the photoreceptor surface. Latent image formation is performed by forming a surface potential using corona charging, and then directing free charge carriers toward the photoreceptor surface to reduce electrostatic potential in areas that need to be toned. TFTs in the array are individually addressed, or selected, to connect to a common ground, which allows photodischarge to occur only in selected areas (e.g., pixels associated with the selected TFTs). Once the array of TFTs is addressed, an LED light source emits light over the surface of the photoreceptor, and only the selected (grounded) TFTs permit their associated pixels to discharge. In this manner, a latent image is formed without a need for a bulky and expensive ROS.
摘要翻译：描述了系统和方法，其在光感受器上产生潜像时有助于消除对光栅输出扫描器（ROS）或激光器的需要。采用可寻址的背板，其包括场效应晶体管阵列（例如硅或有机薄膜晶体管或TFT），其中每个TFT对应于感光体表面上的电荷传输层上的单个像素。通过使用电晕充电形成表面电位，然后将自由电荷载体引导到感光体表面来降低需要调色的区域中的静电潜力来进行潜在的图像形成。阵列中的TFT被单独寻址或选择以连接到公共地，这允许仅在选定区域（例如，与所选择的TFT相关联的像素）中发生光电荷放电。一旦解决了TFT阵列，LED光源就会在感光体的表面上发光，只有选定的（接地的）TFT允许其相关像素放电。以这种方式，形成潜像，而不需要庞大且昂贵的ROS。

65. 发明授权

US08430705B1 Self assembly of field emission tips by capillary bridge formations 有权
标题翻译：通过毛细管桥结构自发组装场发射尖端
公开(公告)号：US08430705B1
公开(公告)日：2013-04-30
申请号：US13291593
申请日：2011-11-08
申请人： Sanjiv Sambandan , John E. Northrup , Gregory L. Whiting , Robert A. Street
发明人： Sanjiv Sambandan , John E. Northrup , Gregory L. Whiting , Robert A. Street
IPC分类号： H01J1/62 , H01J63/04 , H01J9/00
CPC分类号： H01J9/025 , H01J2329/0415
摘要： A first side has a first surface on which is located a material, at least a portion of which is to be formed into at least one tip. A second side has a second surface which is heated. At least one of the first and second surfaces being moved so material located on the first surface comes into physical contact with the second surface. Then at least one of the first side and the second side are moved, wherein the physical contact between the material and the second surface is maintained, causing the material to stretch between the second surface and the first surface, generating at least one capillary bridge. Movement is continued until the physical contact between the material and the second surface is broken resulting in the formation of at least one sharp conductive tip.
摘要翻译：第一侧面具有第一表面，其上定位有材料，其至少一部分将形成至少一个尖端。第二面具有被加热的第二表面。第一和第二表面中的至少一个被移动，使得位于第一表面上的材料与第二表面物理接触。然后移动第一侧面和第二侧面中的至少一个，其中保持材料和第二表面之间的物理接触，使材料在第二表面和第一表面之间拉伸，产生至少一个毛细管桥。继续移动，直到材料和第二表面之间的物理接触被破坏，从而形成至少一个尖锐的导电尖端。

66. 发明申请

US20130001689A1 TEXTURED GATE FOR HIGH CURRENT THIN FILM TRANSISTORS 有权
标题翻译：用于高电流薄膜晶体管的纹理栅格
公开(公告)号：US20130001689A1
公开(公告)日：2013-01-03
申请号：US13173344
申请日：2011-06-30
申请人： Sanjiv Sambandan , Robert A. Street
发明人： Sanjiv Sambandan , Robert A. Street
IPC分类号： H01L27/12 , H01L21/336
CPC分类号： H01L29/42384
摘要： A textured thin film transistor is comprised of an insulator sandwiched between a textured gate electrode and a semi-conductor. A source electrode and drain electrode are fabricated on a surface of the semi-conductor. The textured gate electrode is fabricated such that a surface is modified in its texture and/or geometry, such modifications affecting the transistor current.
摘要翻译：纹理化薄膜晶体管由夹在纹理化栅极电极和半导体之间的绝缘体构成。在半导体的表面上制造源电极和漏电极。纹理化栅极电极被制造成使得表面在其纹理和/或几何形状中被修改，这种修改影响晶体管电流。

67. 发明授权

US08269219B2 Printed TFT and TFT array with self-aligned gate 有权
标题翻译：具有自对准栅极的印刷TFT和TFT阵列
公开(公告)号：US08269219B2
公开(公告)日：2012-09-18
申请号：US13280407
申请日：2011-10-25
申请人： Robert A. Street
发明人： Robert A. Street
IPC分类号： H01L29/786
CPC分类号： H01L29/4908 , H01L27/124 , H01L27/1292 , H01L29/66742 , H01L29/786
摘要： A method is used to form a self-aligning thin film transistor. The thin film transistor includes a gate contact formed with a state-switchable material, and a dielectric layer to isolate the gate contact. A source-drain layer, which includes a source contact, and a drain contact are formed with a source-drain material. An area of the gate contact is exposed to a form of energy, wherein the energy transforms a portion of the state switchable material from a non-conductive material to a conductive material, the conductive portion defining the gate contact. A semiconductor material is formed between the source contact and the drain contact.
摘要翻译：使用一种方法来形成自对准薄膜晶体管。薄膜晶体管包括形成有状态切换材料的栅极触点和用于隔离栅极接触的介电层。源极 - 漏极层，其包括源极接触和漏极接触，形成有源极 - 漏极材料。栅极接触的区域暴露于能量的形式，其中能量将状态可切换材料的一部分从非导电材料转变为导电材料，导电部分限定栅极接触。源极触点和漏极触点之间形成半导体材料。

68. 发明申请

US20110095272A1 Organic Memory Array With Ferroelectric Field-Effect Transistor Pixels 有权
标题翻译：有机存储阵列与铁电场效应晶体管像素
公开(公告)号：US20110095272A1
公开(公告)日：2011-04-28
申请号：US12607890
申请日：2009-10-28
申请人： Tse Nga Ng , Ana C. Arias , Sanjiv Sambandan , Robert A. Street , Jurgen H. Daniel
发明人： Tse Nga Ng , Ana C. Arias , Sanjiv Sambandan , Robert A. Street , Jurgen H. Daniel
IPC分类号： H01L51/10
CPC分类号： H01L27/283 , B82Y10/00 , G11C11/22 , G11C13/0014 , H01L27/11507 , H01L27/286
摘要： An organic non-volatile memory array including multiple pixels and associated signal lines that are disposed on and between a substrate, a single ferroelectric dielectric layer, and a single organic dielectric layer, where each pixel includes a ferroelectric field-effect transistor (FeFET) and at least one organic thin-film field effect transistor (FET) that are connected to associated signal lines in a way that facilitates addressable reading and writing to the FeFET of a selected pixel without disturbing the data stored in adjacent pixels. Analog data storage in the FeFET array is also introduced that does not require analog-to-digital conversion of the stored data.
摘要翻译：一种有机非易失性存储器阵列，包括设置在衬底，单个铁电电介质层和单个有机电介质层之间和之间的多个像素和相关联的信号线，其中每个像素包括铁电场效应晶体管（FeFET）和至少一个有机薄膜场效应晶体管（FET），其以促进可寻址的读取和写入所选像素的FeFET的方式连接到相关联的信号线，而不会干扰存储在相邻像素中的数据。还引入了FeFET阵列中的模拟数据存储，不需要对存储的数据进行模数转换。

69. 发明申请

US20110027946A1 Horizontal Coffee-Stain Method Using Control Structure To Pattern Self-Organized Line Structures 有权
标题翻译：使用控制结构对自组织线结构进行水平咖啡染色方法
公开(公告)号：US20110027946A1
公开(公告)日：2011-02-03
申请号：US12900417
申请日：2010-10-07
申请人： Sanjiv Sambandan , Robert A. Street , Ana Claudia Arias
发明人： Sanjiv Sambandan , Robert A. Street , Ana Claudia Arias
IPC分类号： H01L21/336 , B05D5/00
CPC分类号： B82Y40/00 , B05D1/185 , H01L21/288 , H01L21/76838 , H01L29/40 , H01L51/0022 , H01L51/0508
摘要： A modified coffee-stain method for producing self-organized line structures and other very fine features that involves disposing a solution puddle on a target substrate, and then controlling the peripheral boundary shape of the puddle using a control structure that contacts the puddle's upper surface. The solution is made up of a fine particle solute dispersed in a liquid solvent wets and becomes pinned to both the target substrate and the control structure. The solvent is then caused to evaporate at a predetermined rate such that a portion of the solute forms a self-organized “coffee-stain” line structure on the target substrate surface that is contacted by the peripheral puddle boundary. The target structure is optionally periodically raised to generate parallel lines that are subsequently processed to form, e.g., TFTs for large-area electronic devices.
摘要翻译：一种用于生产自组织线结构和其它非常精细特征的改进的咖啡染色方法，其涉及在目标基底上设置溶液池，然后使用接触水坑上表面的控制结构来控制熔池的外围边界形状。溶液由分散在液体溶剂润湿剂中的细颗粒溶质组成，并被固定到靶基质和对照结构两者上。然后使溶剂以预定的速率蒸发，使得溶质的一部分在目标衬底表面上形成与周边水泥边界接触的自组织的“咖啡污渍”线结构。目标结构可选地周期性地升高以产生随后被处理以形成例如用于大面积电子器件的TFT的平行线。

70. 发明授权

US07754542B2 Printed TFT array 有权
标题翻译：印刷TFT阵列
公开(公告)号：US07754542B2
公开(公告)日：2010-07-13
申请号：US11960160
申请日：2007-12-19
申请人： Robert A. Street
发明人： Robert A. Street
IPC分类号： H01L21/00
CPC分类号： H01L29/04 , B33Y80/00 , H01L27/124 , H01L27/1292 , H01L51/0004 , Y02P80/30
摘要： An electronic device and/or component is manufactured using additive processing steps, including additive printing steps. A first layer is printed using additive printing techniques wherein a single first material is used to print the first layer in a single processing step. A second layer is printed in more than a single printing step where a first portion of the second layer is printed using a second material and a second portion of the second layer is printed using a third material, and the second and third materials are different from each other.
摘要翻译：使用附加处理步骤制造电子设备和/或部件，包括添加剂印刷步骤。使用添加剂印刷技术印刷第一层，其中单个第一材料用于在单个处理步骤中印刷第一层。在多于一个印刷步骤中印刷第二层，其中使用第二材料印刷第二层的第一部分，并且使用第三材料印刷第二层的第二部分，并且第二和第三材料不同于彼此。

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