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61. 发明申请

US20130037965A1 THREE-DIMENSIONAL INTEGRATED CIRCUIT, PROCESSOR, SEMICONDUCTOR CHIP, AND MANUFACTURING METHOD OF THREE-DIMENSIONAL INTEGRATED CIRCUIT 有权
标题翻译：三维集成电路的三维集成电路，处理器，半导体芯片和三维集成电路的制造方法
公开(公告)号：US20130037965A1
公开(公告)日：2013-02-14
申请号：US13637729
申请日：2012-04-02
申请人： Takashi Morimoto , Takeshi Nakayama , Takashi Hashimoto
发明人： Takashi Morimoto , Takeshi Nakayama , Takashi Hashimoto
IPC分类号： H01L23/485 , H01L21/768
CPC分类号： H01L23/485 , H01L23/481 , H01L23/5223 , H01L23/5286 , H01L25/0657 , H01L27/0688 , H01L2224/16145 , H01L2224/48 , H01L2224/48091 , H01L2224/73265 , H01L2225/06527 , H01L2225/06544 , H01L2225/06558 , H01L2225/06565 , H01L2924/13091 , H01L2924/30107 , H01L2924/00014 , H01L2924/00
摘要： One aspect of the present invention is a three-dimensional integrated circuit 1 including a first semiconductor chip and a second semiconductor chip that are layered on each other, wherein each of (i) a wiring layer closest to an interface between the first and second semiconductor chips among wiring layers of the first semiconductor chip and (ii) a wiring layer closest to the interface among wiring layers of the second semiconductor chip includes a power conductor area and a ground conductor area, a layout of the power conductor area and the ground conductor area in the first semiconductor chip is the same as a layout of the power conductor area and the ground conductor area in the second semiconductor chip, and the power conductor area in the first semiconductor chip at least partially faces the ground conductor area in the second semiconductor chip with an insulation layer therebetween.
摘要翻译：本发明的一个方面是包括彼此层叠的第一半导体芯片和第二半导体芯片的三维集成电路1，其中，（i）最靠近第一和第二半导体之间的界面的布线层第一半导体芯片的布线层之间的芯片和（ii）最靠近第二半导体芯片的布线层之间的界面的布线层包括电源导体区域和接地导体区域，电源导体区域和接地导体的布局第一半导体芯片中的区域与第二半导体芯片中的电源导体区域和接地导体区域的布局相同，并且第一半导体芯片中的电力导体区域至少部分地面对第二半导体中的接地导体区域芯片之间具有绝缘层。

62. 发明授权

US08363492B2 Delay adjustment device and delay adjustment method 有权
标题翻译：延时调整装置和延时调整方法
公开(公告)号：US08363492B2
公开(公告)日：2013-01-29
申请号：US13056020
申请日：2010-05-27
申请人： Kouichi Ishino , Takeshi Nakayama , Masahiro Ishii
发明人： Kouichi Ishino , Takeshi Nakayama , Masahiro Ishii
IPC分类号： G11C7/00
CPC分类号： G06F13/1689
摘要： Provided is a delay adjustment device for adjusting delay of a strobe signal, which specifies when to read a data signal on a data line, with respect to the data signal in order to perform data transfer with an external memory. A testing unit 150 included in a delay adjustment unit is provided with a memory bandwidth monitoring unit 212 that monitors memory bandwidth in use on the data line used for data transfer with a memory circuit. The testing unit 150 performs delay adjustment when the memory bandwidth in use is lower than a predetermined threshold. Delay adjustment is performed by delaying the strobe signal from the data signal by a variety of predetermined delays and determining whether data transfer is successful at each delay, calculating an optimal delay, and thereafter delaying the strobe signal by the calculated delay.
摘要翻译：提供了一种用于调整选通信号的延迟的延迟调整装置，该选通信号指定何时读取数据线上的数据信号，以便与外部存储器进行数据传送。包括在延迟调整单元中的测试单元150设置有存储带宽监视单元212，其利用用于与存储器电路进行数据传输的数据线一起使用中的存储器带宽。当使用的存储器带宽低于预定阈值时，测试单元150执行延迟调整。通过将数据信号的选通信号延迟各种预定的延迟并确定数据传输是否在每个延迟成功，计算最佳延迟，然后将选通信号延迟所计算的延迟来执行延迟调整。

63. 发明授权

US07788076B2 Interference analysis method, interference analysis device, interference analysis program and recording medium with interference analysis program recorded thereon 有权
标题翻译：干扰分析方法，干扰分析装置，干扰分析程序和记录有干扰分析程序的记录介质
公开(公告)号：US07788076B2
公开(公告)日：2010-08-31
申请号：US11076212
申请日：2005-03-08
申请人： Hideki Iwaki , Tetsuyoshi Ogura , Naoki Komatsu , Takeshi Nakayama , Tomohiro Kinoshita
发明人： Hideki Iwaki , Tetsuyoshi Ogura , Naoki Komatsu , Takeshi Nakayama , Tomohiro Kinoshita
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： An interference analysis device can be provided, which analyzes interference between wirings of a circuit board with reduced load and for a short time period. The interference analysis device according to the present invention includes: a design data input part for inputting design data of the circuit board; a noise characteristics setting part that sets data representing electrical characteristics of noise for a wiring of the circuit board; a limit value setting part that sets an allowable limit value of noise received by a wiring; a selection part that selects a wiring group to be analyzed based on the noise characteristics data and the allowable limit value; an interference analysis part that calculates, concerning the selected wiring group, an amount of interference from a wiring giving the interference to a wiring receiving the interference; and a received noise level calculation part that calculates a noise level that the wiring receiving the interference will receive.
摘要翻译：可以提供干扰分析装置，其分析电路板的布线之间的负载和短时间内的干扰。根据本发明的干扰分析装置包括：设计数据输入部分，用于输入电路板的设计数据; 噪声特性设定部，其设定表示所述电路基板的布线的噪声的电特性的数据; 极限值设定部，其设定由布线接收到的噪声的允许限制值; 选择部，其基于所述噪声特性数据和所述容许极限值来选择要分析的布线组; 干扰分析部，其对与所述接线组相关的干扰分析部，计算与所述干扰对应的布线的干扰量的干扰量; 以及接收噪声电平计算部，其计算接收到干扰的接线的噪声电平。

64. 发明申请

US20090161426A1 MEMORY PROGRAMMING METHOD AND DATA ACCESS METHOD 有权
标题翻译：存储器编程方法和数据访问方法
公开(公告)号：US20090161426A1
公开(公告)日：2009-06-25
申请号：US12335784
申请日：2008-12-16
申请人： Chun-Yi TU , Te-Chang Tseng , Hideki Arakawa , Takeshi Nakayama
发明人： Chun-Yi TU , Te-Chang Tseng , Hideki Arakawa , Takeshi Nakayama
IPC分类号： G11C16/04
CPC分类号： G11C16/10
摘要： A memory programming method is provided. A first programming operation is performed to program a multi level cell from an initial state to a first target state, which corresponds to a storage data and has a first threshold voltage range. A flag bit of the NAND flash is set to a first state to indicate that the first programming operation has been performed. A second programming operation is performed to program the multi level cell from the first target state to a second target state, which corresponds to the storage data and has a second threshold voltage range. The flag bit is set to a second state to indicate that the second programming operation has been performed.
摘要翻译：提供了存储器编程方法。执行第一编程操作以将多级单元从初始状态编程到对应于存储数据的第一目标状态，并具有第一阈值电压范围。 NAND闪存的标志位被设置为第一状态以指示已经执行了第一编程操作。执行第二编程操作以将多级单元从第一目标状态编程为对应于存储数据并具有第二阈值电压范围的第二目标状态。标志位被设置为第二状态以指示已经执行了第二编程操作。

65. 发明申请

US20080271352A1 Traffic Sign Apparatus 审中-公开
标题翻译：交通标志装置
公开(公告)号：US20080271352A1
公开(公告)日：2008-11-06
申请号：US10585870
申请日：2005-01-19
申请人： Takeshi Nakayama , Akira Abe , Dai Shimizu , Fumihiro Itoshima , Kazuo Harada , Masahiro Oda , Yasuhiro Makii
发明人： Takeshi Nakayama , Akira Abe , Dai Shimizu , Fumihiro Itoshima , Kazuo Harada , Masahiro Oda , Yasuhiro Makii
IPC分类号： G09F13/02
CPC分类号： G09F13/02 , G09F13/42
摘要： There is provided a traffic sign apparatus that can improve the luminance of a sign surface which emits light by ultraviolet irradiation, and the uniformity ratio of illuminance, so as to enhance the visibility thereof in the nighttime. The traffic sign apparatus 10 includes a sign body 11 having the sign surface 14 which emits light by ultraviolet irradiation, and an irradiation device 12 for irradiating ultraviolet rays onto the sign surface 14. Assuming that the maximum incident angle of the ultraviolet rays be θ1, the ultraviolet rays being irradiated from the ultraviolet emission lamps 26 of the irradiation unit 12 onto the objective sign surfaces W1 and W2 on the sign surface 14 which is the irradiation object of the ultraviolet emission lamps 26; and that the minimum incident angle be θ2, the angle θ1 is set to more than 30° and less than 70°; and the angle θ 2 is set to more than 5° and less than 30°.
摘要翻译：提供一种交通标志装置，其可以通过紫外线照射提高发光的标志面的亮度和照度的均匀性，从而提高夜间的可见度。交通标志装置10包括具有通过紫外线照射发光的标志面14的标志体11和用于将紫外线照射在标志面14上的照射装置12。假设紫外线的最大入射角为θ1，则从照射单元12的紫外线发射灯26照射到作为照射对象的标志面14上的物体标记面W 1，W 2上的紫外线的紫外线发射灯26; 并且最小入射角为θ2，将角度θ设定为大于30°并小于70°; 并且角度θ2设定为大于5°且小于30°。

66. 发明授权

US07129613B2 Rotating electrical machine and drive system of cage induction motor 有权
标题翻译：笼式感应电机的旋转电机和驱动系统
公开(公告)号：US07129613B2
公开(公告)日：2006-10-31
申请号：US11074745
申请日：2005-03-09
申请人： Kazuo Nishihama , Kazumasa Ide , Tetsuo Fujigaki , Shuuji Mizutani , Takeshi Nakayama
发明人： Kazuo Nishihama , Kazumasa Ide , Tetsuo Fujigaki , Shuuji Mizutani , Takeshi Nakayama
IPC分类号： H02K17/16
CPC分类号： H02K17/165
摘要： A rotor conductor upper portion positioned near to an outer periphery of a rotor has a trapezoidal, cross sectional shape, a rotor conductor lower portion positioned nearer to a center of the rotor than the rotor conductor upper portion has a rectangular, cross sectional shape, and the rotor conductor upper portion has a height h1=27 mm or more in the case where rotor conductors are made of brass, and a height h1=7 mm or more in the case where the rotor conductors are made of copper.
摘要翻译：位于转子的外周附近的转子导体上部具有梯形截面形状，与转子导体上部具有矩形横截面形状相比位于转子中心更靠近转子的转子导体下部，以及转子导体上部在转子导体由黄铜制成的情况下的高度h 1 = 27mm以上，在转子导体为铜的情况下的高度h 1 = 7mm以上。

67. 发明申请

US20050289269A1 Slave device, master device and stacked device 有权
标题翻译：从设备，主设备和堆叠设备
公开(公告)号：US20050289269A1
公开(公告)日：2005-12-29
申请号：US11149171
申请日：2005-06-10
申请人： Takeshi Nakayama , Eiji Takahashi , Yoshiyuki Saito , Yukihiro Ishimaru , Hideki Iwaki
发明人： Takeshi Nakayama , Eiji Takahashi , Yoshiyuki Saito , Yukihiro Ishimaru , Hideki Iwaki
IPC分类号： G06F13/00 , G06F13/40 , G06F13/42
CPC分类号： G06F13/409 , G06F13/4226 , H01L2224/05001 , H01L2224/05009 , H01L2224/05568 , H01L2224/16145 , H01L2924/00014 , H01L2224/05599 , H01L2224/05099
摘要： A stacked device is disclosed which is easily manufactured while identifying a plurality of devices that are stacked in the stacked device. The stacked device includes a stack of a plurality of slave devices and a master device having identical terminal arrangements. Here, the master device includes command transmission unit configured to input an identification command to a terminal of an adjacent slave device. Furthermore, the slave device includes a through-wire for interconnecting at least one terminal of that same device and an adjacent slave device; command reception unit configured to receive the identification command; and ID (identifier) setting unit configured to set the ID of that same device based on the identification command; the positions of the terminals that are interconnected with the adjacent slave devices differing in each slave device, so that, in each slave device, the slave device command reception unit receive an identification command having a modified value as a result of transiting through-wires that are connected at differing positions in each slave device.
摘要翻译：公开了一种容易制造的堆叠式装置，同时识别堆叠在堆叠装置中的多个装置。堆叠式装置包括多个从装置的堆叠和具有相同端子装置的主装置。这里，主设备包括命令传输单元，其被配置为向相邻从设备的终端输入识别命令。此外，从设备包括用于互连同一设备的至少一个终端和相邻从设备的通线; 命令接收单元，被配置为接收所述识别命令; ID（识别符）设定部，其基于所述识别命令来设定同一设备的ID; 与相邻从设备互连的终端的位置在每个从设备中不同，从而在每个从设备中，从设备命令接收单元接收作为转接通线的结果具有修改值的标识命令，被连接在每个从设备中的不同位置。

68. 发明授权

US06882078B2 Rotating electrical machine and drive system of cage induction motor 有权
标题翻译：笼式感应电机的旋转电机和驱动系统
公开(公告)号：US06882078B2
公开(公告)日：2005-04-19
申请号：US10775227
申请日：2004-02-11
申请人： Kazuo Nishihama , Kazumasa Ide , Tetsuo Fujigaki , Shuuji Mizutani , Takeshi Nakayama
发明人： Kazuo Nishihama , Kazumasa Ide , Tetsuo Fujigaki , Shuuji Mizutani , Takeshi Nakayama
IPC分类号： H02K17/20 , H02K17/16
CPC分类号： H02K17/165
摘要： A rotor conductor upper portion positioned near to an outer periphery of a rotor has a trapezoidal, cross sectional shape, a rotor conductor lower portion positioned nearer to a center of the rotor than the rotor conductor upper portion has a rectangular, cross sectional shape, and the rotor conductor upper portion has a height h1=27 mm or more in the case where rotor conductors are made of brass, and a height h1=7 mm or more in the case where the rotor conductors are made of copper.
摘要翻译：位于转子的外周附近的转子导体上部具有梯形截面形状，与转子导体上部具有矩形横截面形状相比位于转子中心更靠近转子的转子导体下部，以及转子导体上部在转子导体由黄铜制成的情况下的高度h 1 = 27mm以上，在转子导体为铜的情况下的高度h 1 = 7mm以上。

69. 发明授权

US06630776B2 Color cathode ray tube 失效
公开(公告)号：US06630776B2
公开(公告)日：2003-10-07
申请号：US10025929
申请日：2001-12-26
申请人： Takeshi Nakayama , Shinichiro Nakagawa , Takashi Murai , Masatsugu Inoue
发明人： Takeshi Nakayama , Shinichiro Nakagawa , Takashi Murai , Masatsugu Inoue
IPC分类号： H01J2980
CPC分类号： H01J29/073 , H01J2229/0716 , H01J2229/0772
摘要： A shadow mask includes a substantially rectangular effective region formed having a number of electron beam passage apertures and opposed to a phosphor screen and a substantially rectangular skirt portion provided around the effective region and extending in the direction of a tube axis. The skirt portion has a pair of long sides extending substantially parallel to a major axis and a pair of short sides extending substantially parallel to a minor axis, the long and short sides being welded to the inner surface of a substantially rectangular mask frame. A distance a from an extending end of the skirt portion on each long side to the weld spot is longer than a distance b from an extending end of the skirt portion on each short side to the weld spot.

70. 发明授权

US5870419A Double heterojunction semiconductor laser having improved light confinement 失效
标题翻译：具有改进的光限制的双异质结半导体激光器
公开(公告)号：US5870419A
公开(公告)日：1999-02-09
申请号：US996254
申请日：1997-12-22
申请人： Takeshi Nakayama
发明人： Takeshi Nakayama
IPC分类号： H01S5/00 , H01S5/042 , H01S5/12 , H01S5/20 , H01S5/223 , H01S5/32 , H01S3/19
CPC分类号： H01S5/0421 , H01S5/20 , H01S5/0425 , H01S5/12 , H01S5/2004 , H01S5/2231 , H01S5/3216
摘要： A double heterojunction semiconductor laser includes a semiconductor substrate of a first semiconductor material having a first conductivity type; successively disposed on the semiconductor substrate, a first cladding layer of the first conductivity type, an active layer, and a second cladding layer of a second conductivity type, opposite the first conductivity type, the second cladding layer having a central ridge including side surfaces and a top surface; a current blocking layer of the first conductivity type disposed on the second cladding layer and contacting the side surfaces of the ridge; a second conductivity type contact layer of the first semiconductor material disposed on the top surface of the ridge and on the current blocking layer; and first and second electrodes contacting the semiconductor substrate and the contact layer, respectively, wherein at least one of the first and second cladding layers is a superlattice layer including a plurality of alternating layers of different compositions, the superlattice layer lattice matching with the first semiconductor material.
摘要翻译：双异质结半导体激光器包括具有第一导电类型的第一半导体材料的半导体衬底; 依次配置在所述半导体基板上，与所述第一导电型相反的第一导电型的第一包层，第二导电型的有源层和第二包层，所述第二包层具有包括侧面的中心脊，顶面所述第一导电类型的电流阻挡层设置在所述第二覆层上并与所述脊的侧表面接触; 所述第一半导体材料的第二导电型接触层设置在所述脊的顶表面上和所述电流阻挡层上; 以及分别与所述半导体衬底和所述接触层接触的第一和第二电极，其中所述第一和第二覆层中的至少一个是包括多个不同组成的交替层的超晶格层，所述超晶格层晶格与所述第一半导体材料。

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