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61. 发明授权

US5462997A Polyhydric phenol, and epoxy resin and epoxy resin composition derived therefrom 失效
标题翻译：多元酚，环氧树脂和环氧树脂组合物
公开(公告)号：US5462997A
公开(公告)日：1995-10-31
申请号：US328771
申请日：1994-10-27
申请人： Noriaki Saito , Takashi Morimoto , Kazuo Takebe , Yutaka Shiomi , Shigeki Naitoh , Shuichi Kanagawa
发明人： Noriaki Saito , Takashi Morimoto , Kazuo Takebe , Yutaka Shiomi , Shigeki Naitoh , Shuichi Kanagawa
IPC分类号： C08G8/20 , C08G59/00 , C08G59/06 , C08G59/08 , C08G59/20 , C08G59/32 , C08G59/62 , C08L63/00 , C08G8/36 , C08L63/04
CPC分类号： C08G59/08 , C08G59/3218 , C08G59/621 , Y10T428/239 , Y10T428/24917
摘要： An epoxy resin composition contains (a) an epoxy resin represented by the general formula (2) ##STR1## wherein R.sub.1 to R.sub.4 independently represent hydrogen, an alkyl or cycloalkyl group having 1 to 9 carbon atoms, or halogen, and X represents hydrogen, an alkyl group having 1 to 9 carbon atoms, or an aryl and n represents an average number of repeating units of 0.1 to 1.6; and a curing agent.
摘要翻译：环氧树脂组合物含有（a）由通式（2）表示的环氧树脂，其中R1至R4独立地表示氢，具有1至9个碳原子的烷基或环烷基或卤素，X表示氢，具有1至9个碳原子的烷基或芳基，n表示重复单元的平均数为0.1至1.6; 和固化剂。

62. 发明授权

US5267917A Rotary element engaging device for an automatic transmission 失效
标题翻译：用于自动变速器的旋转元件接合装置
公开(公告)号：US5267917A
公开(公告)日：1993-12-07
申请号：US964634
申请日：1992-10-23
申请人： Masanori Kadotani , Masahiro Haybuchi , Takashi Morimoto , Kazumasa Tsukamoto , Yasuo Hojo , Hidehiro Oba , Yutaka Taga
发明人： Masanori Kadotani , Masahiro Haybuchi , Takashi Morimoto , Kazumasa Tsukamoto , Yasuo Hojo , Hidehiro Oba , Yutaka Taga
IPC分类号： F16D41/00 , F16D55/40 , F16H3/66 , F16H57/08 , F16H63/30 , F16H57/10
CPC分类号： F16H57/08
摘要： A rotary element engaging device of an automatic transmission includes a stationary member, a planetary gear set having rotary elements, a frictionally engaging element interposed between the stationary member and one of the rotary elements, a one-way clutch interposed between the stationary member and the one rotary element, and an operating member for engaging and disengaging the frictionally engaging element. The rotary element is adapted to be selectively engaged with the stationary member through two paths formed of the frictionally engaging element and the one-way clutch. The one-way clutch is disposed between the frictionally engaging element and the operating member. The one-way clutch includes an inner race connected to the one rotary element and an outer race fixed to the stationary member. The operating member is adapted to act on the frictionally engaging element through the outer race.
摘要翻译：自动变速器的旋转元件接合装置包括固定构件，具有旋转元件的行星齿轮组，设置在静止构件和其中一个旋转元件之间的摩擦接合元件，插入在静止构件和静止构件之间的单向离合器一个旋转元件和用于接合和分离摩擦接合元件的操作构件。旋转元件适于通过由摩擦接合元件和单向离合器形成的两个路径选择性地与固定构件接合。单向离合器设置在摩擦接合元件和操作构件之间。单向离合器包括连接到一个旋转元件的内圈和固定到静止构件的外圈。操作构件适于通过外圈作用在摩擦接合元件上。

63. 发明授权

US4448800A Method for the manufacture of semiconductor device using refractory metal in a lift-off step 失效
$Method for the manufacture of semiconductor device using refractory metal in a lift-off step$
标题翻译：在剥离步骤中制造使用难熔金属的半导体器件的方法
公开(公告)号：US4448800A
公开(公告)日：1984-05-15
申请号：US403531
申请日：1982-07-30
申请人： Kohei Ehara , Susumu Muramoto , Takashi Morimoto , Seitaro Matsuo , Manabu Itsumi
发明人： Kohei Ehara , Susumu Muramoto , Takashi Morimoto , Seitaro Matsuo , Manabu Itsumi
IPC分类号： H01L21/033 , H01L21/768 , H01L21/302
CPC分类号： H01L21/7688 , H01L21/033 , Y10S148/10 , Y10S148/105 , Y10S438/951
摘要： A semiconductor manufacturing method which uses a refractory metal as a lift-off material and employs, in combination, a dry etching process suitable for forming a miniature pattern without undercutting and a film deposition method for deposing the lift-off material with directionality in a direction perpendicular to the substrate surface. A semiconductor device is fabricated by a lift-off method which is free from the fear of contamination, permits easy lift off of the lift-off material, even if large in area, and hence suitable for the formation of a high-density pattern.
摘要翻译：一种半导体制造方法，其使用难熔金属作为剥离材料，并用组合使用适于形成无底切的微型图案的干式蚀刻工艺，以及用于沿方向取向剥离材料的膜沉积方法垂直于衬底表面。半导体器件通过剥离方法制造，其不受污染的恐惧，即使面积大，容易剥离剥离材料，因此适合于形成高密度图案。

64. 发明授权

US09823269B2 Surface analyzer 有权
公开(公告)号：US09823269B2
公开(公告)日：2017-11-21
申请号：US13230644
申请日：2011-09-12
申请人： Takashi Morimoto
发明人： Takashi Morimoto
IPC分类号： G01Q30/04 , B82Y35/00
CPC分类号： G01Q30/04 , B82Y35/00
摘要： A technique for allowing users to efficiently specify a region of interest (ROI) on a sample for a certain physical quantity (e.g. phase) other than the altitude is provided. A range-indicating image showing a range that can be observed on a sample is displayed on a navigation window in a sample observation display screen. An ROI-indicating frame for specifying a magnified observation range is superposed on the range-indicating image. A list of thumbnails of previously taken magnified images for the same sample is displayed on an image history display window. When an observer selects any image from this list, the thumbnail of the selected image is mapped onto the range-indicating image. With reference to this image, the observer can change the position, size and/or angle of the ROI-indicating frame by a mouse operation. In response to this operation, a magnified image of the sample within the new ROI is acquired.

65. 发明授权

US09239363B2 Battery diagnosis device and method 有权
公开(公告)号：US09239363B2
公开(公告)日：2016-01-19
申请号：US12974828
申请日：2010-12-21
申请人： Akihiro Matsui , Kazuto Kuroda , Yasuhiro Harada , Shinichiro Kosugi , Hisashi Oya , Mami Mizutani , Takashi Morimoto , Takeo Hayase , Yukitaka Monden , Norio Takami
发明人： Akihiro Matsui , Kazuto Kuroda , Yasuhiro Harada , Shinichiro Kosugi , Hisashi Oya , Mami Mizutani , Takashi Morimoto , Takeo Hayase , Yukitaka Monden , Norio Takami
IPC分类号： H02J7/00 , G01R31/36 , H01M10/48 , G06Q50/06 , B60L3/00 , B60L3/04 , B60L3/12 , B60L11/18
CPC分类号： G01R31/3634 , B60L3/0046 , B60L3/04 , B60L3/12 , B60L11/1853 , B60L11/1861 , B60L11/1864 , B60L2240/545 , B60L2240/547 , B60L2240/549 , G01R31/3651 , G01R31/3658 , G01R31/3662 , G01R31/3679 , G01R31/3689 , G06Q50/06 , H01M10/48 , H01M2220/20 , Y02T10/7005 , Y02T10/7044 , Y02T10/7061
摘要： An apparatus is disclosed that includes a resistance measuring unit operable to determine a solution resistance Rsol and a charge transfer resistance Rct of a battery; and at least one computer-readable non-transitory storage medium comprising code, that, when executed by at least one processor, is operable to provide an estimate of the present value of the battery by: comparing Rsol and Rct to historical deterioration transition information; estimating the number of remaining charge cycles before a discharge capacity lower limit is reached by the battery using the comparison; and estimating the number of remaining charge cycles before a discharge time lower limit is reached by the battery using the comparison. The estimate of the present value of the battery includes the smaller of the number of remaining charge cycles before a discharge capacity lower limit is reached or the number of remaining charge cycles before a discharge time lower limit is reached.

66. 发明授权

US08846449B2 Three-dimensional integrated circuit, processor, semiconductor chip, and manufacturing method of three-dimensional integrated circuit 有权
标题翻译：三维集成电路，处理器，半导体芯片和三维集成电路的制造方法
公开(公告)号：US08846449B2
公开(公告)日：2014-09-30
申请号：US13637729
申请日：2012-04-02
申请人： Takashi Morimoto , Takeshi Nakayama , Takashi Hashimoto
发明人： Takashi Morimoto , Takeshi Nakayama , Takashi Hashimoto
IPC分类号： H01L21/44 , H01L23/48 , H01L27/06 , H01L25/065 , H01L23/528
CPC分类号： H01L23/485 , H01L23/481 , H01L23/5223 , H01L23/5286 , H01L25/0657 , H01L27/0688 , H01L2224/16145 , H01L2224/48 , H01L2224/48091 , H01L2224/73265 , H01L2225/06527 , H01L2225/06544 , H01L2225/06558 , H01L2225/06565 , H01L2924/13091 , H01L2924/30107 , H01L2924/00014 , H01L2924/00
摘要： One aspect of the present invention is a three-dimensional integrated circuit 1 including a first semiconductor chip and a second semiconductor chip that are layered on each other, wherein each of (i) a wiring layer closest to an interface between the first and second semiconductor chips among wiring layers of the first semiconductor chip and (ii) a wiring layer closest to the interface among wiring layers of the second semiconductor chip includes a power conductor area and a ground conductor area, a layout of the power conductor area and the ground conductor area in the first semiconductor chip is the same as a layout of the power conductor area and the ground conductor area in the second semiconductor chip, and the power conductor area in the first semiconductor chip at least partially faces the ground conductor area in the second semiconductor chip with an insulation layer therebetween.
摘要翻译：本发明的一个方面是包括彼此层叠的第一半导体芯片和第二半导体芯片的三维集成电路1，其中，（i）最靠近第一和第二半导体之间的界面的布线层第一半导体芯片的布线层之间的芯片和（ii）最靠近第二半导体芯片的布线层之间的界面的布线层包括电源导体区域和接地导体区域，电源导体区域和接地导体的布局第一半导体芯片中的区域与第二半导体芯片中的电源导体区域和接地导体区域的布局相同，并且第一半导体芯片中的电力导体区域至少部分地面对第二半导体中的接地导体区域芯片之间具有绝缘层。

67. 发明授权

US08677567B2 Hinge and bracket for hinge 有权
标题翻译：铰链和支架铰链
公开(公告)号：US08677567B2
公开(公告)日：2014-03-25
申请号：US13375071
申请日：2010-05-24
申请人： Takao Kobayashi , Ikuomi Takahashi , Makoto Saito , Takashi Morimoto , Toshihiro Tamura
发明人： Takao Kobayashi , Ikuomi Takahashi , Makoto Saito , Takashi Morimoto , Toshihiro Tamura
IPC分类号： E05C17/64 , E05D5/02
CPC分类号： G06F1/1681 , Y10T16/5402 , Y10T16/540255 , Y10T16/5403 , Y10T16/54038 , Y10T16/557 , Y10T16/558 , Y10T16/5595
摘要： Provided is a hinge that can be manufactured easily in a short time. The hinge rotatably connects a first member and a second member, and is provided with two brackets that are rotatable against each other and mounted to the first member and the second member, respectively, and a friction-torque-generating member that generates friction torque by directly or indirectly pressing the two brackets against each other. A first of the two brackets is configured from an integral structure that includes a shaft part that passes through the second bracket and supports the rotation, and a mounting part that is mounted to the first member or the second member, with the shaft part and the mounting part being produced from a plate material.
摘要翻译：提供了可以在短时间内容易地制造的铰链。铰链可旋转地连接第一构件和第二构件，并且设置有两个彼此可旋转地旋转并且分别安装到第一构件和第二构件的托架，以及摩擦转矩产生构件，其通过以下方式产生摩擦力矩：直接或间接地将两个支架彼此靠在一起。两个支架中的第一个由整体结构构成，其包括穿过第二支架并支撑旋转的轴部，以及安装到第一构件或第二构件的安装部，其具有轴部和安装部件由板材制成。

68. 发明授权

US08571284B2 Surface analyzer 有权
标题翻译：表面分析仪
公开(公告)号：US08571284B2
公开(公告)日：2013-10-29
申请号：US13232835
申请日：2011-09-14
申请人： Takashi Morimoto , Akinori Kogure
发明人： Takashi Morimoto , Akinori Kogure
IPC分类号： G06K9/00
CPC分类号： G01Q30/04 , H01J37/26 , H01J2237/221
摘要： A surface analyzer with which users only need to perform simple operations to quantitatively compare different physical quantities, such as the altitude and phase, in a region of interest on a sample is provided. A three-dimensional color image created by mapping color information corresponding to the phase onto a three-dimensional image created from two-dimensional distribution data of a sample's altitude is displayed in an analysis result display screen. A section image is superposed on the three-dimensional color image. The one-dimensional area at which the section image intersects the sample is defined as the region of interest. The altitude and phase along this region of interest are graphically shown on the graph display area. Various characteristic values at the position of these cursors, such as the altitude and phase values or the difference in these values between two cursors, are displayed in a characteristic value table.
摘要翻译：提供了一种表面分析器，用户只需要执行简单的操作即可定量比较样本中感兴趣区域中的不同物理量，如高度和相位。通过将对应于相位的颜色信息映射到由样本的高度的二维分布数据创建的三维图像上而形成的三维彩色图像显示在分析结果显示画面中。剖面图像叠加在三维彩色图像上。截面图像与样本相交的一维区域被定义为感兴趣的区域。沿着该感兴趣区域的高度和相位以图形显示在图形显示区域上。在特征值表中显示这些光标的位置上的各种特征值，例如高度和相位值，或两个光标之间的这些值的差异。

69. 发明申请

US20130135004A1 THREE-DIMENSIONAL INTEGRATED CIRCUIT AND TESTING METHOD FOR THE SAME 有权
公开(公告)号：US20130135004A1
公开(公告)日：2013-05-30
申请号：US13642673
申请日：2012-06-04
申请人： Takashi Hashimoto , Takashi Morimoto
发明人： Takashi Hashimoto , Takashi Morimoto
IPC分类号： G01R31/28
CPC分类号： G01R31/2887 , G01R31/2801 , G01R31/2853 , G01R31/2889 , G01R31/318513 , H01L22/10 , H01L22/14 , H01L25/0657 , H01L2224/06181 , H01L2224/16145 , H01L2225/06513 , H01L2225/06544 , H01L2225/06596 , H01L2924/0002 , H01L2924/00
摘要： Each chip in a three-dimensional circuit includes a pair of connections, a test signal generation circuit, and a test result judgment circuit. The connections are electrically connected with an adjacent chip. The test signal generation circuit outputs a test signal to one of the connections. The test result judgment circuit receives a signal from the other of the connections and, from the state of the signal, detects the conducting state of the transmission path for the signal. Before layering the chips, a conductor connects the connections to form a series connection, and the conducting state of each connection is detected from the conducting state of the series connection. After layering the chips, the test signal generation circuit in one chip outputs a test signal, and the test result judgment circuit in another chip receives the test signal, and thus the conducting state of the connections between the chips is tested.

70. 发明申请

US20130037965A1 THREE-DIMENSIONAL INTEGRATED CIRCUIT, PROCESSOR, SEMICONDUCTOR CHIP, AND MANUFACTURING METHOD OF THREE-DIMENSIONAL INTEGRATED CIRCUIT 有权
标题翻译：三维集成电路的三维集成电路，处理器，半导体芯片和三维集成电路的制造方法
公开(公告)号：US20130037965A1
公开(公告)日：2013-02-14
申请号：US13637729
申请日：2012-04-02
申请人： Takashi Morimoto , Takeshi Nakayama , Takashi Hashimoto
发明人： Takashi Morimoto , Takeshi Nakayama , Takashi Hashimoto
IPC分类号： H01L23/485 , H01L21/768
CPC分类号： H01L23/485 , H01L23/481 , H01L23/5223 , H01L23/5286 , H01L25/0657 , H01L27/0688 , H01L2224/16145 , H01L2224/48 , H01L2224/48091 , H01L2224/73265 , H01L2225/06527 , H01L2225/06544 , H01L2225/06558 , H01L2225/06565 , H01L2924/13091 , H01L2924/30107 , H01L2924/00014 , H01L2924/00
摘要： One aspect of the present invention is a three-dimensional integrated circuit 1 including a first semiconductor chip and a second semiconductor chip that are layered on each other, wherein each of (i) a wiring layer closest to an interface between the first and second semiconductor chips among wiring layers of the first semiconductor chip and (ii) a wiring layer closest to the interface among wiring layers of the second semiconductor chip includes a power conductor area and a ground conductor area, a layout of the power conductor area and the ground conductor area in the first semiconductor chip is the same as a layout of the power conductor area and the ground conductor area in the second semiconductor chip, and the power conductor area in the first semiconductor chip at least partially faces the ground conductor area in the second semiconductor chip with an insulation layer therebetween.
摘要翻译：本发明的一个方面是包括彼此层叠的第一半导体芯片和第二半导体芯片的三维集成电路1，其中，（i）最靠近第一和第二半导体之间的界面的布线层第一半导体芯片的布线层之间的芯片和（ii）最靠近第二半导体芯片的布线层之间的界面的布线层包括电源导体区域和接地导体区域，电源导体区域和接地导体的布局第一半导体芯片中的区域与第二半导体芯片中的电源导体区域和接地导体区域的布局相同，并且第一半导体芯片中的电力导体区域至少部分地面对第二半导体中的接地导体区域芯片之间具有绝缘层。

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