专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

61. 发明申请

US20130328121A1 MOSFET WITH IMPROVED PERFORMANCE THROUGH INDUCED NET CHARGE REGION IN THICK BOTTOM INSULATOR 有权
标题翻译：具有通过在底部绝缘体中的诱导网络充电区域改进的性能的MOSFET
公开(公告)号：US20130328121A1
公开(公告)日：2013-12-12
申请号：US13490138
申请日：2012-06-06
申请人： Xiaobin Wang , Anup Bhalla , Daniel Ng
发明人： Xiaobin Wang , Anup Bhalla , Daniel Ng
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7813 , H01L21/42 , H01L29/408 , H01L29/41766 , H01L29/42368 , H01L29/66734
摘要： A semiconductor power device includes a thick bottom insulator formed in a lower portion of a trench in a semiconductor epitaxial region. An electrically conductive gate electrode is formed in the trench above the bottom insulator. The gate electrode is electrically insulated from the epitaxial region by the bottom insulator and a gate insulator. Charge is deliberately induced in the thick bottom insulator proximate an interface between the bottom insulator and the epitaxial semiconductor region. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
摘要翻译：半导体功率器件包括形成在半导体外延区域中的沟槽的下部的厚的底部绝缘体。在底部绝缘体上方的沟槽中形成导电栅电极。栅极电极通过底部绝缘体和栅极绝缘体与外延区域电绝缘。在底部绝缘体和外延半导体区域之间的界面附近的厚底层绝缘体中有意地引起电荷。要强调的是，该摘要被提供以符合要求抽象的规则，允许搜索者或其他读者快速确定技术公开内容的主题。提交它的理解是，它不会用于解释或限制权利要求的范围或含义。

62. 发明授权

US08399925B2 Termination structure with multiple embedded potential spreading capacitive structures for trench MOSFET and method 有权
标题翻译：具有多个嵌入式电位扩展电容结构的端接结构，用于沟槽MOSFET和方法
公开(公告)号：US08399925B2
公开(公告)日：2013-03-19
申请号：US12704528
申请日：2010-02-12
申请人： Xiaobin Wang , Anup Bhalla , Hamza Yilmaz , Daniel Ng
发明人： Xiaobin Wang , Anup Bhalla , Hamza Yilmaz , Daniel Ng
IPC分类号： H01L29/66
CPC分类号： H01L29/407 , H01L21/76205 , H01L29/04 , H01L29/0619 , H01L29/0638 , H01L29/0649 , H01L29/0696 , H01L29/402 , H01L29/41766 , H01L29/42368 , H01L29/66727 , H01L29/66734 , H01L29/7803 , H01L29/7811 , H01L29/7813 , H01L2924/0002 , H01L2924/00
摘要： A termination structure with multiple embedded potential spreading capacitive structures (TSMEC) and method are disclosed for terminating an adjacent trench MOSFET atop a bulk semiconductor layer (BSL) with bottom drain electrode. The BSL has a proximal bulk semiconductor wall (PBSW) supporting drain-source voltage (DSV) and separating TSMEC from trench MOSFET. The TSMEC has oxide-filled large deep trench (OFLDT) bounded by PBSW and a distal bulk semiconductor wall (DBSW). The OFLDT includes a large deep oxide trench into the BSL and embedded capacitive structures (EBCS) located inside the large deep oxide trench and between PBSW and DBSW for spatially spreading the DSV across them. In one embodiment, the EBCS contains interleaved conductive embedded polycrystalline semiconductor regions (EPSR) and oxide columns (OXC) of the OFLDT, a proximal EPSR next to PBSW is connected to an active upper source region and a distal EPSR next to DBSW is connected to the DBSW.
摘要翻译：公开了具有多个嵌入式电位扩展电容结构（TSMEC）和方法的端接结构，用于在具有底部漏电极的体半导体层（BSL）的顶部端接邻近的沟槽MOSFET。 BSL具有支持漏极 - 源极电压（DSV）的近端体半导体壁（PBSW），并将TSMEC与沟槽MOSFET分离。 TSMEC具有由PBSW和远端体半导体壁（DBSW）界定的氧化物填充的大深沟槽（OFLDT）。 OFLDT包括位于大深度氧化物沟槽内部以及PBSW和DBSW之间的BSL中的大型深层氧化物沟槽和嵌入式电容结构（EBCS），用于在其间空间扩展DSV。在一个实施例中，EBCS包含OFLDT的交错导电嵌入式多晶半导体区域（EPSR）和氧化物柱（OXC），与PBSW相邻的近端EPSR连接到活动上部源区域，并且与DBSW相邻的远端EPSR被连接到星展集团

63. 发明授权

US08263482B2 Nano-tube MOSFET technology and devices 有权
标题翻译：纳米管MOSFET技术和器件
公开(公告)号：US08263482B2
公开(公告)日：2012-09-11
申请号：US13065880
申请日：2011-03-31
申请人： Hamza Yilmaz , Daniel Ng , Lingpeng Guan , Anup Bhalla , Wilson Ma , Moses Ho , John Chen
发明人： Hamza Yilmaz , Daniel Ng , Lingpeng Guan , Anup Bhalla , Wilson Ma , Moses Ho , John Chen
IPC分类号： H01L21/20 , H01L21/36
CPC分类号： H01L29/7827 , H01L29/0619 , H01L29/0634 , H01L29/0638 , H01L29/0649 , H01L29/0653 , H01L29/0696 , H01L29/0878 , H01L29/404 , H01L29/66136 , H01L29/66348 , H01L29/66666 , H01L29/66734 , H01L29/7322 , H01L29/7395 , H01L29/7397 , H01L29/7802 , H01L29/7811 , H01L29/7813 , H01L29/8083 , H01L29/861 , H01L29/872
摘要： This invention discloses a semiconductor power device disposed in a semiconductor substrate and the semiconductor substrate has a plurality of trenches. Each of the trenches is filled with a plurality of epitaxial layers of alternating conductivity types constituting nano tubes functioning as conducting channels stacked as layers extending along a sidewall direction with a “Gap Filler” layer filling a merging-gap between the nano tubes disposed substantially at a center of each of the trenches. The “Gap Filler” layer can be very lightly doped Silicon or grown and deposited dielectric layer. In an exemplary embodiment, the plurality of trenches are separated by pillar columns each having a width approximately half to one-third of a width of the trenches.
摘要翻译：本发明公开了一种设置在半导体衬底中的半导体功率器件，半导体衬底具有多个沟槽。每个沟槽填充有多个交替导电类型的外延层，其构成纳米管，其功能是作为沿着侧壁方向延伸的层堆叠的导电通道，“间隙填充”层填充基本上位于其上的纳米管之间的合并间隙每个沟渠的中心。 “间隙填料”层可以非常轻掺杂硅或生长和沉积的介电层。在一个示例性实施例中，多个沟槽被柱柱分隔开，柱柱各自具有沟槽宽度的大约一半到三分之一的宽度。

64. 发明申请

US20110183499A1 Nano-tube MOSFET technology and devices 有权
标题翻译：纳米管MOSFET技术和器件
公开(公告)号：US20110183499A1
公开(公告)日：2011-07-28
申请号：US13065880
申请日：2011-03-31
申请人： Hamza Yilmaz , Daniel Ng , Lingpeng Guan , Anup Bhalla , Wilson Ma , Moses Ho , John Chen
发明人： Hamza Yilmaz , Daniel Ng , Lingpeng Guan , Anup Bhalla , Wilson Ma , Moses Ho , John Chen
IPC分类号： H01L21/20 , B82Y40/00
CPC分类号： H01L29/7827 , H01L29/0619 , H01L29/0634 , H01L29/0638 , H01L29/0649 , H01L29/0653 , H01L29/0696 , H01L29/0878 , H01L29/404 , H01L29/66136 , H01L29/66348 , H01L29/66666 , H01L29/66734 , H01L29/7322 , H01L29/7395 , H01L29/7397 , H01L29/7802 , H01L29/7811 , H01L29/7813 , H01L29/8083 , H01L29/861 , H01L29/872
摘要： This invention discloses a semiconductor power device disposed in a semiconductor substrate and the semiconductor substrate has a plurality of trenches. Each of the trenches is filled with a plurality of epitaxial layers of alternating conductivity types constituting nano tubes functioning as conducting channels stacked as layers extending along a sidewall direction with a “Gap Filler” layer filling a merging-gap between the nano tubes disposed substantially at a center of each of the trenches. The “Gap Filler” layer can be very lightly doped Silicon or grown and deposited dielectric layer. In an exemplary embodiment, the plurality of trenches are separated by pillar columns each having a width approximately half to one-third of a width of the trenches.
摘要翻译：本发明公开了一种设置在半导体衬底中的半导体功率器件，半导体衬底具有多个沟槽。每个沟槽填充有多个交替导电类型的外延层，其构成纳米管，其功能是作为沿着侧壁方向延伸的层堆叠的导电通道，“间隙填充”层填充基本上位于其上的纳米管之间的合并间隙每个沟渠的中心。 “间隙填料”层可以非常轻掺杂硅或生长和沉积的介电层。在一个示例性实施例中，多个沟槽被柱柱分隔开，柱柱各自具有沟槽宽度的大约一半到三分之一的宽度。

65. 发明申请

US20100148246A1 Power mosfet device structure for high frequency applications 有权
标题翻译：用于高频应用的电源mosfet器件结构
公开(公告)号：US20100148246A1
公开(公告)日：2010-06-17
申请号：US12658450
申请日：2010-02-09
申请人： Anup Bhalla , Daniel Ng , Tiesheng Li , Sik K. Lui
发明人： Anup Bhalla , Daniel Ng , Tiesheng Li , Sik K. Lui
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/66712 , H01L29/0878 , H01L29/1095 , H01L29/402 , H01L29/41741 , H01L29/41775 , H01L29/42368 , H01L29/42372 , H01L29/42376 , H01L29/66719 , H01L29/66727 , H01L29/7802 , H01L29/7811 , H01L29/7827
摘要： This invention discloses a new switching device supported on a semiconductor that includes a drain disposed on a first surface and a source region disposed near a second surface of said semiconductor opposite the first surface. The switching device further includes an insulated gate electrode disposed on top of the second surface for controlling a source to drain current. The switching device further includes a source electrode interposed into the insulated gate electrode for substantially preventing a coupling of an electrical field between the gate electrode and an epitaxial region underneath the insulated gate electrode. The source electrode further covers and extends over the insulated gate for covering an area on the second surface of the semiconductor to contact the source region. The semiconductor substrate further includes an epitaxial layer disposed above and having a different dopant concentration than the drain region. The insulated gate electrode further includes an insulation layer for insulating the gate electrode from the source electrode wherein the insulation layer having a thickness depending on a Vgsmax rating of the vertical power device.
摘要翻译：本发明公开了一种支撑在半导体上的新开关装置，其包括设置在第一表面上的漏极和设置在与第一表面相对的所述半导体的第二表面附近的源极区域。开关装置还包括设置在第二表面顶部的用于控制源极到漏极电流的绝缘栅电极。开关装置还包括插入到绝缘栅电极中的源电极，用于基本上防止栅电极和绝缘栅电极下方的外延区之间的电场的耦合。源电极进一步覆盖并延伸在绝缘栅上，以覆盖半导体的第二表面上的区域以接触源区。半导体衬底还包括设置在漏极区以上且具有与漏极区不同的掺杂浓度的外延层。绝缘栅电极还包括用于使栅电极与源电极绝缘的绝缘层，其中绝缘层的厚度取决于垂直功率器件的Vgsmax等级。

66. 发明申请

US20070096093A1 Calibration technique for measuring gate resistance of power MOS gate device at wafer level 有权
标题翻译：用于在晶圆级测量功率MOS栅极器件的栅极电阻的校准技术
公开(公告)号：US20070096093A1
公开(公告)日：2007-05-03
申请号：US11265363
申请日：2005-11-01
申请人： Anup Bhalla , Sik-K. Lui , Daniel Ng
发明人： Anup Bhalla , Sik-K. Lui , Daniel Ng
IPC分类号： H01L23/58 , H01L21/66
CPC分类号： H04L63/102 , G01R31/2625 , G01R31/2884 , G01R35/005 , H01L22/14 , H01L2924/0002 , H04L63/08 , H01L2924/00
摘要： This invention discloses a method for calibrating a gate resistance measurement of a semiconductor power device that includes a step of forming a RC network on a test area on a semiconductor wafer adjacent to a plurality of semiconductor power chips and measuring a resistance and a capacitance of the RC network to prepare for carrying out a wafer-level measurement calibration of the semiconductor power device. The method further includes a step of connecting a probe card to a set of contact pads on the semiconductor wafer for carrying out the wafer-level measurement calibration followed by performing a gate resistance Rg measurement for the semiconductor power chips.
摘要翻译：本发明公开了一种用于校准半导体功率器件的栅极电阻测量的方法，包括在与多个半导体功率芯片相邻的半导体晶片上的测试区域上形成RC网络的步骤，并测量电阻和电容 RC网络，准备进行半导体功率器件的晶圆级测量校准。该方法还包括将探针卡连接到半导体晶片上的一组接触焊盘，以执行晶片级测量校准，然后对半导体功率芯片执行栅极电阻Rg测量。

67. 发明申请

US20070075360A1 Cobalt silicon contact barrier metal process for high density semiconductor power devices 审中-公开
标题翻译：用于高密度半导体功率器件的钴硅接触屏障金属工艺
公开(公告)号：US20070075360A1
公开(公告)日：2007-04-05
申请号：US11240255
申请日：2005-09-30
申请人： Hong Chang , Tiesheng Li , Sung-Shan Tai , Daniel Ng , Anup Bhalla
发明人： Hong Chang , Tiesheng Li , Sung-Shan Tai , Daniel Ng , Anup Bhalla
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7813 , H01L21/28518 , H01L21/76843 , H01L21/76855 , H01L29/456 , H01L29/4933 , H01L29/4941 , H01L29/66734 , H01L29/7811
摘要： This invention discloses an improved trenched metal oxide semiconductor field effect transistor (MOSFET) cell that includes a trenched gate surrounded by a source region encompassed in a body region above a drain region disposed on a bottom surface of a substrate. The MOSFET cell further includes a source contact opening opened on top of an area extended over the body region and the source region through a protective insulation layer wherein the area further has a cobalt-silicide layer disposed near a top surface of the substrate. The MOSFET cell further includes a Ti/TiN conductive layer covering the area interfacing with the cobalt-silicide layer over the source contact opening. The MOSFET cell further includes a source contact metal layer formed on top of the Ti/TiN conductive layer ready to form source-bonding wires thereon.
摘要翻译：本发明公开了一种改进的沟槽金属氧化物半导体场效应晶体管（MOSFET）单元，其包括被包围在设置在基板的底表面上的漏极区域上方的体区域中的源极区域包围的沟槽栅极。 MOSFET单元进一步包括源极接触开口，该开口位于通过保护绝缘层延伸到主体区域上的区域的顶部，并且源区域通过保护绝缘层开放，其中该区域还具有设置在基板顶表面附近的硅化钴层。 MOSFET单元还包括覆盖源极接触开口上与硅化钴层接合的区域的Ti / TiN导电层。 MOSFET单元还包括形成在Ti / TiN导电层的顶部上的源极接触金属层，准备在其上形成源极接合线。

68. 发明申请

US20140175540A1 HIGH FREQUENCY SWITCHING MOSFETS WITH LOW OUTPUT CAPACITANCE USING A DEPLETABLE P-SHIELD 有权
标题翻译：具有低输出电容的高频开关MOSFET使用可折叠P型屏蔽
公开(公告)号：US20140175540A1
公开(公告)日：2014-06-26
申请号：US13724093
申请日：2012-12-21
申请人： Madhur Bobde , Hamza Yilmaz , Sik Lui , Daniel Ng
发明人： Madhur Bobde , Hamza Yilmaz , Sik Lui , Daniel Ng
IPC分类号： H01L27/04 , H01L21/82
CPC分类号： H01L29/7813 , H01L21/2257 , H01L27/0251 , H01L27/04 , H01L29/0619 , H01L29/0623 , H01L29/0634 , H01L29/0696 , H01L29/1095 , H01L29/407 , H01L29/41766 , H01L29/42368 , H01L29/4238 , H01L29/456 , H01L29/47 , H01L29/66719 , H01L29/66727 , H01L29/66734 , H01L29/7806 , H01L29/7808 , H01L29/7811
摘要： Aspects of the present disclosure describe a high density trench-based power MOSFETs with self-aligned source contacts and methods for making such devices. The source contacts are self-aligned with spacers and the active devices may have a two-step gate oxide. A lower portion may have a thickness that is larger than the thickness of an upper portion of the gate oxide. The MOSFETS also may include a depletable shield in a lower portion of the substrate. The depletable shield may be configured such that during a high drain bias the shield substantially depletes. It is emphasized that this abstract is provided to comply with rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
摘要翻译：本公开的方面描述了具有自对准源触点的高密度沟槽基功率MOSFET和用于制造这种器件的方法。源触点与间隔物自对准，并且有源器件可以具有两步栅极氧化物。下部可以具有比栅极氧化物的上部的厚度大的厚度。 MOSFET也可以在衬底的下部包括可消除的屏蔽。可消除的屏蔽可以被配置成使得在高排水偏压期间，屏蔽件基本上消耗掉。要强调的是，提供这个摘要是为了符合要求摘要的规则，允许搜索者或其他读者快速确定技术公开内容的主题。提交它的理解是，它不会用于解释或限制权利要求的范围或含义。

69. 发明授权

US08753935B1 High frequency switching MOSFETs with low output capacitance using a depletable P-shield 有权
标题翻译：具有低输出电容的高频开关MOSFET，采用可消耗P型屏蔽
公开(公告)号：US08753935B1
公开(公告)日：2014-06-17
申请号：US13724093
申请日：2012-12-21
申请人： Madhur Bobde , Hamza Yilmaz , Sik Lui , Daniel Ng
发明人： Madhur Bobde , Hamza Yilmaz , Sik Lui , Daniel Ng
IPC分类号： H01L21/336 , H01L21/28 , H01L29/40 , H01L29/423
CPC分类号： H01L29/7813 , H01L21/2257 , H01L27/0251 , H01L27/04 , H01L29/0619 , H01L29/0623 , H01L29/0634 , H01L29/0696 , H01L29/1095 , H01L29/407 , H01L29/41766 , H01L29/42368 , H01L29/4238 , H01L29/456 , H01L29/47 , H01L29/66719 , H01L29/66727 , H01L29/66734 , H01L29/7806 , H01L29/7808 , H01L29/7811
摘要： Aspects of the present disclosure describe a high density trench-based power MOSFETs with self-aligned source contacts and methods for making such devices. The source contacts are self-aligned with spacers and the active devices may have a two-step gate oxide. A lower portion may have a thickness that is larger than the thickness of an upper portion of the gate oxide. The MOSFETS also may include a depletable shield in a lower portion of the substrate. The depletable shield may be configured such that during a high drain bias the shield substantially depletes. It is emphasized that this abstract is provided to comply with rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
摘要翻译：本公开的方面描述了具有自对准源触点的高密度沟槽基功率MOSFET和用于制造这种器件的方法。源触点与间隔物自对准，并且有源器件可以具有两步栅极氧化物。下部可以具有比栅极氧化物的上部的厚度大的厚度。 MOSFET也可以在衬底的下部包括可消除的屏蔽。可消除的屏蔽可以被配置成使得在高排水偏压期间，屏蔽件基本上消耗掉。要强调的是，提供这个摘要是为了符合要求摘要的规则，允许搜索者或其他读者快速确定技术公开内容的主题。提交它的理解是，它不会用于解释或限制权利要求的范围或含义。

70. 发明授权

US5860806A Single dose dental adhesive delivery system and method and adhesive therefor 失效
标题翻译：单剂量牙科粘合剂输送系统及其方法和粘合剂
公开(公告)号：US5860806A
公开(公告)日：1999-01-19
申请号：US758383
申请日：1996-11-29
申请人： Leo J. Pranitis, Jr. , Daniel Ng
发明人： Leo J. Pranitis, Jr. , Daniel Ng
IPC分类号： A61C5/06 , A61C13/00 , A61C19/02 , A61K6/00 , A61K6/083 , A61G17/02
CPC分类号： A61C5/06 , A61C19/02 , A61K6/0091 , A61C2202/02
摘要： A dental adhesive delivery system provides a single usage amount of dental adhesive in a non-resealable container for use in treating a single patient. The packaged amount of adhesive may include up to the amount required to treat all of the teeth needing treatment of not more than a single patient, for example in the range of approximately 0.05 to 1.0 ml. The packaged amount may include a dose only large enough for the treatment of a single tooth or for the application of a single restoration, for example, in an amount of about 0.1 ml. The adhesive is one that includes a volatile solvent or other liquid carrier, such as, for example, water or an organic liquid such as acetone or alcohol. In the preferred embodiment, an alcohol based adhesive is provided having a filler of approximately 25% by weight. The single use container is preferably formed of injected molded plastic and includes a reservoir section that contains the adhesive and a break off section that surrounds an opening that receives a snap fit cap. A plastic and foil pouch constitutes a secondary containment volume or vapor seal which limits the escape of evaporated organic carrier or solvent. The cap and break off section are discarded and the adhesive is removed with the tip of a wand for application to the teeth of a patient, whereupon the container, which is not resealable, is discarded.
摘要翻译：牙科粘合剂递送系统在不可重新密封的容器中提供单次使用量的牙科粘合剂，用于治疗单个患者。包装量的粘合剂可以包括达到治疗不超过单个患者的所有牙齿所需的量，例如在约0.05至1.0ml的范围内。包装量可以包括仅足够大的剂量用于治疗单个牙齿或用于施用单个修复物，例如以约0.1ml的量。粘合剂是包括挥发性溶剂或其它液体载体的粘合剂，例如水或有机液体如丙酮或醇。在优选的实施方案中，提供具有约25重量％的填料的醇基粘合剂。一次性容器优选由注塑的模制塑料形成，并且包括容纳粘合剂的储存部分和围绕容纳卡扣配合帽的开口的断裂部分。塑料和箔袋构成二次容纳体积或蒸气密封，其限制蒸发的有机载体或溶剂的逸出。将盖和断开部分丢弃，并用粘合剂去除用于病人牙齿的魔杖尖端，由此丢弃不能重新密封的容器。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式