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61. 发明授权

US06204142B1 Methods to form electronic devices 有权
公开(公告)号：US06204142B1
公开(公告)日：2001-03-20
申请号：US09138950
申请日：1998-08-24
申请人： Randhir P. S. Thakur
发明人： Randhir P. S. Thakur
IPC分类号： H01L2120
CPC分类号： H01L28/40 , H01L21/3144 , H01L21/3185 , H01L21/32105 , H01L27/10852 , Y10S438/954
摘要： A first electrode and a doped oxide layer laterally proximate thereof are provided over a substrate. A silicon nitride layer is formed over both the doped oxide layer and the first electrode to a thickness of no greater than 80 Angstroms over at least the first electrode by low pressure chemical vapor deposition at a pressure of at least 1 Torr, a temperature of less than 700° C. and using feed gases comprising a silicon hydride and ammonia. The substrate with silicon nitride layer is exposed to oxidizing conditions comprising at least 700° C. to form a silicon dioxide layer over the silicon nitride layer, with the thickness of silicon nitride over the doped oxide layer being sufficient to shield oxidizable substrate material beneath the doped oxide layer from oxidizing during the exposing. A second electrode is formed over the silicon dioxide layer and the first electrode. In another implementation, a layer comprising undoped oxide is formed over a doped oxide layer. A first electrode is formed proximate the undoped oxide layer and the undoped oxide layer. With the undoped oxide layer being outwardly exposed, a silicon nitride layer is formed on the undoped oxide layer and over the first electrode by low pressure chemical vapor deposition to a thickness of no greater than 80 Angstroms. Also disclosed are methods of forming transistor gate constructions and methods of forming electronic device constructions incorporating high K dielectric layer constructions.

62. 发明授权

US06195163B1 Reflectance method for evaluating the surface characteristics of opaque materials 有权
标题翻译：用于评估不透明材料表面特性的反射方法
公开(公告)号：US06195163B1
公开(公告)日：2001-02-27
申请号：US09175061
申请日：1998-10-19
申请人： Randhir P. S. Thakur , Michael Nuttall , J. Brett Rolfson , Robert James Burke
发明人： Randhir P. S. Thakur , Michael Nuttall , J. Brett Rolfson , Robert James Burke
IPC分类号： G01B1130
CPC分类号： G01B11/303
摘要： Disclosed is a process for analyzing the surface characteristics of opaque materials. The method comprises in one embodiment the use of a UV reflectometer to build a calibration matrix of data from a set of control samples and correlating a desired surface characteristic such as roughness or surface area to the set of reflectances of the control samples. The UV reflectometer is then used to measure the reflectances of a test sample of unknown surface characteristics. Reflectances are taken at a variety of angles of reflection for a variety of wavelengths, preferably between about 250 nanometers to about 400 nanometers. These reflectances are then compared against the reflectances of the calibration matrix in order to correlate the closest data in the calibration matrix. By so doing, a variety of information is thereby concluded, due to the broad spectrum of wavelengths and angles of reflection used. This includes information pertaining to the roughness and surface area, as well as other surface characteristics such as grain size, grain density, grain shape, and boundary size between the grains. Surface characteristic evaluation can be conducted in-process in a manner which is non-destructive to the test sample. The method is particularly useful for determining the capacitance of highly granular polysilicon test samples used in the construction of capacitator plates in integrated circuit technology, and can be used to determine the existence of flat smooth surfaces, and the presence of prismatic and hemispherical irregularities on flat smooth surfaces.
摘要翻译：公开了一种用于分析不透明材料的表面特性的方法。该方法在一个实施方案中包括使用UV反射计来构建来自一组对照样品的数据的校准矩阵，并将期望的表面特性如粗糙度或表面积与对照样品的一组反射率相关联。然后使用UV反射计来测量未知表面特性的测试样品的反射率。对于各种波长，优选在约250纳米到约400纳米之间的各种反射角拍摄反射率。然后将这些反射率与校准矩阵的反射率进行比较，以便将校准矩阵中最接近的数据相关联。通过这样做，由于广泛的波长和使用的反射角度，从而得出各种信息。这包括关于粗糙度和表面积的信息，以及晶粒之间的其他表面特性，例如晶粒尺寸，晶粒密度，晶粒形状和边界尺寸。表面特性评估可以以对测试样品非破坏性的方式进行。该方法对于确定集成电路技术中电容器板结构中使用的高度粒状多晶硅测试样品的电容特别有用，可用于确定平坦光滑表面的存在，以及平面上存在棱镜和半球形不规则光滑的表面。

63. 发明授权

US06194264B1 Semiconductor processing method of making a hemispherical grain (HSG) polysilicon layer 失效
公开(公告)号：US06194264B1
公开(公告)日：2001-02-27
申请号：US08926596
申请日：1997-08-20
申请人： Er-Xang Ping , Randhir P. S. Thakur
发明人： Er-Xang Ping , Randhir P. S. Thakur
IPC分类号： H01L218242
CPC分类号： H01L28/84
摘要： A semiconductor processing method of providing a hemispherical grain polysilicon layer atop a substrate includes, a) providing a substantially amorphous layer of silicon over a substrate at a selected temperature; b) raising the temperature of the substantially amorphous silicon layer to a higher dielectric layer deposition temperature, the temperature raising being effective to transform the amorphous silicon layer into hemispherical grain polysilicon; and c) depositing a dielectric layer over the silicon layer at the higher dielectric deposition temperature. Transformation to hemispherical grain might occur during the temperature rise to the higher dielectric layer deposition temperature, after the higher dielectric layer deposition temperature has been achieved but before dielectric layer deposition, or after the higher dielectric layer deposition temperature has been achieved and during dielectric layer deposition. The temperature raising step can include initially raising the silicon layer temperature to an annealing temperature below the higher dielectric layer deposition temperature, and maintaining the silicon layer at the annealing temperature for a time period effective to increase its degree of surface roughness. Subsequently the silicon layer temperature is raised to the higher dielectric layer deposition temperature, with such further increasing the degree of surface roughness of the resultant silicon layer.

64. 发明授权

US06180481B2 Barrier layer fabrication methods 失效
标题翻译：阻隔层制造方法
公开(公告)号：US06180481B2
公开(公告)日：2001-01-30
申请号：US09004932
申请日：1998-01-09
申请人： Scott J. Deboer , Randhir P. S. Thakur
发明人： Scott J. Deboer , Randhir P. S. Thakur
IPC分类号： H01L218242
CPC分类号： H01L28/75 , H01L21/28568 , H01L27/1085 , H01L28/55 , H01L28/60
摘要： Exemplary embodiments of the present invention teach a process for forming a storage capacitor for a semiconductor assembly, by forming a first storage electrode having a top surface consisting of titanium nitride; forming a barrier layer directly on the titanium nitride, the barrier layer (a material containing any one of amorphous silicon, tantalum, titanium, or strontium) being of sufficient thickness to substantially limit the oxidation of the titanium nitride when said semiconductor assembly is subjected to an oxidizing agent (either an oxidizing agent or an nitridizing agent); converting a portion of the barrier layer to a dielectric compound; depositing a storage cell dielectric directly on the dielectric compound, the storage cell dielectric being of the same chemical makeup as the dielectric compound and thereby using the dielectric compound as a nucleation surface; and forming a second capacitor electrode on the storage cell dielectric.
摘要翻译：本发明的示例性实施例通过形成具有由氮化钛组成的顶表面的第一存储电极来教导形成用于半导体组件的存储电容器的工艺; 在氮化钛上直接形成阻挡层，阻挡层（含有非晶硅，钽，钛或锶中的任何一种的材料）具有足够的厚度，以在所述半导体组件经受时基本上限制氮化钛的氧化氧化剂（氧化剂或氮化剂）; 将阻挡层的一部分转变为电介质化合物; 将存储单元电介质直接沉积在电介质化合物上，储能单元电介质具有与电介质化合物相同的化学组成，从而使用电介质化合物作为成核面; 以及在所述存储单元电介质上形成第二电容器电极。

65. 发明授权

US06171872B2 Method of monitoring a process of manufacturing a semiconductor wafer including hemispherical grain polysilicon 失效
标题翻译：监测制造包括半球形晶粒多晶硅的半导体晶片的工艺的方法
公开(公告)号：US06171872B2
公开(公告)日：2001-01-09
申请号：US09145490
申请日：1998-09-01
申请人： Tyler A. Lowrey , Klaus F. Schuegraf , Randhir P. S. Thakur
发明人： Tyler A. Lowrey , Klaus F. Schuegraf , Randhir P. S. Thakur
IPC分类号： H01L2100
CPC分类号： H01L22/20 , H01L22/12
摘要： A method of monitoring a process of manufacturing a semiconductor wafer including an area of hemispherical grain polysilicon, the method comprising providing a probe including a liquid conductor; and performing a capacitance-voltage measurement with the probe, using a quasi-static measurement method, to determine capacitance-voltage characteristics at the area of hemispherical grain polysilicon.
摘要翻译：一种监视半导体晶片制造工艺的方法，所述半导体晶片包括半球形晶粒多晶硅的区域，所述方法包括提供包括液体导体的探针; 并使用准静态测量方法用探头进行电容电压测量，以确定半球形晶粒多晶硅区域的电容 - 电压特性。

66. 发明授权

US06162666A Method to form a DRAM capacitor using low temperature reoxidation 失效
标题翻译：使用低温再氧化形成DRAM电容器的方法
公开(公告)号：US06162666A
公开(公告)日：2000-12-19
申请号：US368481
申请日：1999-08-04
申请人： Randhir P. S. Thakur , Brett Rolfson
发明人： Randhir P. S. Thakur , Brett Rolfson
IPC分类号： H01L21/02 , H01L21/314 , H01L21/316 , H01L21/318 , H01L21/00 , H01L21/20 , H01L21/31 , H01L21/469 , H01L21/8242
CPC分类号： H01L21/31604 , H01L21/31691 , H01L21/3185 , H01L28/82
摘要： An embodiment of the present invention teaches a capacitor dielectric in a wafer cluster tool for semiconductor device fabrication formed by a method by the steps of: forming nitride adjacent a layer by rapid thermal nitridation; and subjecting the nitride to an ozone ambient, wherein the ozone ambient is selected from the group consisting of an ambient containing an the presence of ultraviolet light and ozone gas, an ambient containing an ozone gas or an ambient containing an NF.sub.3 /ozone gas mixture.
摘要翻译：本发明的实施例教导了用于半导体器件制造的晶片簇工具中的电容器电介质，该方法通过以下步骤形成：通过快速热氮化形成邻近层的氮化物; 以及使所述氮化物经受臭氧环境，其中所述臭氧环境选自包含存在紫外线和臭氧气体的环境，含有臭氧气体的环境或含有NF 3 /臭氧气体混合物的环境。

67. 发明授权

US6150706A Capacitor/antifuse structure having a barrier-layer electrode and improved barrier layer 失效
公开(公告)号：US6150706A
公开(公告)日：2000-11-21
申请号：US32182
申请日：1998-02-27
申请人： Randhir P. S. Thakur , Garry A. Mercaldi , Michael Nuttall
发明人： Randhir P. S. Thakur , Garry A. Mercaldi , Michael Nuttall
IPC分类号： G11C11/404 , G11C17/16 , H01L21/02 , H01L21/285 , H01L21/768 , H01L21/8242 , H01L29/00
CPC分类号： G11C11/404 , G11C17/16 , H01L21/28568 , H01L21/76888 , H01L27/1085 , H01L28/60
摘要： A semiconductor structure includes a dielectric layer having first and second opposing sides. A conductive layer is adjacent to the first side of the dielectric layer and is coupled to a first terminal, and a conductive barrier layer is adjacent to the second side of the dielectric layer and is coupled to a second terminal. The conductive barrier layer may be formed from tungsten nitride, tungsten silicon nitride, titanium silicon nitride or other barrier materials.

68. 发明授权

US6150208A DRAM capacitors made from silicon-germanium and electrode-limited conduction dielectric films 失效
标题翻译：由硅锗制成的DRAM电容器和电极限制导电介电膜
公开(公告)号：US6150208A
公开(公告)日：2000-11-21
申请号：US76333
申请日：1998-05-11
申请人： Scott J. Deboer , Klaus F. Schuegraf , Ronald A. Weimer , Randhir P. S. Thakur
发明人： Scott J. Deboer , Klaus F. Schuegraf , Ronald A. Weimer , Randhir P. S. Thakur
IPC分类号： H01L21/02 , H01L21/8242
CPC分类号： H01L28/40 , H01L27/10852
摘要： An exemplary implementation of the present invention includes a capacitor for a dynamic random access memory cell having a first plate; a second plate; and a dielectric layer interposed between said first and second plates, with the dielectric layer being dominated by electrode-limited conduction, which includes tantalum pentoxide and silicon nitride, or a combination of the two. In a preferred implementation, one of the two capacitor plates is formed from a silicon-germanium layer, the second plate is formed from a metal and the dielectric layer is formed from tantalum pentoxide.
摘要翻译：本发明的示例性实施例包括一种用于具有第一板的动态随机存取存储单元的电容器; 第二盘以及插入在所述第一和第二板之间的电介质层，其中所述电介质层由电极限制导电支配，其包括五氧化二钽和氮化硅，或两者的组合。在优选的实施方式中，两个电容器板之一由硅 - 锗层形成，第二板由金属形成，并且介电层由五氧化二钽形成。

69. 发明授权

US06146967A Selective deposition of amorphous silicon film seeded in a chlorine gas and a hydride gas ambient when forming a stacked capacitor with HSG 失效
标题翻译：在用HSG形成堆叠电容器时，选择性地沉积在氯气和氢化物气氛中的非晶硅膜
公开(公告)号：US06146967A
公开(公告)日：2000-11-14
申请号：US914975
申请日：1997-08-20
申请人： Randhir P. S. Thakur , James Pan
发明人： Randhir P. S. Thakur , James Pan
IPC分类号： H01L21/02 , H01L21/20
CPC分类号： H01L28/84 , C23C16/045 , C23C16/24 , C23C16/56 , H01L21/0245 , H01L21/02505 , H01L21/02532 , H01L21/0262 , H01L21/02664 , H01L27/10852 , H01L28/91 , H01L28/90 , Y10S438/964
摘要： A polysilicon film is formed with enhanced selectivity by flowing chlorine during the formation of the film. The chlorine acts as an etchant to insulative areas adjacent polysilicon structures on which the film is desired to be formed. Bottom electrodes for capacitors are formed using this process, followed by an anneal to create hemishperical grain (HSG) polysilicon. Multilayer capacitor containers are formed in a non-oxidizing ambient so that no oxide is formed between the layers. The structure formed is planarized to form separate containers made from doped and undoped amorphous silicon layers. Selected ones of undoped layers are seeded in a chlorine containing environment and annealed to form HSG. A dielectric layer and second electrode are formed to complete the cell capacitor.
摘要翻译：通过在膜的形成期间流动氯，形成具有增强的选择性的多晶硅膜。氯作为蚀刻剂，其邻近多晶硅结构的绝缘区域需要形成薄膜。使用该方法形成用于电容器的底部电极，随后进行退火以产生半透明晶粒（HSG）多晶硅。多层电容器容器形成在非氧化环境中，使得在层之间不形成氧化物。所形成的结构被平坦化以形成由掺杂和未掺杂的非晶硅层制成的分离的容器。将选定的未掺杂层接种在含氯环境中并退火以形成HSG。形成电介质层和第二电极以完成电池电容器。

70. 发明授权

US6111285A Boride electrodes and barriers for cell dielectrics 失效
公开(公告)号：US6111285A
公开(公告)日：2000-08-29
申请号：US42791
申请日：1998-03-17
申请人： Husam N. Al-Shareef , Scott J. DeBoer , Dan Gealy , Randhir P. S. Thakur
发明人： Husam N. Al-Shareef , Scott J. DeBoer , Dan Gealy , Randhir P. S. Thakur
IPC分类号： H01L21/02 , H01L21/285 , H01L21/8242 , H01L27/108 , H01L29/76 , H01L33/00
CPC分类号： H01L27/10852 , H01L28/60 , H01L21/28568 , H01L27/10811 , H01L27/10888
摘要： Titanium boride (TiB.sub.x), zirconium boride (ZrB.sub.x) and hafnium boride (HfB.sub.x) barriers and electrodes for cell dielectrics for integrated circuits, particularly for DRAM cell capacitors. The barriers protect cell dielectrics from diffusion and other interaction with surrounding materials during subsequent thermal processing.

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