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    • 64. 发明申请
    • Method for producing complex phase retarder and complex optical member
    • 复相延迟器和复合光学元件的制造方法
    • US20070056682A1
    • 2007-03-15
    • US11519862
    • 2006-09-13
    • Kenji YamadaTohru NagashimaYoshiki Matsuoka
    • Kenji YamadaTohru NagashimaYoshiki Matsuoka
    • B32B37/00
    • G02B5/3083B32B37/02B32B37/12B32B37/26B32B2457/20B32B2457/202
    • The present invention provides a method for producing a complex phase retarder comprising a first phase retarder of at least one resin film, an adhesive layer and a second phase retarder of a coating layer laminated in this order, the method comprising: preparing a phase retarder with an adhesive where an adhesive layer is formed on a surface of a first phase retarder; applying on a transfer base a coating liquid containing an organic modified clay compound of which the chlorine content is no greater than 2,000 ppm and a binder resin in an organic solvent where the moisture ratio measured using a Karl Fischer's moisture meter is 0.15 wt % to 0.35 wt %; forming a second phase retarder by removing the organic solvent and the water from the applied coating liquid; bonding an exposed surface of the above described second phase retarder to the adhesive layer side of the above described phase retarder with an adhesive; peeling the transfer base from the above described second phase retarder; and forming a second adhesive layer on the surface of this second phase retarder from which the transfer base was peeled.
    • 本发明提供一种复合相变缓凝剂的制造方法,其特征在于,包括依次层叠有至少一层树脂膜,粘合剂层和第二相延迟剂的第一相缓凝剂,该方法包括: 在第一相位延迟器的表面上形成粘合剂层的粘合剂; 在转印基体上涂布含有氯含量不大于2,000ppm的有机改性粘土化合物的涂布液和在使用卡尔·费歇尔湿度计测量的水分比为0.15重量%至0.35的有机溶剂中的粘合剂树脂 重量% 通过从施加的涂布液中除去有机溶剂和水来形成第二相缓凝剂; 将上述第二相延迟器的暴露表面用粘合剂粘合到上述相延迟器的粘合剂层侧; 从上述第二相位延迟器剥离转印基底; 以及在该第二相缓凝剂的表面上形成第二粘合剂层,转移基底从该第二粘合剂层剥离。
    • 68. 发明申请
    • Microcomputer
    • 微电脑
    • US20060206746A1
    • 2006-09-14
    • US11357166
    • 2006-02-21
    • Kenji YamadaHideaki Ishihara
    • Kenji YamadaHideaki Ishihara
    • G06F1/04
    • G06F1/30
    • A microcomputer includes a CPU, a program memory for storing a subroutine program, peripheral circuits, a clock circuit, and a voltage drop detection circuit. When the voltage drop detection circuit detects the voltage drop at the end of a power line, a frequency of a clock signal provided through the clock circuit to the CPU is divided down and a supply of a clock signal provided to the peripheral circuits is stopped. The CPU executes the subroutine program, thereby resuming the supply of the clock signal provided to the peripheral circuits.
    • 微型计算机包括CPU,用于存储子程序的程序存储器,外围电路,时钟电路和电压降检测电路。 当电压降检测电路检测到电力线末端的电压降时,通过CPU的时钟电路提供的时钟信号的频率被分频,并且提供给外围电路的时钟信号的供给被停止。 CPU执行子程序,从而重新提供提供给外围电路的时钟信号。
    • 70. 发明申请
    • Probe card, method of manufacturing the probe card and alignment method
    • 探针卡,制造探针卡的方法和对准方法
    • US20060132155A1
    • 2006-06-22
    • US11299656
    • 2005-12-13
    • Kenji YamadaYoshirou Nakata
    • Kenji YamadaYoshirou Nakata
    • G01R31/02
    • G01R31/2891G01R1/07314G01R1/0735G01R3/00Y10T29/49117Y10T29/49151
    • A probe card for a wafer level test of electrical characteristics of a plurality of semiconductor integrated circuit devices formed on a semiconductor wafer. The card has a thin film with bumps on which a plurality of bumps to be respectively brought into contact with all of inspection electrodes of the semiconductor integrated circuit devices are formed, and which is held on a rigid ceramic ring. An alignment mark constituted by a bump formed simultaneously with the bumps for contact is added to the thin film with bumps. The desired position of the alignment mark relative to the bumps for contact is maintained. Therefore, a change in position accuracy of the bumps for contact can be easily measured by an image processor with reference to the alignment mark. An optimum position for contact between the wafer to be inspected and the inspection electrodes on the wafer can be computed from the measurement result.
    • 一种用于形成在半导体晶片上的多个半导体集成电路器件的电特性的晶片级测试的探针卡。 该卡具有带有凸块的薄膜,多个凸起分别与半导体集成电路器件的所有检查电极接触,并且保持在刚性陶瓷环上。 由与凸起接触形成的凸起构成的对准标记被加到具有凸块的薄膜上。 保持对准标记相对于用于接触的凸块的期望位置。 因此,可以通过参照对准标记的图像处理器容易地测量用于接触的凸块的位置精度的变化。 可以从测量结果计算要检查的晶片与晶片上的检查电极之间的接触的最佳位置。