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61. 发明授权

US08324509B2 Electronic component and manufacturing method thereof 有权
标题翻译：电子元器件及其制造方法
公开(公告)号：US08324509B2
公开(公告)日：2012-12-04
申请号：US12853629
申请日：2010-08-10
申请人： Takashi Ohtsuka , Kyung-Ku Choi , Tatsuo Namikawa , Hitoshi Yamaguchi
发明人： Takashi Ohtsuka , Kyung-Ku Choi , Tatsuo Namikawa , Hitoshi Yamaguchi
IPC分类号： H05K1/16
CPC分类号： H01L28/60 , H01L23/3171 , H01L23/3192 , H01L24/02 , H01L28/86 , H01L2224/04042 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01024 , H01L2924/01025 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01038 , H01L2924/0104 , H01L2924/01041 , H01L2924/01042 , H01L2924/01044 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01055 , H01L2924/01056 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/15787 , H01L2924/15788 , H01L2924/19041 , H01L2924/30107 , H01L2924/00
摘要： The invention provides an electronic component and a manufacturing method thereof that: can allow electronic components to be mounted on an external substrate at a higher density than before; can adjust the height (level) of a terminal electrode as required and desired, thereby solving problems that would occur in the inspection of the conventional electronic components; and can also improve the yield in the mounting of electronic components, thereby achieving increased productivity. A capacitor 1, which is an electronic component, has: a first upper electrode 5a formed above a substrate 2; a first seat 10 and a second seat 11 which are formed adjacent to the first upper electrode 5a; passivation layers 6 and 8 that cover the first upper electrode 5a and the first and second seats 10 and 11; and a terminal electrode 9a formed above the first and second seats 10 and 11 and connected to the first upper electrode 5a via via-conductors Va and Vc which are formed through the passivation layers 6 and 8 respectively.
摘要翻译：本发明提供一种电子部件及其制造方法，其可以使电子部件以比以往更高的密度安装在外部基板上; 可以根据需要调整端子电极的高度（电平），从而解决在常规电子部件的检查中会发生的问题; 并且还可以提高电子部件的安装成品率，从而提高生产率。作为电子部件的电容器1具有：在基板2的上方形成的第一上部电极5a，与第一上部电极5a相邻形成的第一座椅10和第二座椅11; 覆盖第一上电极5a和第一座和第二座10和11的钝化层6和8; 以及形成在第一座椅10和第二座椅11上方的端子电极9a，并且分别经由通过钝化层6和8形成的通孔导体Va和Vc连接到第一上部电极5a。

62. 发明授权

US07964319B2 Fuel cell in which proton conductive gel is used and manufacturing method thereof, and electric power generation method 有权
标题翻译：使用质子传导性凝胶的燃料电池及其制造方法以及发电方法
公开(公告)号：US07964319B2
公开(公告)日：2011-06-21
申请号：US12794266
申请日：2010-06-04
申请人： Takashi Ohtsuka , Tomoyuki Komori , Atsushi Omote , Yuji Zenitani
发明人： Takashi Ohtsuka , Tomoyuki Komori , Atsushi Omote , Yuji Zenitani
IPC分类号： H01M8/08
CPC分类号： H01M8/086 , H01M8/0293 , H01M2300/0008 , Y02P70/56
摘要： An object of the present invention is to provide a fuel cell that operates in a temperature range of not lower than 100° C., and a method for manufacturing such a fuel cell.The fuel cell of the present invention has a proton conductive gel, an anode electrode, and a cathode electrode, the proton conductor being sandwiched between the anode electrode and the cathode electrode, in which the proton conductive gel is composed of SnO2, NH3, H2O, and H3PO4, and provided that the molar ratio represented by NH3/SnO2 is X, and the molar ratio represented by P/Sn is Y, X is not less than 0.2 and not greater than 5, and Y is not less than 1.6 and not greater than 3.
摘要翻译：本发明的目的在于提供一种在不低于100℃的温度范围内工作的燃料电池及其制造方法。本发明的燃料电池具有质子传导性凝胶，阳极电极和阴极电极，质子导体夹在阳极电极和阴极电极之间，其中质子传导性凝胶由SnO 2，NH 3，H 2 O 和H 3 PO 4，并且假定由NH 3 / SnO 2表示的摩尔比为X，并且由P / Sn表示的摩尔比为Y，X不小于0.2且不大于5，Y不小于1.6，并且不大于3。

63. 发明授权

US07834419B2 Semiconductor device and method for fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07834419B2
公开(公告)日：2010-11-16
申请号：US11522982
申请日：2006-09-19
申请人： Takashi Ohtsuka , Takashi Nakabayashi , Yoshiyuki Shibata
发明人： Takashi Ohtsuka , Takashi Nakabayashi , Yoshiyuki Shibata
IPC分类号： H01L29/00
CPC分类号： H01L28/75 , H01L21/02181 , H01L21/02189 , H01L21/0228 , H01L21/31641 , H01L21/31645
摘要： A semiconductor device includes a capacitor formed by successively stacking a lower electrode, a capacitor dielectric film and an upper electrode on a substrate. The lower electrode includes a first conducting layer and a second conducting layer formed on the first conducting layer and having higher resistivity than the first conducting layer, and the capacitor dielectric film is formed so as to be in contact with the second conducting layer of the lower electrode.
摘要翻译：半导体器件包括通过在衬底上连续堆叠下电极，电容器电介质膜和上电极而形成的电容器。下电极包括形成在第一导电层上并具有比第一导电层更高的电阻率的第一导电层和第二导电层，并且电容器电介质膜形成为与下部电极的第二导电层接触电极。

64. 发明授权

US07763922B2 Semiconductor memory and method for manufacturing the same 失效
标题翻译：半导体存储器及其制造方法
公开(公告)号：US07763922B2
公开(公告)日：2010-07-27
申请号：US11152109
申请日：2005-06-15
申请人： Hideyuki Arai , Takashi Nakabayashi , Takashi Ohtsuka
发明人： Hideyuki Arai , Takashi Nakabayashi , Takashi Ohtsuka
IPC分类号： H01L31/062
CPC分类号： H01L27/10852 , H01L27/10811 , H01L27/10888 , H01L28/91
摘要： A capacitor of a semiconductor memory of the present invention includes: a lower electrode which covers the surface of a storage node hole from the bottom to at least one of the sidewalls up to a level lower than the top surface of a second interlayer insulating film; a capacitive insulating film which covers the lower electrode; and an upper electrode which covers the capacitive insulating film.
摘要翻译：本发明的半导体存储器的电容器包括：下电极，其从底部到至少一个侧壁覆盖存储节点孔的表面直到比第二层间绝缘膜的顶表面低的水平; 覆盖下电极的电容绝缘膜; 以及覆盖电容绝缘膜的上电极。

65. 发明授权

US07135736B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07135736B2
公开(公告)日：2006-11-14
申请号：US10616917
申请日：2003-07-11
申请人： Takashi Nishikawa , Takashi Ohtsuka
发明人： Takashi Nishikawa , Takashi Ohtsuka
IPC分类号： H01L29/788
CPC分类号： H01L21/28291 , H01L21/28273 , H01L29/78391
摘要： This specification relates to a semiconductor device that comprises a semiconductor substrate 11, a source region 12 and a drain region 13, which are formed on the semiconductor substrate 11 with a channel region 14 therebetween; a floating gate electrode 152 that is formed on the channel region 14 with a gate insulator film 151 therebetween; a ferroelectric film 154 that is formed on the floating gate electrode 152; and a control gate electrode 156 that is formed on the ferroelectric film 154, wherein intermediate insulator films 153 and 155 are formed between at least one of the pairs consisting of the floating gate electrode 152 and the ferroelectric film 154, and the ferroelectric film 154 and the control gate electrode 156, and the intermediate insulator films 153 and 155 are made of hafnium oxide that contains nitrogen atoms.
摘要翻译：本说明书涉及半导体器件，其包括在半导体衬底11上形成有沟道区域14的半导体衬底11，源极区12和漏极区13; 在沟道区域14上形成有栅极绝缘膜151的浮栅电极152; 形成在浮栅电极152上的铁电体膜154; 以及形成在铁电体膜154上的控制栅极电极156，其中，在由浮置栅极电极152和铁电体膜154构成的至少一对之间形成中间绝缘膜153,155，以及强电介质膜154和控制栅电极156和中间绝缘膜153,155由含有氮原子的氧化铪构成。

66. 发明申请

US20060076600A1 Semiconductor device and method for fabricating the same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20060076600A1
公开(公告)日：2006-04-13
申请号：US11188866
申请日：2005-07-26
申请人： Takashi Nakabayashi , Hideyuki Arai , Takashi Ohtsuka , Hisashi Yano
发明人： Takashi Nakabayashi , Hideyuki Arai , Takashi Ohtsuka , Hisashi Yano
IPC分类号： H01L29/94
CPC分类号： H01L21/02186 , H01L21/02271 , H01L21/31122 , H01L21/318 , H01L21/32135 , H01L27/10811 , H01L27/10888 , H01L27/10894 , H01L28/60
摘要： In a method for fabricating a semiconductor device according to the present invention, a groove is formed in a second interlayer insulating film, and then a storage electrode is formed which covers bottom and side surfaces of the groove. A capacitor insulating film is formed on the storage electrode, and a CVD method at a low temperature of 400° C. or lower and annealing with ammonia are repeated to form a TiOxNy film on the capacitor insulating film. A TiN film is formed on the TiOxNy film, and the TiN film is etched using the TiOxNy film as a stopper. The exposed TiOxNy film is then removed to form a plate electrode made of the TiOxNy film and the TiN film.
摘要翻译：在根据本发明的半导体器件的制造方法中，在第二层间绝缘膜中形成凹槽，然后形成覆盖凹槽的底部和侧表面的存储电极。在存储电极上形成电容器绝缘膜，并且在400℃或更低的低温和用氨退火的CVD方法被重复以形成TiO 2 x N y / SUB>电容器绝缘膜上。在TiO 2膜层上形成TiN膜，并使用TiO 2 X N y膜蚀刻TiN膜， / SUB膜作为塞子。然后除去暴露的TiO 2，N 2 O 3膜，以形成由TiO 2，N 2 O 3，薄膜和TiN薄膜。

67. 发明授权

US06845032B2 Non-volatile latch circuit and a driving method thereof 有权
标题翻译：非易失性锁存电路及其驱动方法
公开(公告)号：US06845032B2
公开(公告)日：2005-01-18
申请号：US10785031
申请日：2004-02-25
申请人： Kenji Toyoda , Takashi Ohtsuka , Kiyoshi Morimoto
发明人： Kenji Toyoda , Takashi Ohtsuka , Kiyoshi Morimoto
IPC分类号： G11C11/22 , H01L21/8246 , H01L27/105 , H03K3/356 , H03K17/693 , H03K19/0948 , H03K19/185
CPC分类号： G11C11/22 , H03K17/693
摘要： Non-volatile latch circuit 10 of the present invention comprises ferroelectric capacitor 1 provided with a first electrode 1a, second electrode 1b, and ferroelectric film 1c that lies between these electrodes; reset terminal Tre that is connected to first electrode 1a and a CMOS inverter element 2 that is connected to second electrode 1b of ferroelectric capacitor 1; voltage switching terminal Tpl that applies a voltage to second electrode 1b; switching element 5 that is connected between second electrode 1b and second input terminal Tpl and switches a voltage applied to second electrode 1b; and set terminal Tse that applies a voltage for switching on or off switching element 5, wherein the voltage generated in second electrode 1b caused by polarization retained by ferroelectric film 1c is higher than the threshold voltage Vtn of NMISFET 4 of CMOS inverter element 2.
摘要翻译：本发明的非易失性锁存电路10包括设置有位于这些电极之间的第一电极1a，第二电极1b和铁电体膜1c的铁电电容器1; 连接到第一电极1a的复位端子Tre和连接到铁电电容器1的第二电极1b的CMOS反相器元件2; 向第二电极1b施加电压的电压切换端子Tpl; 开关元件5，其连接在第二电极1b和第二输入端子Tpl之间，并切换施加到第二电极1b的电压; 并设置施加用于接通或关断开关元件5的电压的端子Tse，其中由铁电体膜1c保持的极化所引起的第二电极1b中产生的电压高于CMOS反相器元件2的NMISFET 4的阈值电压Vtn。

68. 发明授权

US06191054B1 Method for forming film and method for fabricating semiconductor device 有权
标题翻译：薄膜形成方法及制造半导体器件的方法
公开(公告)号：US06191054B1
公开(公告)日：2001-02-20
申请号：US09413758
申请日：1999-10-06
申请人： Takashi Ohtsuka , Michihito Ueda
发明人： Takashi Ohtsuka , Michihito Ueda
IPC分类号： H01L21469
CPC分类号： C23C16/4401 , C23C16/409 , H01L21/31691
摘要： In forming a film by a chemical vapor deposition (CVD) process using, as a source material, an organometallic complex dissolved in a solvent, a method for reducing the quantity of carbon compounds mixed into the film is provided. According to this method, a nonpolar solvent is used for dissolving the organometallic complex or an organometallic compound therein. Unlike a polar group contained in a polar solvent, the nonpolar solvent includes no organic molecular group with a large molecular weight to be coordinated with the organometallic complex. Thus, electrical interaction between the organometallic complex and the solvent can be suppressed, and the quantity of carbon compounds mixed into the film can be reduced as a result.
摘要翻译：在通过使用溶解在溶剂中的有机金属配合物作为源材料的化学气相沉积（CVD）法形成膜时，提供了一种减少混入膜中的碳化合物的量的方法。根据该方法，使用非极性溶剂来溶解有机金属络合物或其中的有机金属化合物。与极性溶剂中包含的极性基团不同，非极性溶剂不包括具有大分子量的有机分子，与有机金属络合物配位。因此，可以抑制有机金属配合物与溶剂之间的电相互作用，结果可以减少混入膜中的碳化合物的量。

69. 发明授权

US06155006A Horizontal-roofing and mounting method thereof 失效
标题翻译：水平屋顶及其安装方法
公开(公告)号：US06155006A
公开(公告)日：2000-12-05
申请号：US915666
申请日：1997-08-21
申请人： Toshihiko Mimura , Kimitoshi Fukae , Akiharu Takabayashi , Masahiro Mori , Takashi Ohtsuka
发明人： Toshihiko Mimura , Kimitoshi Fukae , Akiharu Takabayashi , Masahiro Mori , Takashi Ohtsuka
IPC分类号： E04D13/18 , E04D3/30 , E04D3/361 , E04D3/362 , E04D3/366 , E04D3/40 , H01L31/042 , H01L31/048
CPC分类号： H01L31/048 , E04D1/365 , E04D3/361 , E04D3/366 , H02S20/23 , H02S40/36 , E04D2001/3458 , F24J2/52 , Y02B10/12 , Y02E10/50 , Y10S136/291
摘要： A roof in which an upper-end engaging portion of a downstream roof panel is seam-jointed with a lower-end engaging portion of an upstream roof panel, wherein at least the lower-end engaging portion has flexural rigidity enough to disengage the seam joint.
摘要翻译：下游屋顶板的上端接合部分与上游屋顶板的下端接合部分接合的屋顶，其中至少下端接合部分具有足够的抗弯刚度以使接缝接合。

70. 发明授权

US06107120A Method of making semiconductor devices having protruding contacts 有权
标题翻译：制造具有突出接触的半导体器件的方法
公开(公告)号：US06107120A
公开(公告)日：2000-08-22
申请号：US275185
申请日：1999-03-23
申请人： Takashi Ohtsuka , Tetsuo Kawakita , Kazuhiko Matsumura , Hiroaki Fujimoto
发明人： Takashi Ohtsuka , Tetsuo Kawakita , Kazuhiko Matsumura , Hiroaki Fujimoto
IPC分类号： H01L21/60 , H01L21/56 , H01L23/485 , H01L21/44 , H01L21/50
CPC分类号： H01L24/13 , H01L21/563 , H01L24/11 , H01L24/29 , H01L24/75 , H01L24/83 , H01L2224/13022 , H01L2224/13099 , H01L2224/13144 , H01L2224/13155 , H01L2224/13609 , H01L2224/16145 , H01L2224/16225 , H01L2224/29109 , H01L2224/29111 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/73104 , H01L2224/73203 , H01L2224/73204 , H01L2224/75 , H01L2224/7525 , H01L2224/75252 , H01L2224/75301 , H01L2224/75745 , H01L2224/81191 , H01L2224/81192 , H01L2224/81193 , H01L2224/83102 , H01L2224/83192 , H01L2224/83874 , H01L2224/92125 , H01L2924/0001 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01046 , H01L2924/01049 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/09701 , H01L2924/15787 , H01L2924/15788
摘要： A method of making semiconductor devices with contacts protruding from openings in a passivation layer over an active chip area. Inside each opening, a relatively hard barrier layer is provided and a flash-plated film is applied to subsequently form a relatively soft diffusion barrier layer when a protruding contact is formed. Two semiconductor devices with electrodes are joined by embedding relatively hard electrodes of a first device into relatively soft electrodes of a second device. A reducing agent can be incorporated into an insulating resin applied between semiconductor chips at areas other than the bonded electrodes.
摘要翻译：一种制造半导体器件的方法，其具有从有源芯片区域上的钝化层中的开口突出的触点。在每个开口内部，设置相对硬的阻挡层，并且当形成突出接触时，施加闪镀膜以随后形成相对软的扩散阻挡层。具有电极的两个半导体器件通过将第一器件的相对硬的电极嵌入到第二器件的相对软的电极中来连接。还原剂可以结合到施加在不同于键合电极之外的区域的半导体芯片之间的绝缘树脂中。

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