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61. 发明申请

US20220191530A1 INTRA PREDICTION METHOD AND DEVICE FOR PREDICTING AND DIVIDING PREDICTION UNIT INTO SUB-UNITS 有权
公开(公告)号：US20220191530A1
公开(公告)日：2022-06-16
申请号：US17438263
申请日：2020-03-12
申请人： Hyundai Motor Company , Kia Motors Corporation , Kwangwoon University Industry-Acadermic Collaboration Foundation
发明人： Dong Gyu Sim , Jong Seok Lee , Sea Nae Park , Jun Taek Park , Seung Wook Park , Wha Pyeong Lim
IPC分类号： H04N19/46 , H04N19/137 , H04N19/82 , H04N19/159 , H04N19/176
摘要： A method and apparatus for intra prediction include a prediction unit that is divided into sub-units and predicted in the sub-units. A video decoding method includes: determining whether to split a current block into multiple subblocks; when the current block is split into the multiple subblocks, determining a split direction for the current block between a horizontal split direction and a vertical split direction and the number of the subblocks, based on split information decoded from a bitstream and a width and a height of the current block; reconstructing the current block by sequentially reconstructing the subblocks, that are specified according to the split direction and the number of the subblocks, using intra prediction; and setting a grid of N samples at regular intervals in horizontal and vertical directions and performing deblock-filtering on, among boundaries between the subblocks in the current block, boundaries that coincide with a boundary of the grid.

62. 发明授权

US10930797B2 Schottky barrier diode and method of manufacturing the same 有权
公开(公告)号：US10930797B2
公开(公告)日：2021-02-23
申请号：US15374468
申请日：2016-12-09
申请人： HYUNDAI MOTOR COMPANY
发明人： Dae Hwan Chun , Youngkyun Jung , Nack Yong Joo , Junghee Park , Jong Seok Lee
IPC分类号： H01L29/872 , H01L29/06 , H01L29/16 , H01L21/04 , H01L29/08 , H01L29/66
摘要： A Schottky barrier diode includes: an n− type layer disposed on a first surface of an n+ type silicon carbide substrate; a p+ type region and a p type region disposed on the n− type layer and separated from each other; an anode disposed on the n− type layer, the p+ type region, and the p type region; and a cathode disposed on a second surface of the n+ type silicon carbide substrate. The p type region is in plural, has a hexagonal shape on the plane, and is arranged in a matrix shape, and the n− type layer disposed between the p+ type region and the p type region has a hexagonal shape on the plane and encloses the p type region.

63. 发明授权

US09589925B2 Method for bonding with a silver paste 有权
标题翻译：用银膏粘结的方法
公开(公告)号：US09589925B2
公开(公告)日：2017-03-07
申请号：US14800607
申请日：2015-07-15
申请人： HYUNDAI MOTOR COMPANY
发明人： Kyoung-Kook Hong , Hyun Woo Noh , Youngkyun Jung , Dae Hwan Chun , Jong Seok Lee , Su Bin Kang
IPC分类号： B23K1/00 , B23K1/19 , H01L23/00 , B23K35/02 , B23K35/30 , B23K20/02
CPC分类号： H01L24/83 , B23K1/19 , B23K20/02 , B23K20/026 , B23K35/025 , B23K35/3006 , B23K2103/08 , B23K2103/18 , B23K2103/52 , B23K2103/56 , H01L24/27 , H01L24/29 , H01L24/32 , H01L2224/27332 , H01L2224/2741 , H01L2224/27848 , H01L2224/29109 , H01L2224/29139 , H01L2224/29309 , H01L2224/29339 , H01L2224/29499 , H01L2224/32225 , H01L2224/32507 , H01L2224/83097 , H01L2224/832 , H01L2224/83825 , H01L2224/8384 , H01L2224/83906
摘要： Disclosed is a method for bonding with a silver paste, the method including: coating a silver paste on a semiconductor device or a substrate, the silver paste containing silver and indium; disposing the semiconductor on the substrate; and heating the silver paste to form a bonding layer, wherein the semiconductor device and the substrate are bonded to each other through the bonding layer, and wherein the indium is contained in the silver paste at 40 mole % or less.
摘要翻译：公开了一种用银膏粘合的方法，该方法包括：在半导体器件或基板上涂覆银膏，含有银和铟的银膏; 将半导体布置在基板上; 并且加热银膏以形成接合层，其中半导体器件和衬底通过接合层彼此接合，并且其中铟含量在40％（摩尔）以下。

64. 发明授权

US09368649B2 Schottky barrier diode and method of manufacturing the same 有权
标题翻译：肖特基势垒二极管及其制造方法
公开(公告)号：US09368649B2
公开(公告)日：2016-06-14
申请号：US14095650
申请日：2013-12-03
申请人： Hyundai Motor Company
发明人： Dae Hwan Chun , Jong Seok Lee , Kyoung-Kook Hong , Youngkyun Jung
IPC分类号： H01L31/075 , H01L29/15 , H01L29/872 , H01L29/66 , H01L29/861 , H01L29/16
CPC分类号： H01L29/872 , H01L29/1608 , H01L29/66143 , H01L29/8611
摘要： A schottky barrier diode includes an n− type epitaxial layer disposed at a first surface of an n+ type silicon carbide substrate, a plurality of n type pillar areas disposed in the n− type epitaxial layer at a first portion of a first surface of the n+ type silicon carbide substrate, a plurality of p+ areas disposed at a surface of the n− type epitaxial layer and separated from the n type pillar area, a schottky electrode disposed on the n− type epitaxial layer and the p+ area, and an ohmic electrode disposed at a second surface of the n+ type silicon carbide substrate. A doping density of the n type pillar area is larger than a doping density of the n− type epitaxial layer.
摘要翻译：肖特基势垒二极管包括设置在n +型碳化硅衬底的第一表面上的n型外延层，在n +型碳化硅衬底的第一表面的第一部分处设置在n型外延层中的多个n型衬底区域，配置在n型外延层的表面并与n型支柱区分离的多个p +区域，设置在n型外延层和p +区域上的肖特基电极以及欧姆电极设置在n +型碳化硅衬底的第二表面。 n型支柱区域的掺杂密度大于n型外延层的掺杂密度。

65. 发明授权

US09287415B2 Schottky barrier diode and method of manufacturing the same 有权
标题翻译：肖特基势垒二极管及其制造方法
公开(公告)号：US09287415B2
公开(公告)日：2016-03-15
申请号：US14468987
申请日：2014-08-26
申请人： Hyundai Motor Company
发明人： Dae Hwan Chun , Kyoung-Kook Hong , Jong Seok Lee , Junghee Park , Youngkyun Jung
IPC分类号： H01L51/40 , H01L29/872 , H01L21/04 , H01L29/66 , H01L29/06 , H01L29/16
CPC分类号： H01L29/872 , H01L21/046 , H01L21/0495 , H01L29/0623 , H01L29/1608 , H01L29/6606
摘要： A Schottky barrier diode includes: an n− type epitaxial layer disposed on a first surface of an n+ type silicon carbide substrate; a first p+ region disposed on the n− type epitaxial layer; an n type epitaxial layer disposed on the n− type epitaxial layer and the first p+ region; a second p+ region disposed on the n type epitaxial layer, and being in contact with the first p+ region; a Schottky electrode disposed on the n type epitaxial layer and the second p+ region; and an ohmic electrode disposed on a second surface of the n+ type silicon carbide substrate. Also, the first p+ region has a lattice shape including a plurality of vertical portions and horizontal portions connecting both ends of the respective vertical portions to each other.
摘要翻译：肖特基势垒二极管包括：n型外延层，设置在n +型碳化硅衬底的第一表面上; 布置在所述n型外延层上的第一p +区; 设置在n型外延层和第一p +区上的n型外延层; 设置在所述n型外延层上并与所述第一p +区接触的第二p +区; 设置在n型外延层和第二p +区上的肖特基电极; 以及设置在n +型碳化硅衬底的第二表面上的欧姆电极。此外，第一p +区域具有包括将各个垂直部分的两端彼此连接的多个垂直部分和水平部分的格子形状。

66. 发明授权

US09171930B2 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US09171930B2
公开(公告)日：2015-10-27
申请号：US14143554
申请日：2013-12-30
申请人： Hyundai Motor Company
发明人： Youngkyun Jung , Dae Hwan Chun , Kyoung-Kook Hong , Jong Seok Lee , Junghee Park
IPC分类号： H01L21/336 , H01L29/66 , H01L21/02
CPC分类号： H01L29/66666 , H01L21/02104 , H01L21/0475 , H01L29/1608 , H01L29/41766 , H01L29/66068 , H01L29/7813
摘要： A method of manufacturing a semiconductor device may include sequentially forming an n-type epitaxial layer, a p type epitaxial layer, and an n+ region on a first surface of an n+ type silicon carbide substrate; forming a buffer layer on the n+ region; forming a photosensitive film pattern on a part of the buffer layer; etching the buffer layer using the photosensitive film pattern as a mask to form a buffer layer pattern; sequentially forming a first metal layer and a second metal layer which include a first portion and a second portion; removing one or more components to expose a part of the n+ region; and etching the exposed part of the n+ region using the first portion of the first metal layer and the first portion of the second metal layer as masks to form a trench.
摘要翻译：制造半导体器件的方法可以包括在n +型碳化硅衬底的第一表面上顺序形成n型外延层，p型外延层和n +区; 在n +区上形成缓冲层; 在缓冲层的一部分上形成感光膜图案; 使用感光膜图案作为掩模蚀刻缓冲层以形成缓冲层图案; 顺序地形成包括第一部分和第二部分的第一金属层和第二金属层; 去除一个或多个组件以暴露n +区域的一部分; 以及使用第一金属层的第一部分和第二金属层的第一部分作为掩模蚀刻n +区域的暴露部分以形成沟槽。

67. 发明授权

US09123800B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US09123800B2
公开(公告)日：2015-09-01
申请号：US14317426
申请日：2014-06-27
申请人： Hyundai Motor Company
发明人： Dae Hwan Chun , Kyoung-Kook Hong , Jong Seok Lee , Junghee Park , Youngkyun Jung
IPC分类号： H01L29/12 , H01L29/16 , H01L29/36 , H01L29/78 , H01L21/205 , H01L21/335 , H01L21/762 , H01L29/66 , H01L29/06 , H01L29/423
CPC分类号： H01L29/7811 , H01L29/0619 , H01L29/0661 , H01L29/086 , H01L29/1608 , H01L29/4238 , H01L29/66068 , H01L29/7813
摘要： A semiconductor device includes: a first n− type epitaxial layer disposed on a first surface of an n+ type silicon carbide substrate including a current carrying region and termination regions positioned at both sides of the current carrying region; a p type epitaxial layer disposed on the first n− type epitaxial layer; a second n− type epitaxial layer disposed on the p type epitaxial layer; a first trench disposed in the current carrying region; a second trench disposed in each termination region; a gate insulating layer disposed in the first trench; a gate electrode disposed on the gate insulating layer; and a termination insulating layer disposed in the second trench, in which a side of the termination insulating layer contacts the p type epitaxial layer and the second n− type epitaxial layer.
摘要翻译：半导体器件包括：第一n型外延层，其设置在n +型碳化硅衬底的第一表面上，该n +型碳化硅衬底包括载流区域和位于载流区域两侧的端接区域; 设置在第一n型外延层上的p型外延层; 设置在p型外延层上的第二n型外延层; 布置在所述载流区域中的第一沟槽; 设置在每个端接区域中的第二沟槽; 设置在所述第一沟槽中的栅极绝缘层; 设置在所述栅极绝缘层上的栅电极; 以及设置在第二沟槽中的终端绝缘层，其中端接绝缘层的一侧接触p型外延层和第二n-型外延层。

68. 发明申请

US20150187962A1 SCHOTTKY BARRIER DIODE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：肖特彼勒二极管及其制造方法
公开(公告)号：US20150187962A1
公开(公告)日：2015-07-02
申请号：US14468987
申请日：2014-08-26
申请人： Hyundai Motor Company
发明人： Dae Hwan Chun , Kyoung-Kook Hong , Jong Seok Lee , Junghee Park , Youngkyun Jung
IPC分类号： H01L29/872 , H01L29/16 , H01L21/04 , H01L29/66
CPC分类号： H01L29/872 , H01L21/046 , H01L21/0495 , H01L29/0623 , H01L29/1608 , H01L29/6606
摘要： A Schottky barrier diode includes: an n− type epitaxial layer disposed on a first surface of an n+ type silicon carbide substrate; a first p+ region disposed on the n− type epitaxial layer; an n type epitaxial layer disposed on the n− type epitaxial layer and the first p+ region; a second p+ region disposed on the n type epitaxial layer, and being in contact with the first p+ region; a Schottky electrode disposed on the n type epitaxial layer and the second p+ region; and an ohmic electrode disposed on a second surface of the n+ type silicon carbide substrate. Also, the first p+ region has a lattice shape including a plurality of vertical portions and horizontal portions connecting both ends of the respective vertical portions to each other.
摘要翻译：肖特基势垒二极管包括：n型外延层，设置在n +型碳化硅衬底的第一表面上; 布置在所述n型外延层上的第一p +区; 设置在n型外延层和第一p +区上的n型外延层; 设置在所述n型外延层上并与所述第一p +区接触的第二p +区; 设置在n型外延层和第二p +区上的肖特基电极; 以及设置在n +型碳化硅衬底的第二表面上的欧姆电极。此外，第一p +区域具有包括将各个垂直部分的两端彼此连接的多个垂直部分和水平部分的格子形状。

69. 发明申请

US20150076515A1 SCHOTTKY BARRIER DIODE AND METHOD FOR MANUFACTURING SCHOTTKY BARRIER DIODE 有权
标题翻译：肖特基二极体二极管及制造肖特基二极管的方法
公开(公告)号：US20150076515A1
公开(公告)日：2015-03-19
申请号：US14143649
申请日：2013-12-30
申请人： Hyundai Motor Company
发明人： Youngkyun Jung , Dae Hwan Chun , Kyoung-Kook Hong , Jong Seok Lee , Junghee Park
IPC分类号： H01L29/872 , H01L29/16 , H01L29/66
CPC分类号： H01L29/872 , H01L29/0619 , H01L29/1608 , H01L29/6606
摘要： A Schottky barrier diode and a method of manufacturing the diode are provided. The diode includes an n− type epitaxial layer disposed on a first surface of an n+ type silicon carbide substrate and a plurality of p+ regions disposed within the n− type epitaxial layer. An n+ type epitaxial layer is disposed on the n− type epitaxial layer, a Schottky electrode is disposed on the n+ type epitaxial layer, and an ohmic electrode is disposed on a second surface of the n+ type silicon carbide substrate. The n+ type epitaxial layer includes a plurality of pillar parts disposed on the n− type epitaxial layer and a plurality of openings disposed between the pillar parts and that expose the p+ regions. Each of the pillar parts includes substantially straight parts that contact the n− type epitaxial layer and substantially curved parts that extend from the substantially straight parts.
摘要翻译：提供肖特基势垒二极管和制造二极管的方法。二极管包括设置在n +型碳化硅衬底的第一表面上的n型外延层和设置在n型外延层内的多个p +区。在n型外延层上设置n +型外延层，在n +型外延层上设置肖特基电极，在n +型碳化硅基板的第二面上设置欧姆电极。 n +型外延层包括设置在n型外延层上的多个柱部分和设置在柱部分之间并暴露p +区域的多个开口。每个支柱部分包括接触n型外延层的基本上直的部分和从基本上直的部分延伸的基本上弯曲的部分。

70. 发明授权

US08586434B1 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08586434B1
公开(公告)日：2013-11-19
申请号：US13729534
申请日：2012-12-28
申请人： Hyundai Motor Company
发明人： Youngkyun Jung , Kyoung-Kook Hong , Jong Seok Lee , Dae Hwan Chun
IPC分类号： H01L21/00
CPC分类号： H01L29/7827 , H01L29/66068
摘要： A method of manufacturing a semiconductor device may include forming a first n− type epitaxial layer by performing a first epitaxial growth on a first surface of an n+ type silicon carbide substrate, forming a photosensitive layer pattern on the first n− type epitaxial layer, etching the first n− type epitaxial layer by using the photosensitive layer pattern as a mask to form a first trench, forming a buffer layer on the first n− type epitaxial layer after the photosensitive layer pattern may be removed, etching the buffer layer to form a trench passivation layer in the first trench, forming an n− type epitaxial layer by performing a second epitaxial growth on the first n− type epitaxial layer, and forming a p type epitaxial layer by performing a third epitaxial growth on the n− type epitaxial layer other than the portion on which the trench passivation layer may be formed.
摘要翻译：制造半导体器件的方法可以包括通过在n +型碳化硅衬底的第一表面上进行第一外延生长来形成第一n型外延层，在第一n-型外延层上形成感光层图案，蚀刻通过使用感光层图案作为掩模来形成第一沟槽的第一n型外延层，在可以去除感光层图案之后在第一n型外延层上形成缓冲层，蚀刻缓冲层以形成在第一沟槽中的沟槽钝化层，通过在第一n型外延层上进行第二外延生长形成n型外延层，并通过在n型外延层上进行第三外延生长形成p型外延层可以形成沟槽钝化层的部分。

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