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61. 发明授权

US06668035B2 Structure of delta-sigma fractional type divider 有权
$Structure of delta-sigma fractional type divider$
标题翻译： delta-sigma分数分频器的结构
公开(公告)号：US06668035B2
公开(公告)日：2003-12-23
申请号：US10179840
申请日：2002-06-24
申请人： Seon Ho Han , Jang Hong Choi , Jae Hong Jang , Hyun Kyu Yu
发明人： Seon Ho Han , Jang Hong Choi , Jae Hong Jang , Hyun Kyu Yu
IPC分类号： H03K2100
CPC分类号： H03M7/3022 , H03L7/1978
摘要： The present invention relates to a structure of a delta-sigma fractional type divider. The divider structure adds an external input value and an output value of a delta-sigma modulator to modulate a value of a swallow counter. Therefore, the present invention can provide a delta-sigma fractional type divider the structure is simple and that can obtain an effect of a structure of a delta sigma mode while having a wide-band frequency mixing capability.
摘要翻译：本发明涉及一种delta-sigma分数型分频器的结构。分频器结构增加了Δ-Σ调制器的外部输入值和输出值，以调制吞咽计数器的值。因此，本发明可以提供一种Δ-Σ分数分频器，其结构简单，并且可以获得具有宽带频率混合能力的Δ-Σ模式的结构的效果。

62. 发明授权

US06473595B1 RF active balun circuit for improving small-signal linearity 有权
标题翻译： RF主动平衡 - 不平衡转换电路，用于改善小信号线性度
公开(公告)号：US06473595B1
公开(公告)日：2002-10-29
申请号：US09437312
申请日：1999-11-10
申请人： Chung Hwan Kim , Cheon Soo Kim , Hyun Kyu Yu , Min Park , Dae Yong Kim
发明人： Chung Hwan Kim , Cheon Soo Kim , Hyun Kyu Yu , Min Park , Dae Yong Kim
IPC分类号： H04B110
CPC分类号： H03F1/223 , H03F1/3205 , H03F1/3223
摘要： The RF active balun circuit for improving a small-signal linearity in a power amplifying circuit of a CDMA system is provided under the construction of a signal amplifier driven by exterior individual direct current gate power VGG1, VGG2, for receiving a communication input signal AC-In and performing a cascode amplification at a normal operation point where a feedback third-order distortion signal becomes large; a distortion signal generator driven by exterior direct current gate power VGG3 different from the above power, for generating the communication input signal AC-In as the third-order distortion signal by nonlinearity of an active element to cancel the third-order distortion signal amplified in the signal amplifier; and an insulator provided for an insulation from a exterior driving power VGG3 applied to the distortion signal generator, thereby maintaining the small size, lower power and high efficient terminal characteristics by using a gain based on gate voltage of FET and the nonlinearity characteristic difference, and improving the linearity of an IC operating by a small signal or medium signal.
摘要翻译：用于改善CDMA系统的功率放大电路中的小信号线性度的RF有源平衡 - 不平衡转换器被提供在由外部单独的直流栅极功率VGG1，VGG2驱动的信号放大器的构造下，用于接收通信输入信号AC- 在反馈三阶失真信号变大的正常工作点进行并进行共源共栅放大; 由与上述功率不同的外部直流栅极功率VGG3驱动的失真信号发生器，用于通过有源元件的非线性产生作为三阶失真信号的通信输入信号AC-In，以消除放大的三阶失真信号信号放大器; 以及提供用于与施加到失真信号发生器的外部驱动电力VGG3绝缘的绝缘体，从而通过使用基于FET的栅极电压的增益和非线性特性差来维持小尺寸，较低功率和高效率的端子特性，以及改善由小信号或中等信号操作的IC的线性度。

63. 发明授权

US6093599A Method of manufacturing inductor device on a silicon substrate thereof 有权
标题翻译：在其硅衬底上制造电感器件的方法
公开(公告)号：US6093599A
公开(公告)日：2000-07-25
申请号：US232691
申请日：1999-01-19
申请人： Jin Hyo Lee , Heung Soo Rhee , Hyun Kyu Yu , Bo Woo Kim , Kee Soo Nam
发明人： Jin Hyo Lee , Heung Soo Rhee , Hyun Kyu Yu , Bo Woo Kim , Kee Soo Nam
IPC分类号： H01L21/76 , H01L21/763 , H01L21/822 , H01L27/04 , H01L27/08 , H01L21/8234
CPC分类号： H01L21/763 , H01L27/08
摘要： The present invention relates to a on silicon substrate, specifically to an inductor device and manufacturing method thereof for enhancing the quality factor of the inductor by disposing trenches on a silicon substratre, and by filling the inside of the trenches with polycrystalline polysilicon not doped with impurities. The present invention provides an inductor device and a manufacturing method thereof which can improve the quality factor by increasing resistance of the substrate by forming deep trenches disposed in specific patterns on a low-resistance silicon substrate and filling polycrystalline silicon not doped with impurities, and by reducing parasitic capacitance between the inductor and the silicon substrate.
摘要翻译：本发明涉及一种硅衬底，具体涉及一种电感器件及其制造方法，用于通过在硅衬底上设置沟槽来提高电感器的品质因数，并且通过用不掺杂杂质的多晶多晶硅填充沟槽内部。本发明提供一种电感器件及其制造方法，其可以通过在低电阻硅衬底上形成以特定图案设置的深沟槽并填充未掺杂杂质的多晶硅，并且通过降低电感器和硅衬底之间的寄生电容。

64. 发明授权

US08902103B2 Radar apparatus supporting short and long range radar operation 有权
标题翻译：支持短距离和远程雷达操作的雷达装置
公开(公告)号：US08902103B2
公开(公告)日：2014-12-02
申请号：US13421223
申请日：2012-03-15
申请人： Cheon Soo Kim , Pil Jae Park , Min Park , Kyung Hwan Park , Dong-Young Kim , Jeong-Geun Kim , Bon Tae Koo , Hyun Kyu Yu
发明人： Cheon Soo Kim , Pil Jae Park , Min Park , Kyung Hwan Park , Dong-Young Kim , Jeong-Geun Kim , Bon Tae Koo , Hyun Kyu Yu
IPC分类号： G01S13/00 , G01S13/08 , G01S13/34 , G01S13/93 , G01S13/02 , G01S7/35
CPC分类号： G01S13/345 , G01S13/931 , G01S2007/358 , G01S2013/0254
摘要： Disclosed is a radar apparatus supporting short range and long range radar operations, wherein a plurality of short range transmitting chirp signals and a plurality of long range transmitting chirp signals are generated by a predetermined modulation scheme and is transmitted to an object through at least one transmitting array antenna and signals reflected from the object is received through at least one receiving array antenna, and the plurality of long range transmitting chirp signals have transmission power larger than that for the plurality of short range transmitting chirp signals.
摘要翻译：公开了一种支持短距离和远程雷达操作的雷达装置，其中通过预定的调制方案产生多个短距离发射啁啾信号和多个长距离发射啁啾信号，并通过至少一个发射通过至少一个接收阵列天线接收从对象反射的阵列天线和信号，并且多个长距离发射啁啾信号的发射功率大于多个短距离发射啁啾信号的发射功率。

65. 发明授权

US08754806B2 Pulse radar receiver 有权
标题翻译：脉冲雷达接收机
公开(公告)号：US08754806B2
公开(公告)日：2014-06-17
申请号：US13316381
申请日：2011-12-09
申请人： Pil Jae Park , Seong Do Kim , Sung Chul Woo , Hyun Kyu Yu
发明人： Pil Jae Park , Seong Do Kim , Sung Chul Woo , Hyun Kyu Yu
IPC分类号： G01S7/285 , G01S7/00 , G01S13/10
CPC分类号： G01S7/292
摘要： A pulse radar receiver includes a power splitter configured to split a transmit (TX) trigger signal for generating a TX pulse, a phase-locked loop (PLL) configured to receive a division ratio and the TX trigger signal split by the power splitter, and generate a sampling frequency, and a sampler configured to sample a reflected wave received through an RX antenna, according to the sampling frequency generated by the PLL. Accordingly, it is possible to provide a high distance resolution by generating a sampling frequency with a difference from a TX pulse to sample a reflected wave received through an RX antenna. Thus, it is possible to overcome a limitation in the distance resolution due to the pulse width and to measure a minute movement at a short distance. Therefore, the pulse radar receiver is applicable to high range resolution radar applications such as a living body measuring radar.
摘要翻译：脉冲雷达接收机包括：功率分配器，被配置为分离用于产生TX脉冲的发射（TX）触发信号;配置为接收分频比的锁相环（PLL）和由功率分配器分离的TX触发信号;以及产生采样频率，并且采样器被配置为根据由PLL产生的采样频率对通过RX天线接收的反射波进行采样。因此，通过产生与TX脉冲不同的采样频率来采样通过RX天线接收的反射波，可以提供高距离分辨率。因此，可以克服由于脉冲宽度导致的距离分辨率的限制并且能够在短距离处测量微小的移动。因此，脉冲雷达接收机适用于诸如生物体测量雷达的高范围分辨率雷达应用。

66. 发明授权

US08693581B2 Signal receiver with digital front end supporting multiple band and signal receiving method using the same 有权
标题翻译：信号接收机具有数字前端支持多频带和信号接收方式
公开(公告)号：US08693581B2
公开(公告)日：2014-04-08
申请号：US13284751
申请日：2011-10-28
申请人： Sang-Kyun Kim , Ik Soo Eo , Mijeong Park , Hyun Kyu Yu
发明人： Sang-Kyun Kim , Ik Soo Eo , Mijeong Park , Hyun Kyu Yu
IPC分类号： H03K9/00 , H04L27/00
CPC分类号： H04B1/001 , H04B1/0021
摘要： Disclosed is a method for receiving an analog signal from a receiver supporting at least a first channel band and a second channel band. The method for receiving an analog signal includes sampling the analog signal received through an antenna, generating a decimated signal by passing the sampled signal to a CIC decimation filter; and inputting the decimated signal to a channel selection filter.
摘要翻译：公开了一种从支持至少第一信道频带和第二信道频带的接收机接收模拟信号的方法。用于接收模拟信号的方法包括对通过天线接收的模拟信号进行采样，通过将采样信号传递给CIC抽取滤波器来产生抽取信号; 并将抽取的信号输入到频道选择滤波器。

67. 发明申请

US20130163699A1 DIGITAL FRONT END RECEIVER USING DC OFFSET COMPENSATION SCHEME 有权
标题翻译：数字前端接收器使用直流偏移补偿方案
公开(公告)号：US20130163699A1
公开(公告)日：2013-06-27
申请号：US13609704
申请日：2012-09-11
申请人： Sang-Kyun Kim , Ik Soo Eo , Hyun Kyu Yu
发明人： Sang-Kyun Kim , Ik Soo Eo , Hyun Kyu Yu
IPC分类号： H04B1/16
CPC分类号： H04B1/0017 , H04B1/0021
摘要： The present invention relates to a digital front end receiver using a DC offset compensation scheme. The digital front end receiver includes a DC offset compensation filter configured to remove DC offset components from signals received from a digital mixer and a Cascaded Integrator-Comb (CIC) decimation filter configured to reduce a sampling rate of the signals received from the DC offset compensation block.
摘要翻译：本发明涉及使用DC偏移补偿方案的数字前端接收机。数字前端接收器包括DC偏移补偿滤波器，其被配置为从数字混频器接收的信号中去除DC偏移分量，并且Cascaded Integrator-Comb（CIC）抽取滤波器被配置为降低从DC偏移补偿接收到的信号的采样率块。

68. 发明授权

US08432199B2 Fractional digital PLL with analog phase error compensator 有权
标题翻译：具有模拟相位误差补偿器的分数字数字PLL
公开(公告)号：US08432199B2
公开(公告)日：2013-04-30
申请号：US13310581
申请日：2011-12-02
申请人： Ja Yol Lee , Seong-Do Kim , Hyun Kyu Yu
发明人： Ja Yol Lee , Seong-Do Kim , Hyun Kyu Yu
IPC分类号： H03L7/06
CPC分类号： H03L7/0802 , H03L7/085 , H03L2207/50
摘要： Disclosed is a fractional digital phase locked loop with an analog phase error compensator. The digital phase locked loop with an analog phase error compensator can reduce excessive power consumption and power noise and transient current noise while increasing phase error detection resolution by performing fractional phase error detection and compensation through the analog phase error compensator.
摘要翻译：公开了具有模拟相位误差补偿器的分数字数字锁相环。具有模拟相位误差补偿器的数字锁相环可以通过模拟相位误差补偿器进行分数相位误差检测和补偿，从而降低功耗，功耗噪声和瞬态电流噪声，同时提高相位误差检测分辨率。

69. 发明授权

US08344772B2 Time-to-digital converter and all digital phase-locked loop including the same 有权
标题翻译：时间到数字转换器和所有数字锁相环包括相同的
公开(公告)号：US08344772B2
公开(公告)日：2013-01-01
申请号：US12956498
申请日：2010-11-30
申请人： Ja Yol Lee , Seon Ho Han , Mi Jeong Park , Jang Hong Choi , Seong Do Kim , Hyun Kyu Yu
发明人： Ja Yol Lee , Seon Ho Han , Mi Jeong Park , Jang Hong Choi , Seong Do Kim , Hyun Kyu Yu
IPC分类号： H03L7/06
CPC分类号： H03L7/095 , G04F10/005 , H03L7/085 , H03L7/103 , H03L2207/50
摘要： An all digital phase-locked loop (ADPLL) includes: a phase counter accumulating a frequency setting word value and the phase of a digitally controlled oscillator (DCO) clock and detecting a fine phase difference between a reference clock and a retimed clock; a phase detector detecting a digital phase error value compensating for a phase difference between the frequency setting word value and the DCO clock according to the fine phase difference to detect a digital phase error value; a digital loop filter filtering the digital phase error value and controlling PLL operational characteristics; a lock detector generating a lock indication signal according an output of the digital loop filter; a digitally controlled oscillator varying the frequency of the DCO clock according to the output from the digital loop filter; and a retimed clock generator generating the retimed clock by retiming the DCO clock at a low frequency.
摘要翻译：全数字锁相环（ADPLL）包括：相位计数器累积频率设定字值和数字控制振荡器（DCO）时钟的相位，并检测参考时钟和重新定时钟之间的精细相位差; 相位检测器，根据所述精细相位差检测补偿所述频率设定字值与所述DCO时钟之间的相位差的数字相位误差值，以检测数字相位误差值; 数字环路滤波器滤除数字相位误差值并控制PLL的操作特性; 锁定检测器，根据数字环路滤波器的输出产生锁定指示信号; 数字控制振荡器根据数字环路滤波器的输出改变DCO时钟的频率; 以及重新计时的时钟发生器，通过以低频再定时DCO时钟产生重定时钟。

70. 发明授权

US08306498B2 Wideband receiver 有权
标题翻译：宽带接收机
公开(公告)号：US08306498B2
公开(公告)日：2012-11-06
申请号：US12970874
申请日：2010-12-16
申请人： Hyun Kyu Yu , Joon Hee Lee , Seong Hwan Cho
发明人： Hyun Kyu Yu , Joon Hee Lee , Seong Hwan Cho
IPC分类号： H04B1/18 , H04K3/00
CPC分类号： H04B1/28 , H03D7/1441 , H03D7/1458
摘要： Provided is a wideband receiver that has a smaller area and consumes less power and can prevent harmonic mixing occurring due to an increase in the number of communications systems using wideband. A wideband receiver according to an aspect of the invention may include: an front-end unit receiving and performing low-pass filtering on a wideband input signal in a continuous-time domain; and a down-conversion unit sampling and holding an output signal of the front-end unit according to a local oscillator signal and performing low-pass filtering on the output signal in a discrete tie domain.
摘要翻译：提供了一种宽带接收机，其具有较小的面积并且消耗更少的功率，并且可以防止由于使用宽带的通信系统的数量的增加而发生谐波混合。根据本发明的一个方面的宽带接收机可以包括：前端单元在连续时域中接收并对宽带输入信号执行低通滤波; 下变频单元根据本地振荡器信号对前端单元的输出信号进行采样和保持，并对离散的连接域中的输出信号进行低通滤波。

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