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    • 61. 发明申请
    • Attachment structure of energy absorbing structure
    • 能量吸收结构的附件结构
    • US20080023972A1
    • 2008-01-31
    • US11878081
    • 2007-07-20
    • Yoshikazu OhnoHaruhiko YamamotoTakao Ito
    • Yoshikazu OhnoHaruhiko YamamotoTakao Ito
    • B60R19/24
    • B60R19/18B60R2019/188
    • An attachment structure of an energy absorbing structure includes: a bumper reinforcement that includes an attachment surface, with insertion holes being formed in the attachment surface; an energy absorbing structure disposed in contact with the attachment surface; locking claws that are disposed on the energy absorbing structure and engage with the bumper reinforcement to lock the energy absorbing structure to the bumper reinforcement; and load receiving projections that are disposed on the energy absorbing structure and are inserted into the insertion holes, so that when a load in a direction along the attachment surface acts on the energy absorbing structure, the load receiving projections interfere with inner peripheral portions of the insertion holes and receive the load.
    • 能量吸收结构的安装结构包括:保险杠加强件,其包括附接表面,在所述附接表面中形成有插入孔; 设置成与所述附接表面接触的能量吸收结构; 锁定爪,其设置在能量吸收结构上并与保险杠加强件接合以将能量吸收结构锁定到保险杠加强件; 以及负载接收突起,其设置在能量吸收结构上并被插入到插入孔中,使得当沿着附着表面的方向上的负载作用在能量吸收结构上时,负载接收突起与内部的 插入孔并接收负载。
    • 64. 发明授权
    • Lateral high-breakdown-voltage transistor
    • 横向高击穿电压晶体管
    • US06707104B2
    • 2004-03-16
    • US10277744
    • 2002-10-23
    • Kiminori WatanabeKeisuke MatsuokaTakao Ito
    • Kiminori WatanabeKeisuke MatsuokaTakao Ito
    • H01L2978
    • H01L29/7816H01L29/0696H01L29/0847H01L29/0878H01L29/1083H01L29/1095H01L29/7393H01L29/7801H01L29/7835
    • A lateral high-breakdown-voltage transistor comprises an n− drain region and an n+ source region formed in a p− silicon substrate, separated from each other, a gate electrode formed on a channel, insulated from the substrate, an n+ drain contact region formed in the drain region, drain wiring electrically connected to the drain region via the drain contact region, a p+ substrate contact region formed in contact with the source region, and source wiring electrically connected to the source region and also connected to the semiconductor layer via the substrate contact region. The transistor is characterized in that the substrate contact regions have respective portions made to be in contact with the source wiring, and accordingly laterally extend from inside the contact surface of the source wiring to outside the contact surface.
    • 横向高击穿电压晶体管包括彼此分离的在p型硅衬底中形成的n +漏极区域和n +源极区域,形成在与衬底绝缘的沟道上的栅极电极 ,形成在漏极区域中的n +漏极接触区域,经由漏极接触区域与漏极区域电连接的漏极布线,与源极区域形成的ap +衬底接触区域,以及与源极区域电连接的源极布线 并且还经由衬底接触区域连接到半导体层。 晶体管的特征在于,衬底接触区域具有与源极布线接触的相应部分,并且因此从源极布线的接触表面的内侧横向延伸到接触表面的外部。
    • 68. 发明授权
    • Semiconductor device element-isolation by oxidation of polysilicon in
trench
    • 通过在沟槽中氧化多晶硅的半导体器件元件隔离
    • US4810668A
    • 1989-03-07
    • US72446
    • 1987-07-13
    • Takao Ito
    • Takao Ito
    • H01L21/76H01L21/31H01L21/316H01L21/762H01L21/473
    • H01L21/76227
    • A method of manufacturing a semiconductor apparatus is disclosed, in which in the method of isolating elements, is improved. A groove is cut in a semiconductor substrate. Elements are isolated from each other by embedding an insulating material in the groove, in two divided portions. The time required for depositing an insulating material is reduced, thereby forming a uniform insulation layer on the semiconductor substrate. Since the insulating material can be etched in a shorter period of time than was previously required, the etching process can be more finely controlled. Since a field oxide layer is formed by oxidizing an insulation layer formed for the first time, the field oxide layer can be provided without oxidizing those portions of the semiconductor substrate which lie near the groove. Consequently, the seminconductor substrate can be free from crystalline defects.
    • 公开了一种制造半导体装置的方法,其中在隔离元件的方法中得到改善。 在半导体衬底中切割凹槽。 通过将绝缘材料嵌入凹槽中,以两个分开的方式将元件彼此隔离。 沉积绝缘材料所需的时间减少,从而在半导体衬底上形成均匀的绝缘层。 由于可以在比以前更短的时间段内蚀刻绝缘材料,所以可以更精细地控制蚀刻工艺。 由于通过氧化第一次形成的绝缘层来形成场氧化物层,所以可以提供场氧化物层而不氧化位于槽附近的半导体衬底的那些部分。 因此,半导体基底可以没有结晶缺陷。