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1. 发明授权

US5759887A Semiconductor device and a method of manufacturing a semiconductor device 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US5759887A
公开(公告)日：1998-06-02
申请号：US867897
申请日：1997-06-03
申请人： Takao Ito , Masayuki Ayabe
发明人： Takao Ito , Masayuki Ayabe
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8234 , H01L27/06
CPC分类号： H01L21/8234 , H01L27/0629
摘要： A method of manufacturing a semiconductor integrated circuit (IC) includes the steps of forming a polycrystalline silicon layer containing impurities on a semiconductor substrate; forming an oxidation-resistant insulating layer on the polycrystalline silicon layer; simultaneously forming resist patterns for forming a capacitor element and a resistor element on the oxidation-resistant insulating layer; and patterning the oxidation-resistant insulating layer and the polycrystalline silicon layer in sequence using resist patterns.
摘要翻译：一种制造半导体集成电路（IC）的方法包括以下步骤：在半导体衬底上形成含有杂质的多晶硅层; 在所述多晶硅层上形成抗氧化绝缘层; 同时在抗氧化绝缘层上形成用于形成电容器元件和电阻元件的抗蚀剂图案; 并使用抗蚀剂图案依次图案化耐氧化绝缘层和多晶硅层。

2. 发明申请

US20090283847A1 SEMICONDUCTOR PACKAGE INCLUDING THROUGH-HOLE ELECTRODE AND LIGHT-TRANSMITTING SUBSTRATE 有权
标题翻译：半导体封装，包括通孔电极和发光基板
公开(公告)号：US20090283847A1
公开(公告)日：2009-11-19
申请号：US12508293
申请日：2009-07-23
申请人： Atsuko KAWASAKI , Mie Matsuo , Ikuko Inoue , Masayuki Ayabe , Masahiro Sekiguchi , Kazumasa Tanida
发明人： Atsuko KAWASAKI , Mie Matsuo , Ikuko Inoue , Masayuki Ayabe , Masahiro Sekiguchi , Kazumasa Tanida
IPC分类号： H01L31/02
CPC分类号： H01L27/14618 , H01L21/76898 , H01L23/481 , H01L27/14636 , H01L2224/02372 , H01L2224/0392 , H01L2224/0401 , H01L2224/05548 , H01L2224/13022 , H01L2224/13024 , H04N5/2257
摘要： An imaging element is formed on the first main surface of a semiconductor substrate. An external terminal is formed on the second main surface of the semiconductor substrate. A through-hole electrode is formed in a through hole formed in the semiconductor substrate. A first electrode pad is formed on the through-hole electrode in the first main surface. An interlayer insulating film is formed on the first electrode pad and on the first main surface. A second electrode pad is formed on the interlayer insulating film. A passivation film is formed on the second electrode pad and the interlayer insulating film, and has an opening which exposes a portion of the second electrode pad. A contact plug is formed between the first and second electrode pads in a region which does not overlap the opening when viewed in a direction perpendicular to the surface of the semiconductor substrate.
摘要翻译：成像元件形成在半导体衬底的第一主表面上。外部端子形成在半导体衬底的第二主表面上。在形成在半导体衬底中的通孔中形成通孔电极。第一电极焊盘形成在第一主表面中的通孔电极上。在第一电极焊盘和第一主表面上形成层间绝缘膜。在层间绝缘膜上形成第二电极焊盘。在第二电极焊盘和层间绝缘膜上形成钝化膜，并且具有露出第二电极焊盘的一部分的开口。当在垂直于半导体衬底的表面的方向观察时，在不与开口重叠的区域中，在第一和第二电极焊盘之间形成接触插塞。

3. 发明授权

US07259412B2 Solid state imaging device 失效
标题翻译：固态成像装置
公开(公告)号：US07259412B2
公开(公告)日：2007-08-21
申请号：US11095592
申请日：2005-04-01
申请人： Tetsuya Yamaguchi , Hiroshige Goto , Masayuki Ayabe , Hisanori Ihara
发明人： Tetsuya Yamaguchi , Hiroshige Goto , Masayuki Ayabe , Hisanori Ihara
IPC分类号： H01L29/76
CPC分类号： H01L27/14609 , H01L27/14601 , H01L27/14643
摘要： A solid state imaging device includes a substrate of a first conductivity type. A transistor, which includes a first gate electrode and a first and second impurity areas, is provided on a surface of the substrate. The first and second impurity areas are formed in the surface of the substrate and sandwich a region under the first gate electrode. A third impurity area of a second conductivity type is formed in the surface of the substrate and spaced from the second impurity area at an opposite side to the first gate electrode. A fourth impurity area is formed under the second impurity area and connected to the third impurity area. A second gate electrode is provided above the substrate. A fifth impurity area of the second conductivity type is formed in the surface of the substrate. The third and fifth impurity areas sandwich a region under the second gate electrode.
摘要翻译：固态成像装置包括第一导电类型的衬底。在衬底的表面上设置包括第一栅极电极和第一和第二杂质区域的晶体管。第一和第二杂质区域形成在衬底的表面中并夹着第一栅电极下的区域。第二导电类型的第三杂质区域形成在衬底的表面中，并且与第一栅电极相对的一侧与第二杂质区隔开。在第二杂质区下方形成第四杂质区，并与第三杂质区连接。在基板上设置第二栅电极。第二导电类型的第五杂质区域形成在衬底的表面中。第三和第五杂质区夹在第二栅电极下方的区域。

4. 发明授权

US07808064B2 Semiconductor package including through-hole electrode and light-transmitting substrate 有权
标题翻译：半导体封装包括通孔电极和透光衬底
公开(公告)号：US07808064B2
公开(公告)日：2010-10-05
申请号：US12508293
申请日：2009-07-23
申请人： Atsuko Kawasaki , Mie Matsuo , Ikuko Inoue , Masayuki Ayabe , Masahiro Sekiguchi , Kazumasa Tanida
发明人： Atsuko Kawasaki , Mie Matsuo , Ikuko Inoue , Masayuki Ayabe , Masahiro Sekiguchi , Kazumasa Tanida
IPC分类号： H01L31/02
CPC分类号： H01L27/14618 , H01L21/76898 , H01L23/481 , H01L27/14636 , H01L2224/02372 , H01L2224/0392 , H01L2224/0401 , H01L2224/05548 , H01L2224/13022 , H01L2224/13024 , H04N5/2257
摘要： An imaging element is formed on the first main surface of a semiconductor substrate. An external terminal is formed on the second main surface of the semiconductor substrate. A through-hole electrode is formed in a through hole formed in the semiconductor substrate. A first electrode pad is formed on the through-hole electrode in the first main surface. An interlayer insulating film is formed on the first electrode pad and on the first main surface. A second electrode pad is formed on the interlayer insulating film. A passivation film is formed on the second electrode pad and the interlayer insulating film, and has an opening which exposes a portion of the second electrode pad. A contact plug is formed between the first and second electrode pads in a region which does not overlap the opening when viewed in a direction perpendicular to the surface of the semiconductor substrate.
摘要翻译：成像元件形成在半导体衬底的第一主表面上。外部端子形成在半导体衬底的第二主表面上。在形成在半导体衬底中的通孔中形成通孔电极。第一电极焊盘形成在第一主表面中的通孔电极上。在第一电极焊盘和第一主表面上形成层间绝缘膜。在层间绝缘膜上形成第二电极焊盘。在第二电极焊盘和层间绝缘膜上形成钝化膜，并且具有露出第二电极焊盘的一部分的开口。当在垂直于半导体衬底的表面的方向观察时，在不与开口重叠的区域中，在第一和第二电极焊盘之间形成接触插塞。

5. 发明申请

US20050242385A1 Solid state imaging device 失效
标题翻译：固态成像装置
公开(公告)号：US20050242385A1
公开(公告)日：2005-11-03
申请号：US11095592
申请日：2005-04-01
申请人： Tetsuya Yamaguchi , Hiroshige Goto , Masayuki Ayabe , Hisanori Ihara
发明人： Tetsuya Yamaguchi , Hiroshige Goto , Masayuki Ayabe , Hisanori Ihara
IPC分类号： H01L27/108 , H01L27/146 , H01L31/10 , H04N5/335 , H04N5/369 , H04N5/374
CPC分类号： H01L27/14609 , H01L27/14601 , H01L27/14643
摘要： A solid state imaging device includes a substrate of a first conductivity type. A transistor, which includes a first gate electrode and a first and second impurity areas, is provided on a surface of the substrate. The first and second impurity areas are formed in the surface of the substrate and sandwich a region under the first gate electrode. A third impurity area of a second conductivity type is formed in the surface of the substrate and spaced from the second impurity area at an opposite side to the first gate electrode. A fourth impurity area is formed under the second impurity area and connected to the third impurity area. A second gate electrode is provided above the substrate. A fifth impurity area of the second conductivity type is formed in the surface of the substrate. The third and fifth impurity areas sandwich a region under the second gate electrode.
摘要翻译：固态成像装置包括第一导电类型的衬底。在衬底的表面上设置包括第一栅电极和第一和第二杂质区的晶体管。第一和第二杂质区域形成在衬底的表面中并夹着第一栅电极下的区域。第二导电类型的第三杂质区域形成在衬底的表面中并且与第一栅电极相对的一侧与第二杂质区隔开。在第二杂质区下方形成第四杂质区，并与第三杂质区连接。在基板上设置第二栅电极。第二导电类型的第五杂质区域形成在衬底的表面中。第三和第五杂质区夹在第二栅电极下方的区域。

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