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    • 61. 发明授权
    • Semiconductor package socket
    • 半导体封装插座
    • US07871283B2
    • 2011-01-18
    • US12302750
    • 2007-12-03
    • Eiichi MurakoshiHideki SatoHideki Sagano
    • Eiichi MurakoshiHideki SatoHideki Sagano
    • H01R11/22
    • H05K7/1023G01R1/0466H01R2201/20
    • A semiconductor package socket (1, 101) has a socket base (10, 110) including a package rest (11, 111) on which a semiconductor package (50) having gull-wing leads (52) is put, a cover member (20, 120) movably attached on the socket base, and a plurality of contacts (30, 130) each including a first contact piece (31, 131) capable of making contact, from above, with a horizontal shoulder portion of the lead, a second contact piece (32, 132) capable of making contact, laterally, with a vertical leg portion of the lead and a fixed portion, and formed to advance onto or retract from the package rest due to vertical movement of the cover member. The package rest is formed with a dam wall that allows the leads to be lied thereover, wherein the first and the second contact pieces each have an elastic deforming portion to determine a contact pressure.
    • 一个半导体封装插座(1,101)具有一个插座基座(10,110),该插座底座包括一个其上放置有鸥翼引线(52)的半导体封装(50)的封装件(11,111),盖件 20,120),以及多个触头(30,130),每个触头(30,130)包括能够从上方与引线的水平肩部接触的第一接触片(31,131), 第二接触片(32,132)能够横向地与引线的垂直腿部接触,并且固定部分,并且由于盖构件的垂直运动而形成为从包装件前进或从包装件退回。 包装搁板形成有允许引线在其上被撒布的阻挡壁,其中第一和第二接触片各自具有弹性变形部分以确定接触压力。
    • 64. 发明申请
    • SEMICONDUCTOR PACKAGE SOCKET
    • 半导体封装插座
    • US20100261370A1
    • 2010-10-14
    • US12302750
    • 2007-12-03
    • Eiichi MurakoshiHideki SatoHideki Sagano
    • Eiichi MurakoshiHideki SatoHideki Sagano
    • H01R13/62
    • H05K7/1023G01R1/0466H01R2201/20
    • A semiconductor package socket (1, 101) has a socket base (10, 110) including a package rest (11, 111) on which a semiconductor package (50) having gull-wing leads (52) is put, a cover member (20, 120) movably attached on the socket base, and a plurality of contacts (30, 130) each including a first contact piece (31, 131) capable of making contact, from above, with a horizontal shoulder portion of the lead, a second contact piece (32, 132) capable of making contact, laterally, with a vertical leg portion of the lead and a fixed portion, and formed to advance onto or retract from the package rest due to vertical movement of the cover member. The package rest is formed with a dam wall that allows the leads to be lied thereover, wherein the first and the second contact pieces each have an elastic deforming portion to determine a contact pressure.
    • 一种半导体封装插座(1,101)具有一个插座基座(10,110),该基座包括一个其上放置有鸥翼引线(52)的半导体封装(50)的封装件(11,111),盖件 20,120),以及多个触头(30,130),每个触头(30,130)包括能够从上方与引线的水平肩部接触的第一接触片(31,131), 第二接触片(32,132)能够横向地与引线的垂直腿部接触,并且固定部分,并且由于盖构件的垂直运动而形成为从包装件前进或从包装件退回。 包装搁板形成有允许引线在其上被撒布的阻挡壁,其中第一和第二接触片各自具有弹性变形部分以确定接触压力。
    • 65. 发明授权
    • Method for evaluating semiconductor wafer and apparatus for evaluating semiconductor wafer
    • 用于评估半导体晶片的方法和用于评估半导体晶片的装置
    • US07633305B2
    • 2009-12-15
    • US11661276
    • 2005-09-12
    • Tsuyoshi OhtsukiHideki Sato
    • Tsuyoshi OhtsukiHideki Sato
    • G01R31/02G01R31/26
    • G01R31/2889H01L22/14
    • The present invention is a method for evaluating a semiconductor wafer by measuring an electric characteristic of the semiconductor wafer by using a mercury electrode, wherein when the semiconductor wafer is held on a wafer chuck that the mercury electrode is formed in a holding surface of so that a side of a surface to be measured of the semiconductor wafer is set to a side of the wafer chuck, the semiconductor wafer is held on the wafer chuck whose diameter forming an outermost periphery of the holding surface is smaller than a diameter forming an outermost periphery of the surface to be measured of the semiconductor wafer, and then, the electric characteristic is measured by contacting the mercury electrode with the surface to be measured of the wafer, and an evaluation apparatus. Thereby, there can be provided an evaluation method and an evaluation apparatus for a semiconductor wafer by which when the semiconductor wafer is evaluated by measuring an electric characteristic thereof by using a mercury electrode, the semiconductor wafer can be high-precisely and effectively evaluated by setting a size of a holding surface of a wafer chuck to be smaller than that of a surface to be measured of the semiconductor wafer that is an object to be measured.
    • 本发明是一种通过使用水银电极测量半导体晶片的电特性来评估半导体晶片的方法,其中当将半导体晶片保持在晶片卡盘上时,将汞电极形成在保持表面上,使得 将半导体晶片的待测表面的一侧设置在晶片卡盘的一侧,将半导体晶片保持在形成保持表面的最外周的直径小于形成最外周的直径的晶片卡盘上 的半导体晶片的待测表面,然后通过使水银电极与晶片的待测表面接触来测量电特性,以及评估装置。 因此,可以提供一种用于半导体晶片的评估方法和评估装置,当通过使用汞电极测量半导体晶片的电特性来评估半导体晶片时,可以通过设置高精度有效地评估半导体晶片 晶片卡盘的保持表面的尺寸要小于作为被测量对象的半导体晶片的待测量表面的尺寸。
    • 66. 发明申请
    • IMAGE FORMING APPARATUS
    • 图像形成装置
    • US20090238618A1
    • 2009-09-24
    • US12388666
    • 2009-02-19
    • Hiroshi KonKaoru WatanabeHideki SatoAkio MiyazakiKoichi Tanaka
    • Hiroshi KonKaoru WatanabeHideki SatoAkio MiyazakiKoichi Tanaka
    • G03G15/00
    • G03G15/6552G03G15/6573G03G2215/00721
    • An image forming apparatus includes: an image forming apparatus main body; a cover provided openably/closably with respect to the image forming apparatus main body; a conveyance passage, formed in the image forming apparatus main body, on which a recording medium is conveyed; a detection device that detects movement of the recording medium conveyed on the conveyance passage; a first recording medium guide member provided oppositely to the moving member and fixed when the cover is closed; and a second recording medium guide member, provided on a downstream side of and following the first recording medium guide member in a recording medium conveyance direction, that movably guides the conveyed recording medium.
    • 图像形成装置包括:图像形成装置主体; 相对于图像形成装置主体可开闭地关闭的盖; 输送通道,形成在图像形成装置主体中,记录介质被输送到该输送通道上; 检测装置,其检测在所述输送通道上输送的记录介质的移动; 第一记录介质引导构件,与所述移动构件相对地设置,并且当所述盖关闭时固定; 以及第二记录介质引导构件,其设置在记录介质传送方向上的第一记录介质引导构件的下游侧并且跟随第一记录介质引导构件的下游侧,可移动地引导传送的记录介质。
    • 67. 发明授权
    • Magnetic sensor formed of magnetoresistance effect elements
    • 磁传感器由磁阻效应元件形成
    • US07589528B2
    • 2009-09-15
    • US11682841
    • 2007-03-06
    • Hideki SatoToshiyuki OohashiYukio WakuiSusumu YoshidaKokichi Aiso
    • Hideki SatoToshiyuki OohashiYukio WakuiSusumu YoshidaKokichi Aiso
    • G01R33/02
    • B82Y25/00B82Y40/00G01R33/09G01R33/093H01F41/302Y10T29/49002Y10T29/49037Y10T428/32
    • On a single chip are formed a plurality of magnetoresistance effect elements provided with pinned layers having fixed magnetization axes in the directions that cross each other. On a substrate 10 are formed magnetic layers that will become two magnetic tunnel effect elements 11, 21 as magnetoresistance effect elements. Magnetic-field-applying magnetic layers made of NiCo are formed to sandwich the magnetic layers in plan view. A magnetic field is applied to the magnetic-field-applying magnetic layers. The magnetic field is removed after the magnetic-field-applying magnetic layers are magnetized in the direction shown by arrow A. As a result of this, by the residual magnetization of the magnetic-field-applying magnetic layers, magnetic fields in the directions shown by arrows B are applied to the magnetic layers that will become magnetic tunnel effect elements 11, 21, whereby the magnetization of the pinned layers of the magnetic layers that will become magnetic tunnel effect elements 11, 21 is pinned in the directions shown by arrows B.
    • 在单个芯片上形成有多个磁阻效应元件,该元件具有在彼此交叉的方向上具有固定的磁化轴的固定层。 在基板10上形成作为磁阻效应元件的两个磁隧道效应元件11,21的磁性层。 形成由NiCo制成的磁场施加磁性层,以在平面图中夹着磁性层。 对磁场施加磁性层施加磁场。 在磁场施加磁性层沿着箭头A所示的方向被磁化之后,去除磁场。结果,通过磁场施加磁性层的剩余磁化,所示方向上的磁场 通过箭头B施加到将成为磁隧道效应元件11,21的磁性层,由此将成为磁隧道效应元件11,21的磁性层的被钉扎层的磁化被固定在箭头B所示的方向上 。