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61. 发明申请

US20050260833A1 Constant emissivity deposition member 失效
标题翻译：恒辐射率沉积元件
公开(公告)号：US20050260833A1
公开(公告)日：2005-11-24
申请号：US10851384
申请日：2004-05-22
申请人： Fenton McFeely , John Yurkas , Sandra Malhotra , Andrew Simon
发明人： Fenton McFeely , John Yurkas , Sandra Malhotra , Andrew Simon
IPC分类号： C23C16/44 , C30B1/00 , C30B35/00 , H01L21/20 , H01L21/285 , H01L21/36 , H01L21/44
CPC分类号： C23C16/4404 , C30B35/00 , H01L21/28556
摘要： A deposition member adapted for discharging a deposition material during a deposition process can acquire a coating during the deposition. Such an initial emissivity value is selected for the deposition member, before any of the coating became deposited, that the emissivity of the deposition member remains substantially unchanged during the deposition process. In a representative embodiment the deposition member is coated with an appropriate thin layer for achieving the selected emissivity value.
摘要翻译：适于在沉积过程中排出沉积材料的沉积构件可以在沉积期间获得涂层。在任何涂层沉积之前，沉积构件选择这种初始发射率值，沉积构件的发射率在沉积过程中保持基本不变。在代表性的实施例中，沉积构件涂覆有适当的薄层以实现所选择的发射率值。

62. 发明申请

US20050158985A1 Copper recess process with application to selective capping and electroless plating 有权
标题翻译：铜凹槽工艺，适用于选择性封盖和无电镀
公开(公告)号：US20050158985A1
公开(公告)日：2005-07-21
申请号：US11058783
申请日：2005-02-16
申请人： Shyng-Tsong Chen , Timothy Dalton , Kenneth Davis , Chao-Kun Hu , Fen Jamin , Steffen Kaldor , Mahadevaiyer Krishnan , Kaushik Kumar , Michael Lofaro , Sandra Malhotra , Chandrasekhar Narayan , David Rath , Judith Rubino , Katherine Saenger , Andrew Simon , Sean Smith , Wei-tsu Tseng
发明人： Shyng-Tsong Chen , Timothy Dalton , Kenneth Davis , Chao-Kun Hu , Fen Jamin , Steffen Kaldor , Mahadevaiyer Krishnan , Kaushik Kumar , Michael Lofaro , Sandra Malhotra , Chandrasekhar Narayan , David Rath , Judith Rubino , Katherine Saenger , Andrew Simon , Sean Smith , Wei-tsu Tseng
IPC分类号： H01L21/768 , H01L23/532 , H01L21/44 , H01L21/4763 , H01L21/48
CPC分类号： H01L21/76849 , H01L21/76834 , H01L21/76847 , H01L21/76883 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： An integrated circuit structure is disclosed that has a layer of logical and functional devices and an interconnection layer above the layer of logical and functional devices. The interconnection layer has a substrate, conductive features within the substrate and caps positioned only above the conductive features.
摘要翻译：公开了一种集成电路结构，其具有逻辑和功能器件层以及逻辑和功能器件层之上的互连层。互连层具有衬底，衬底内的导电特征和仅位于导电特征之上的盖。

63. 发明申请

US20050070100A1 Low-pressure deposition of metal layers from metal-carbonyl precursors 有权
标题翻译：金属 - 羰基前驱体金属层的低压沉积
公开(公告)号：US20050070100A1
公开(公告)日：2005-03-31
申请号：US10673908
申请日：2003-09-30
申请人： Hideaki Yamasaki , Tsukasa Matsuda , Atsushi Gomi , Tatsuo Hatano , Masahito Sugiura , Yumiko Kawano , Gert Leusink , Fenton McFeely , Sandra Malhotra
发明人： Hideaki Yamasaki , Tsukasa Matsuda , Atsushi Gomi , Tatsuo Hatano , Masahito Sugiura , Yumiko Kawano , Gert Leusink , Fenton McFeely , Sandra Malhotra
IPC分类号： C23C16/16 , C23C16/44 , H01L21/285 , H01L21/44
CPC分类号： C23C16/16 , H01L21/28556
摘要： A method for depositing metal layers on semiconductor substrates by a thermal chemical vapor deposition (TCVD) process includes introducing a process gas containing a metal carbonyl precursor in a process chamber and depositing a metal layer on a substrate. The TCVD process utilizes a short residence time for the gaseous species in the processing zone above the substrate to form a low-resistivity metal layer. In one embodiment of the invention, the metal carbonyl precursor can be selected from at least one of W(CO)6, Ni(CO)4, Mo(CO)6, Co2(CO)8, Rh4(CO)12, Re2(CO)10, Cr(CO)6, and Ru3(CO)12 precursors. In another embodiment of the invention, a method is provided for depositing low-resistivity W layers at substrate temperatures below about 500° C., by utilizing a residence time less than about 120 msec.
摘要翻译：通过热化学气相沉积（TCVD）方法在金属层上沉积金属层的方法包括在处理室中引入含有羰基金属前驱体的工艺气体并在基底上沉积金属层。 TCVD工艺利用在衬底上方的处理区域中的气态物质的短暂停留时间以形成低电阻率金属层。在本发明的一个实施方案中，金属羰基前体可以选自W（CO）6，Ni（CO）4，Mo（CO）6，Co 2（CO）8，Rh 4（CO）12，Re 2 （CO）10，Cr（CO）6和Ru 3（CO）12前体）。在本发明的另一个实施例中，提供了一种通过利用小于约120毫秒的停留时间在低于约500℃的衬底温度下沉积低电阻W层的方法。

64. 发明申请

US20050069641A1 Method for depositing metal layers using sequential flow deposition 审中-公开
标题翻译：使用顺序流沉积沉积金属层的方法
公开(公告)号：US20050069641A1
公开(公告)日：2005-03-31
申请号：US10673910
申请日：2003-09-30
申请人： Tsukasa Matsuda , Taro Ikeda , Tatsuo Hatano , Mitsuhiro Tachibana , Hideaki Yamasaki , Gert Leusink , Fenton McFeely , Sandra Malhotra , Andrew Simon , John Yurkas
发明人： Tsukasa Matsuda , Taro Ikeda , Tatsuo Hatano , Mitsuhiro Tachibana , Hideaki Yamasaki , Gert Leusink , Fenton McFeely , Sandra Malhotra , Andrew Simon , John Yurkas
IPC分类号： C23C16/16 , C23C16/44 , C23C16/455 , H01L21/285 , B05D3/02 , C23C16/00
CPC分类号： C23C16/4408 , C23C16/16 , C23C16/45523 , H01L21/28562
摘要： A method for depositing metal layers with good surface morphology using sequential flow deposition includes alternately exposing a substrate in a process chamber to a metal-carbonyl precursor gas and a reducing gas. During exposure with the metal-carbonyl precursor gas, a thin metal layer is deposited on the substrate, and subsequent exposure of the metal layer to the reducing gas aids in the removal of reaction by-products from the metal layer. The metal-carbonyl precursor gas and a reducing gas exposure steps can be repeated until a metal layer with a desired thickness is achieved. The metal-carbonyl precursor can, for example, be selected from W(CO)6, Ni(CO)4, Mo(CO)6, Co2(CO)8, Rh4(CO)12, Re2(CO)10, Cr(CO)6, and Ru3(CO)12.
摘要翻译：使用顺序流动沉积沉积具有良好表面形态的金属层的方法包括将处理室中的衬底交替地暴露于羰基金属前体气体和还原气体。在用羰基金属前驱体气体曝光的同时，在基板上沉积薄金属层，随后将金属层暴露于还原气体有助于从金属层除去反应副产物。可以重复金属羰基前体气体和还原气体暴露步骤，直到达到具有所需厚度的金属层。金属羰基前体可以例如选自W（CO）6，Ni（CO）4，Mo（CO）6，Co2（CO）8，Rh4（CO）12，Re2（CO）（CO）6和Ru 3（CO）12。

65. 发明申请

US20130330903A1 MANUFACTURABLE HIGH-K DRAM MIM CAPACITOR STRUCTURE 有权
标题翻译：可制造的高K DRAM MIM电容结构
公开(公告)号：US20130330903A1
公开(公告)日：2013-12-12
申请号：US13494808
申请日：2012-06-12
申请人： Sandra Malhotra , Wim Deweerd , Ode Hiroyuki
发明人： Sandra Malhotra , Wim Deweerd , Ode Hiroyuki
IPC分类号： H01L21/02
CPC分类号： H01L28/56 , H01L27/10852 , H01L28/60 , H01L28/90
摘要： A method for forming a capacitor stack is described. In some embodiments of the present invention, a first dielectric material is formed above a first electrode material. The first electrode material is rigid and has good mechanical strength and serves as a robust frame for the capacitor stack. The first dielectric material is sufficiently thin ( 3 nm) or lightly doped or non-doped so that it crystallizes after subsequent anneal treatments. A second electrode material is formed adjacent to the second dielectric material. The second electrode material has a high work function and a crystal structure that serves to promote the formation of the high k-value crystal structure of the second dielectric material.
摘要翻译：描述形成电容器堆叠的方法。在本发明的一些实施例中，第一电介质材料形成在第一电极材料之上。第一电极材料是刚性的并且具有良好的机械强度并且用作用于电容器叠层的坚固框架。第一介电材料足够薄（ 3nm）或轻掺杂或未掺杂，使得其在随后的退火处理之后结晶。与第二电介质材料相邻地形成第二电极材料。第二电极材料具有高功函数和用于促进形成第二电介质材料的高k值晶体结构的晶体结构。

66. 发明申请

US20070222066A1 STRUCTURE AND METHOD OF FORMING ELECTRODEPOSITED CONTACTS 有权
标题翻译：形成电沉积联系的结构和方法
公开(公告)号：US20070222066A1
公开(公告)日：2007-09-27
申请号：US11308433
申请日：2006-03-24
申请人： Cyril Cabral , Hariklia Deligianni , Randolph Knarr , Sandra Malhotra , Stephen Rossnagel , Xiaoyan Shao , Anna Topol , Philippe Vereecken
发明人： Cyril Cabral , Hariklia Deligianni , Randolph Knarr , Sandra Malhotra , Stephen Rossnagel , Xiaoyan Shao , Anna Topol , Philippe Vereecken
IPC分类号： H01L23/48
CPC分类号： H01L23/485 , H01L21/2885 , H01L21/76843 , H01L21/76846 , H01L21/76877 , H01L23/53252 , H01L2924/0002 , H01L2924/00
摘要： A contact metallurgy structure comprising a patterned dielectric layer having cavities on a substrate; a silicide or germanide layer such as of cobalt and/or nickel located at the bottom of cavities; a contact layer comprising Ti or Ti/TiN located on top of the dielectric layer and inside the cavities and making contact to the silicide or germanide layer on the bottom; a diffusion barrier layer located on top of the contact layer and inside the cavities; optionally a seed layer for plating located on top of the barrier layer; a metal fill layer in vias is provided along with a method of fabrication. The metal fill layer is electrodeposited with at least one member selected from the group consisting of copper, rhodium, ruthenium, iridium, molybdenum, gold, silver, nickel, cobalt, silver, gold, cadmium and zinc and alloys thereof. When the metal fill layer is rhodium, ruthenium, or iridium, an effective diffusion barrier layer is not required between the fill metal and the dielectric. When the barrier layer is platable, such as ruthenium, rhodium, platinum, or iridium, the seed layer is not required.
摘要翻译：一种接触式冶金结构，包括在基底上具有空腔的图案化电介质层; 位于空腔底部的硅化物或锗化物层，例如钴和/或镍; 接触层，其包含位于介电层顶部并且在空腔内并与底部的硅化物或锗化物层接触的Ti或Ti / TiN; 位于所述接触层顶部和所述空腔内的扩散阻挡层; 可选地，位于阻挡层顶部的用于电镀的种子层; 提供通孔中的金属填充层以及制造方法。金属填充层用选自铜，铑，钌，铱，钼，金，银，镍，钴，银，金，镉和锌中的至少一种电池和其合金电沉积。当金属填充层是铑，钌或铱时，在填充金属和电介质之间不需要有效的扩散阻挡层。当阻挡层是可镀的，例如钌，铑，铂或铱时，不需要种子层。

67. 发明申请

US20050199502A1 Method for electroplating on resistive substrates 审中-公开
标题翻译：电阻基板电镀方法
公开(公告)号：US20050199502A1
公开(公告)日：2005-09-15
申请号：US11123117
申请日：2005-05-06
申请人： Panayotis Andricacos , Hariklia Deligianni , Wilma Horkans , Keith Kwietniak , Michael Lane , Sandra Malhotra , Fenton McFeely , Conal Murray , Kenneth Rodbell , Philippe Vereecken
发明人： Panayotis Andricacos , Hariklia Deligianni , Wilma Horkans , Keith Kwietniak , Michael Lane , Sandra Malhotra , Fenton McFeely , Conal Murray , Kenneth Rodbell , Philippe Vereecken
IPC分类号： C25D5/18 , C25D7/12 , C25D5/02
CPC分类号： C25D5/18 , C25D7/12 , Y10S428/926 , Y10T428/12493 , Y10T428/12528 , Y10T428/12771 , Y10T428/12778 , Y10T428/12903
摘要： A conductive material is electroplated onto a platable resistive metal barrier layer(s) employing a plating bath optionally comprising a super filling additive and a suppressor, and by changing the current or voltage as a function of the area of plated metal. A structure is also provided that comprises a substrate, a platable metal barrier layer(s) located on the substrate and a relatively continuous uniform electroplated layer of a conductive material located on the platable resistive metal barrier layer.
摘要翻译：导电材料电镀在可镀敷的电阻金属阻挡层上，该层使用任选地包含超填充添加剂和抑制剂的电镀槽，并且通过改变作为电镀金属面积的函数的电流或电压。还提供了一种结构，其包括衬底，位于衬底上的可镀金属阻挡层和位于可镀电阻金属阻挡层上的导电材料的相对连续的均匀电镀层。

68. 发明申请

US20050110142A1 Diffusion barriers formed by low temperature deposition 审中-公开
标题翻译：通过低温沉积形成的扩散壁垒
公开(公告)号：US20050110142A1
公开(公告)日：2005-05-26
申请号：US10722934
申请日：2003-11-26
申请人： Michael Lane , Christian Lavoie , Sandra Malhotra , Fenton McFeely , John Yurkas
发明人： Michael Lane , Christian Lavoie , Sandra Malhotra , Fenton McFeely , John Yurkas
IPC分类号： H01L21/285 , H01L21/4763 , H01L21/768 , H01L23/48 , H01L23/532 , H01L29/40
CPC分类号： H01L21/76843 , H01L21/28556 , H01L23/53223 , H01L23/53238 , H01L23/53252 , H01L2924/0002 , H01L2924/00
摘要： A solid state device includes a first material and a second material. A barrier layer is formed between the first material and the second material to prevent diffusion between the first material and the second material. The barrier layer includes a metal form of at least one of Ru and Re. The barrier layer is preferably formed using a low temperature deposition process, where the substrate is less than 400 degrees C.
摘要翻译：固体装置包括第一材料和第二材料。在第一材料和第二材料之间形成阻挡层以防止第一材料和第二材料之间的扩散。阻挡层包括Ru和Re中的至少一种的金属形式。阻挡层优选使用低温沉积工艺形成，其中衬底小于400℃。

69. 发明授权

US08828836B2 Method for fabricating a DRAM capacitor 有权
标题翻译：制造DRAM电容器的方法
公开(公告)号：US08828836B2
公开(公告)日：2014-09-09
申请号：US13153626
申请日：2011-06-06
申请人： Karthik Ramani , Hiroyuki Ode , Sandra Malhotra
发明人： Karthik Ramani , Hiroyuki Ode , Sandra Malhotra
IPC分类号： H01L21/20 , H01L49/02 , H01L29/92
CPC分类号： H01L28/40 , H01L28/60 , H01L28/65 , H01L29/92
摘要： A method for fabricating a dynamic random access memory (DRAM) capacitor stack is disclosed wherein the stack includes a first electrode, a dielectric layer, and a second electrode. The first electrode is formed from a conductive binary metal. A dielectric layer is formed over the first electrode. The dielectric layer is subjected to a milliseconds anneal process that serves to crystallize the dielectric material and decrease the concentration of oxygen vacancies.
摘要翻译：公开了一种用于制造动态随机存取存储器（DRAM）电容器堆叠的方法，其中堆叠包括第一电极，电介质层和第二电极。第一电极由导电二元金属形成。在第一电极上形成电介质层。对电介质层进行几毫秒的退火工艺，以使介电材料结晶并降低氧空位的浓度。

70. 发明申请

US20080003360A1 METHOD FOR INCREASING DEPOSITION RATES OF METAL LAYERS FROM METAL-CARBONYL PRECURSORS 有权
标题翻译：从金属碳前驱体增加金属层沉积速率的方法
公开(公告)号：US20080003360A1
公开(公告)日：2008-01-03
申请号：US11856946
申请日：2007-09-18
申请人： Kenji Suzuki , Emmanuel Guidotti , Gerrit Leusink , Fenton McFeely , Sandra Malhotra
发明人： Kenji Suzuki , Emmanuel Guidotti , Gerrit Leusink , Fenton McFeely , Sandra Malhotra
IPC分类号： C23C16/06
CPC分类号： H01L21/76843 , C23C16/16 , H01L21/28556 , H01L21/76846 , H01L21/76873
摘要： A method for increasing deposition rates of metal layers from metal-carbonyl precursors by mixing a vapor of the metal-carbonyl precursor with CO gas. The method includes providing a substrate in a process chamber of a deposition system, forming a process gas containing a metal-carbonyl precursor vapor and a CO gas, and exposing the substrate to the process gas to deposit a metal layer on the substrate by a thermal chemical vapor deposition process.
摘要翻译：通过将羰基金属前体的蒸气与CO气体混合来提高金属 - 羰基前体的金属层的沉积速率的方法。该方法包括在沉积系统的处理室中提供衬底，形成含有羰基金属前体蒸气和CO气体的工艺气体，以及将衬底暴露于工艺气体，以通过热量沉积在衬底上的金属层化学气相沉积工艺。

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