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61. 再颁专利

USRE40916E1 Liquid crystal driver and liquid crystal display device using the same 有权
标题翻译：液晶驱动器和液晶显示装置使用相同
公开(公告)号：USRE40916E1
公开(公告)日：2009-09-15
申请号：US11980700
申请日：2007-10-31
申请人： Hiroyuki Nitta , Hiroyuki Mano , Tsutomu Furuhashi , Isao Takita , Satoru Tsunekawa , Toshio Futami , Makiko Ikeda
发明人： Hiroyuki Nitta , Hiroyuki Mano , Tsutomu Furuhashi , Isao Takita , Satoru Tsunekawa , Toshio Futami , Makiko Ikeda
IPC分类号： G09G3/36
CPC分类号： G09G3/2011 , G09G3/3614 , G09G3/3655 , G09G3/3688 , G09G3/3696 , G09G2310/0248 , G09G2310/027 , G09G2310/0281 , G09G2310/0289 , G09G2310/0297 , G09G2330/023
摘要： A liquid crystal driver includes a voltage generator for generating gray scale voltages on the basis of reference voltages, and an output device for selecting one gray scale voltage from the generated gray scale voltages in accordance with display data, for applying inversion/non-inversion control to the selected gray scale voltage with respect to an inversion reference voltage on the basis of the selected gray scale voltage, an AC switching signal and the inversion reference voltage, and for outputting different liquid crystal supply voltages for one and the same display data to a liquid crystal panel.
摘要翻译：液晶驱动器包括：基于参考电压产生灰度电压的电压发生器;以及用于根据显示数据从产生的灰度级电压中选择一个灰度级电压的输出装置，用于施加反相/非反相控制基于所选择的灰度级电压，AC开关信号和反转参考电压相对于反转参考电压的所选择的灰度级电压，并且将用于一个和相同显示数据的不同液晶电源电压输出到液晶面板。

62. 发明授权

US07551157B2 Display device and driving method thereof 有权
标题翻译：显示装置及其驱动方法
公开(公告)号：US07551157B2
公开(公告)日：2009-06-23
申请号：US11360692
申请日：2006-02-24
申请人： Masahiro Tanaka , Hiroyuki Nitta , Nobuhiro Takeda , Masashi Nakamura
发明人： Masahiro Tanaka , Hiroyuki Nitta , Nobuhiro Takeda , Masashi Nakamura
IPC分类号： G09G3/36 , G09G5/00
CPC分类号： G09G3/3611 , G09G3/20 , G09G3/3614 , G09G3/3648 , G09G2310/0205 , G09G2310/0267 , G09G2310/062 , G09G2320/0261 , G09G2320/0626
摘要： A display device includes a plurality of gate lines, at least one data line, and a plurality of pixels connected to the plurality of gate lines and the at least one data line. The display device is configured to perform a first step of sequentially selecting N lines of the plurality of gate lines, and sequentially outputting N times display signals to the data line, and to perform a second step of selecting Z lines of the plurality of gate lines at one time, and outputting one time a blanking signal, where N and Z are natural numbers at least equal to 2. The Z lines are separate from the N lines, and the first step and the second step are repeatedly performed.
摘要翻译：显示装置包括多条栅极线，至少一条数据线，和连接到多条栅极线和至少一条数据线的多个像素。所述显示装置被配置为执行顺序选择所述多条栅极线中的N条线并且顺序地将N次显示信号输出到所述数据线的第一步骤，并且执行选择所述多条栅极线的Z线的第二步骤并且一次输出一个消隐信号，其中N和Z是至少等于2的自然数.Z行与N行分离，并且重复执行第一步骤和第二步骤。

63. 发明授权

US07535439B2 Display device and method for driving a display device 有权
标题翻译：用于驱动显示装置的显示装置和方法
公开(公告)号：US07535439B2
公开(公告)日：2009-05-19
申请号：US11433775
申请日：2006-05-15
申请人： Hiroyuki Nitta , Masahisa Tsukahara , Toshifumi Ozaki
发明人： Hiroyuki Nitta , Masahisa Tsukahara , Toshifumi Ozaki
IPC分类号： G09G3/20
CPC分类号： G09G3/22 , G09G2310/0267
摘要： A display device driver constructed of scanning selection switches corresponding to a plurality of scanning wiring lines, a non-selection switch which brings the scanning wiring line into a non-selected state, a feedback switch which detects a scanning electrode potential and a negative feedback amplifier which sets the scanning electrode potential to a predetermined potential every electrode based on the scanning electrode potential detected by the feedback switch, and a time constant formed of a combined capacitance of a capacitance of the feedback switch and a wiring line capacitance and a feedback switch resistance is set to be smaller than that of a display panel capacitance and a scanning selection switch resistance.
摘要翻译：一种显示装置驱动器，其构成为对应于多条扫描布线的扫描选择开关，使扫描布线成为非选择状态的非选择开关，检测扫描电极电位的反馈开关和负反馈放大器其基于由反馈开关检测的扫描电极电位，将扫描电极电位设定为每个电极的预定电位，并且由反馈开关的电容和布线线电容的组合电容和反馈开关电阻形成的时间常数被设置为小于显示面板电容和扫描选择开关电阻的小。

64. 发明授权

US07429765B2 Nonvolatile semiconductor memory 失效
标题翻译：非易失性半导体存储器
公开(公告)号：US07429765B2
公开(公告)日：2008-09-30
申请号：US10935269
申请日：2004-09-08
申请人： Akira Goda , Hiroyuki Nitta
发明人： Akira Goda , Hiroyuki Nitta
IPC分类号： H01L29/788
CPC分类号： H01L29/7881 , G11C16/0416 , G11C16/0483 , H01L27/0207 , H01L27/105 , H01L27/115 , H01L27/11519 , H01L27/11521 , H01L27/11524 , H01L27/11526
摘要： A nonvolatile semiconductor memory includes: a device region and a device isolating region, which have a pattern with a striped form that extends in a first direction, and are alternately and sequentially disposed at a first pitch in a second direction that is perpendicular to the first direction; and a contact made of a first conductive material, which is connected to the device region and disposed at the first pitch in the second direction. On a cross section of the second direction, the bottom width of the contact is longer than the top width of the contact, and the bottom width is longer than the width of the device region.
摘要翻译：非易失性半导体存储器包括：器件区域和器件隔离区域，其具有沿第一方向延伸的条纹形式的图案，并且在垂直于第一方向的第二方向上以第一间距交替地并且顺序地设置方向; 以及由第一导电材料制成的接触件，其连接到器件区域并沿第二方向以第一间距设置。在第二方向的横截面上，触点的底部宽度比触点的顶部宽度长，并且底部宽度比器件区域的宽度长。

65. 发明授权

US07359274B2 Semiconductor memory device 失效
标题翻译：半导体存储器件
公开(公告)号：US07359274B2
公开(公告)日：2008-04-15
申请号：US11678632
申请日：2007-02-26
申请人： Mitsuhiro Noguchi , Akira Goda , Hiroyuki Nitta
发明人： Mitsuhiro Noguchi , Akira Goda , Hiroyuki Nitta
IPC分类号： G11C8/00
CPC分类号： G06F11/1008 , G06F11/108 , G11C7/22 , G11C16/04 , G11C16/0483 , G11C16/26 , G11C16/32 , G11C16/3454 , G11C29/50004 , G11C29/52 , G11C29/76 , G11C29/82 , G11C29/84 , G11C2029/0409 , H01L27/115 , H01L27/11521 , H01L27/11524
摘要： A semiconductor memory device includes: a memory cell array having a plurality of data select lines disposed in parallel with each other, a plurality of data transfer line disposed in parallel with each other to intersect the data select lines, and electrically rewritable memory cells laid out at cross portions between the data select lines and data transfer lines; a data select line driver for driving the data select lines of the memory cell array; a sense amplifier circuit connected to the data transfer lines of the memory cell array, for performing data read of memory cells selected by one of the data select lines; and a control circuit used for timing control of data read of the memory cell array, for outputting at least two types of timing signals as being different in accordance with a selected data area of the memory cell array.
摘要翻译：半导体存储器件包括：存储单元阵列，具有彼此平行布置的多个数据选择线;多个数据传输线，彼此并联设置，以与数据选择线相交;以及布置的电可重写存储器单元在数据选择线和数据传输线之间的交叉部分; 用于驱动存储单元阵列的数据选择线的数据选择线驱动器; 连接到存储单元阵列的数据传输线的读出放大器电路，用于对数据选择线之一选择的存储器单元执行数据读取; 以及用于对存储单元阵列的数据读取进行定时控制的控制电路，用于根据存储单元阵列的选定数据区输出不同的至少两种类型的定时信号。

66. 发明授权

US07352350B2 Display device 有权
标题翻译：显示设备
公开(公告)号：US07352350B2
公开(公告)日：2008-04-01
申请号：US11385828
申请日：2006-03-22
申请人： Hiroyuki Nitta , Tsutomu Furuhashi , Junichi Hirakata , Yoshinori Tanaka , Kazuyoshi Kawabe
发明人： Hiroyuki Nitta , Tsutomu Furuhashi , Junichi Hirakata , Yoshinori Tanaka , Kazuyoshi Kawabe
IPC分类号： G09G3/36
CPC分类号： G09G3/3648 , G09G3/3406 , G09G2310/0205 , G09G2310/0224 , G09G2310/0237 , G09G2310/024 , G09G2310/061 , G09G2310/08 , G09G2320/02 , G09G2320/0261 , G09G2320/10
摘要： In a hold-type display device, such as a liquid crystal display device, so-called blurring which appears on a profile of a displayed animated image can be suppressed without degrading the brightness of the image. An image based on video data to be inputted to a display device is displayed for every frame period and, thereafter, the image is masked with a blanking image. Here, the ratio between an image display period of the video data and a blanking image display period in one frame period is adjusted, based on the number of pixel rows selected in a pixel array in response to a scanning clock for respective periods, the frequency of the scanning clock, and shortening of a horizontal period of display signal inputting to every pixel row with respect to a horizontal scanning period of the video data, whereby the image can be efficiently cancelled using the blanking image.
摘要翻译：在诸如液晶显示装置的保持型显示装置中，可以抑制出现在所显示的动画图像的轮廓上的所谓模糊，而不降低图像的亮度。在每帧周期中显示基于要输入到显示装置的视频数据的图像，此后，用消隐图像掩蔽图像。这里，基于在各个周期的扫描时钟响应于像素阵列中选择的像素行的数量来调整一帧周期中的视频数据的图像显示周期和消隐图像显示周期之间的比率，频率的扫描时钟，并且相对于视频数据的水平扫描周期缩短显示信号输入到每个像素行的水平周期，由此可以使用消隐图像有效地消除图像。

67. 发明授权

US07163894B2 Semiconductor device having a wiring layer of damascene structure and method for manufacturing the same 失效
公开(公告)号：US07163894B2
公开(公告)日：2007-01-16
申请号：US10927079
申请日：2004-08-27
申请人： Hiroyuki Nitta , Yoshiaki Fukuzumi , Yusuke Kohyama
发明人： Hiroyuki Nitta , Yoshiaki Fukuzumi , Yusuke Kohyama
IPC分类号： H01L21/4763
CPC分类号： H01L21/76846 , H01L21/32134 , H01L21/7682 , H01L21/76843 , H01L21/76862 , H01L21/76865 , H01L21/76897 , H01L23/5222 , H01L23/5329 , H01L27/10814 , H01L27/10855 , H01L27/10885 , H01L2924/0002 , Y10S438/927 , H01L2924/00
摘要： In a semiconductor device, a wiring pattern groove is formed in a surface portion of a silicon oxide film provided above a semiconductor substrate. A wiring layer is buried into the wiring pattern groove with a barrier metal film interposed therebetween. The barrier metal film is selectively removed from each sidewall portion of the wiring pattern groove. In other words, the barrier metal film is left only on the bottom of the wiring pattern groove. Thus, a damascene wiring layer having a hollow section whose dielectric constant is low between each sidewall of the wiring pattern groove and each side of the wiring layer can be formed in the semiconductor device.

68. 发明授权

US07110009B2 Display control circuit and display driving circuit 有权
标题翻译：显示控制电路和显示驱动电路
公开(公告)号：US07110009B2
公开(公告)日：2006-09-19
申请号：US10845076
申请日：2004-05-14
申请人： Yoshihisa Ooishi , Hiroyuki Nitta , Junichi Maruyama , Naoki Takada , Kenichi Ono
发明人： Yoshihisa Ooishi , Hiroyuki Nitta , Junichi Maruyama , Naoki Takada , Kenichi Ono
IPC分类号： G09G5/10 , G09G3/36
CPC分类号： G09G3/3688 , G09G3/20 , G09G3/2011 , G09G3/3696 , G09G2310/027 , G09G2310/0297 , G09G2310/08 , G09G2320/0666 , G09G2320/0673 , G09G2330/028 , G09G2340/0428 , G09G2370/08
摘要： A display control circuit divides M display data for M pixels assigned to each of plural display driving circuits among display data received in an order of an arrangement of pixels in a row, into plural display data sets each composed of N display data, rearranges the plural display data sets such that one of the plural display data sets assigned to one of the plural display driving circuits is followed by one of the plural display data sets assigned to another of the plural display driving circuits succeeding the one of the plural display driving circuits, and outputs the rearranged display data sets to the plural display driving circuits.
摘要翻译：显示控制电路将分配给多个显示驱动电路中的每一个的M个像素的M个显示数据按照以行像素排列的顺序接收的显示数据分割成由N个显示数据组成的多个显示数据组，重新排列复数显示数据组，使得分配给多个显示驱动电路之一的多个显示数据组中的一个显示数据组之后是分配给多个显示驱动电路中的一个显示驱动电路之后的多个显示驱动电路中的另一个的多个显示数据组中的一个，并将重新布置的显示数据组输出到多个显示驱动电路。

69. 发明授权

US07098881B2 Liquid crystal driver circuit and LCD having fast data write capability 有权
标题翻译：液晶驱动电路和LCD具有快速的数据写入能力
公开(公告)号：US07098881B2
公开(公告)日：2006-08-29
申请号：US10687992
申请日：2003-10-20
申请人： Hiroyuki Nitta , Kazuyoshi Kawabe , Satoru Tsunekawa , Hirobumi Koshi
发明人： Hiroyuki Nitta , Kazuyoshi Kawabe , Satoru Tsunekawa , Hirobumi Koshi
IPC分类号： G09G3/36
CPC分类号： G09G3/2011 , G09G3/3614 , G09G3/3688 , G09G2310/0248 , G09G2310/027 , G09G2310/0291
摘要： A fast-write, high picture-quality LCD (Liquid Crystal Display) compatible with a high-resolution, large-sized liquid crystal panel. An output amplifier circuit of a liquid crystal driver circuit includes an amplifier configuration, which functions as an amplifier that amplifies the predetermined gray-scale voltage for output and as an amplifier that buffers the predetermined gray-scale voltage and outputs with no amplification, and a circuit for switching the above two types of amplifiers. In each horizontal period, a liquid crystal panel is driven by the amplified output for a predetermined period and by the buffered output for the rest of the period. A precharge control circuit is provided to check whether the gray-scale voltage is to be amplified depending upon display data.
摘要翻译：与高分辨率，大尺寸液晶面板兼容的快速写入，高画质液晶（液晶显示）。液晶驱动器电路的输出放大器电路包括放大器配置，其用作放大用于输出的预定灰度电压的放大器，以及用于缓冲预定灰度电压并且无放大输出的放大器，以及用于切换上述两种类型的放大器的电路。在每个水平周期中，液晶面板由放大的输出驱动预定时间段，并且通过缓冲输出在其余时间段内驱动。提供预充电控制电路以根据显示数据检查灰度电压是否被放大。

70. 发明申请

US20050024974A1 Semiconductor memory device 失效
标题翻译：半导体存储器件
公开(公告)号：US20050024974A1
公开(公告)日：2005-02-03
申请号：US10696028
申请日：2003-10-30
申请人： Mitsuhiro Noguchi , Akira Goda , Hiroyuki Nitta
发明人： Mitsuhiro Noguchi , Akira Goda , Hiroyuki Nitta
IPC分类号： G11C16/02 , G06F11/10 , G11C8/00 , G11C11/34 , G11C16/00 , G11C16/04 , G11C16/06 , G11C16/10 , G11C16/26 , G11C16/32 , G11C16/34 , G11C29/00 , G11C29/04 , G11C29/42 , G11C29/52 , H01L21/8247 , H01L27/00 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： G06F11/1008 , G06F11/108 , G11C7/22 , G11C16/04 , G11C16/0483 , G11C16/26 , G11C16/32 , G11C16/3454 , G11C29/50004 , G11C29/52 , G11C29/76 , G11C29/82 , G11C29/84 , G11C2029/0409 , H01L27/115 , H01L27/11521 , H01L27/11524
摘要： A semiconductor memory device includes: a memory cell array having a plurality of data select lines disposed in parallel with each other, a plurality of data transfer line disposed in parallel with each other to intersect the data select lines, and electrically rewritable memory cells laid out at cross portions between the data select lines and data transfer lines; a data select line driver for driving the data select lines of the memory cell array; a sense amplifier circuit connected to the data transfer lines of the memory cell array, for performing data read of memory cells selected by one of the data select lines; and a control circuit used for timing control of data read of the memory cell array, for outputting at least two types of timing signals as being different in accordance with a selected data area of the memory cell array.
摘要翻译：半导体存储器件包括：存储单元阵列，具有彼此平行布置的多个数据选择线;多个数据传输线，彼此并联设置，以与数据选择线相交;以及布置的电可重写存储器单元在数据选择线和数据传输线之间的交叉部分; 用于驱动存储单元阵列的数据选择线的数据选择线驱动器; 连接到存储单元阵列的数据传输线的读出放大器电路，用于对数据选择线之一选择的存储器单元执行数据读取; 以及用于对存储单元阵列的数据读取进行定时控制的控制电路，用于根据存储单元阵列的选定数据区输出不同的至少两种类型的定时信号。

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