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61. 发明申请

US20110260261A1 CMOS Devices having Dual High-Mobility Channels 审中-公开
标题翻译：具有双重高移动性通道的CMOS器件
公开(公告)号：US20110260261A1
公开(公告)日：2011-10-27
申请号：US13179275
申请日：2011-07-08
申请人： Ding-Yuan Chen , Chen-Hua Yu
发明人： Ding-Yuan Chen , Chen-Hua Yu
IPC分类号： H01L27/092
CPC分类号： H01L27/092 , H01L21/823807 , H01L21/823814 , H01L21/823842 , H01L21/823857 , H01L29/0649 , H01L29/0847 , H01L29/1054 , H01L29/165 , H01L29/66628 , H01L29/66636 , H01L29/7833 , H01L29/7848
摘要： A method for forming a semiconductor structure includes providing a semiconductor substrate including a first region and a second region; and forming a first and a second metal-oxide-semiconductor (MOS) device. The step of forming the first MOS device includes forming a first silicon germanium layer over the first region of the semiconductor substrate; forming a silicon layer over the first silicon germanium layer; forming a first gate dielectric layer over the silicon layer; and patterning the first gate dielectric layer to form a first gate dielectric. The step of forming the second MOS device includes forming a second silicon germanium layer over the second region of the semiconductor substrate; forming a second gate dielectric layer over the second silicon germanium layer with no substantially pure silicon layer therebetween; and patterning the second gate dielectric layer to form a second gate dielectric.
摘要翻译：一种形成半导体结构的方法包括：提供包括第一区域和第二区域的半导体衬底; 以及形成第一和第二金属氧化物半导体（MOS）器件。形成第一MOS器件的步骤包括在半导体衬底的第一区域上形成第一硅锗层; 在所述第一硅锗层上形成硅层; 在所述硅层上形成第一栅介质层; 以及图案化所述第一栅极介电层以形成第一栅极电介质。形成第二MOS器件的步骤包括在半导体衬底的第二区域上形成第二硅锗层; 在第二硅锗层上形成第二栅极电介质层，其间没有基本上纯的硅层; 以及图案化所述第二栅极介电层以形成第二栅极电介质。

62. 发明授权

US08030666B2 Group-III nitride epitaxial layer on silicon substrate 有权
标题翻译：硅衬底上的III族氮化物外延层
公开(公告)号：US08030666B2
公开(公告)日：2011-10-04
申请号：US12127607
申请日：2008-05-27
申请人： Ding-Yuan Chen , Chen-Hua Yu
发明人： Ding-Yuan Chen , Chen-Hua Yu
IPC分类号： H01L27/15 , H01L31/12 , H01L33/00
CPC分类号： H01L33/007 , H01L21/02381 , H01L21/0243 , H01L21/02433 , H01L21/0254 , H01L21/02639 , H01L33/12
摘要： A semiconductor device includes a silicon substrate; silicon faceted structures formed on a top surface of the silicon substrate; and a group-III nitride layer over the silicon faceted structures. The silicon faceted structures are separated from each other, and have a repeated pattern.
摘要翻译：半导体器件包括硅衬底; 形成在硅衬底的顶表面上的硅刻面结构; 以及在硅刻面结构上的III族氮化物层。硅分面结构彼此分离，并且具有重复的图案。

63. 发明授权

US07993998B2 CMOS devices having dual high-mobility channels 有权
标题翻译： CMOS器件具有双重高移动性通道
公开(公告)号：US07993998B2
公开(公告)日：2011-08-09
申请号：US12043588
申请日：2008-03-06
申请人： Ding-Yuan Chen , Chen-Hua Yu
发明人： Ding-Yuan Chen , Chen-Hua Yu
IPC分类号： H01L21/8238
CPC分类号： H01L27/092 , H01L21/823807 , H01L21/823814 , H01L21/823842 , H01L21/823857 , H01L29/0649 , H01L29/0847 , H01L29/1054 , H01L29/165 , H01L29/66628 , H01L29/66636 , H01L29/7833 , H01L29/7848
摘要： A method for forming a semiconductor structure includes providing a semiconductor substrate including a first region and a second region; and forming a first and a second metal-oxide-semiconductor (MOS) device. The step of forming the first MOS device includes forming a first silicon germanium layer over the first region of the semiconductor substrate; forming a silicon layer over the first silicon germanium layer; forming a first gate dielectric layer over the silicon layer; and patterning the first gate dielectric layer to form a first gate dielectric. The step of forming the second MOS device includes forming a second silicon germanium layer over the second region of the semiconductor substrate; forming a second gate dielectric layer over the second silicon germanium layer with no substantially pure silicon layer therebetween; and patterning the second gate dielectric layer to form a second gate dielectric.
摘要翻译：一种形成半导体结构的方法包括：提供包括第一区域和第二区域的半导体衬底; 以及形成第一和第二金属氧化物半导体（MOS）器件。形成第一MOS器件的步骤包括在半导体衬底的第一区域上形成第一硅锗层; 在所述第一硅锗层上形成硅层; 在所述硅层上形成第一栅介质层; 以及图案化所述第一栅极介电层以形成第一栅极电介质。形成第二MOS器件的步骤包括在半导体衬底的第二区域上形成第二硅锗层; 在第二硅锗层上形成第二栅极电介质层，其间没有基本上纯的硅层; 以及图案化所述第二栅极介电层以形成第二栅极电介质。

64. 发明授权

US07892909B2 Polysilicon gate formation by in-situ doping 有权
标题翻译：通过原位掺杂形成多晶硅栅
公开(公告)号：US07892909B2
公开(公告)日：2011-02-22
申请号：US11729009
申请日：2007-03-28
申请人： Chen-Hua Yu , Ding-Yuan Chen , Chu-Yun Fu , Liang-Gi Yao , Chen-Nan Yeh
发明人： Chen-Hua Yu , Ding-Yuan Chen , Chu-Yun Fu , Liang-Gi Yao , Chen-Nan Yeh
IPC分类号： H01L29/76
CPC分类号： H01L29/7834 , H01L21/823807 , H01L21/823814 , H01L21/823842 , H01L29/165 , H01L29/6659 , H01L29/66628 , H01L29/66636 , H01L29/7833 , H01L29/7848
摘要： A method for forming a semiconductor structure includes providing a semiconductor substrate; forming a gate dielectric layer on the semiconductor substrate; forming a first silicon-containing layer on the gate dielectric layer, wherein the first silicon-containing layer is substantially free from p-type and n-type impurities; forming a second silicon-containing layer over the first silicon-containing layer, wherein the second silicon-containing layer comprises an impurity; and performing an annealing to diffuse the impurity in the second silicon-containing layer into the first silicon-containing layer.
摘要翻译：一种形成半导体结构的方法包括提供半导体衬底; 在所述半导体衬底上形成栅介电层; 在所述栅极电介质层上形成第一含硅层，其中所述第一含硅层基本上不含p型和n型杂质; 在所述第一含硅层上形成第二含硅层，其中所述第二含硅层包含杂质; 并进行退火以将第二含硅层中的杂质扩散到第一含硅层中。

65. 发明申请

US20080303104A1 Method of Fabricating Semiconductor Device Isolation Structure 有权
标题翻译：制造半导体器件隔离结构的方法
公开(公告)号：US20080303104A1
公开(公告)日：2008-12-11
申请号：US11758043
申请日：2007-06-05
申请人： Chen-Hua Yu , Chen-Nan Yeh , Chu-Yun Fu , Ding-Yuan Chen
发明人： Chen-Hua Yu , Chen-Nan Yeh , Chu-Yun Fu , Ding-Yuan Chen
IPC分类号： H01L29/94
CPC分类号： H01L21/76202 , H01L21/26506 , H01L21/26533 , H01L21/26586 , H01L21/266 , H01L21/324 , H01L21/762 , H01L21/823481 , H01L29/0649 , H01L29/6659 , H01L29/7833
摘要： A semiconductor device including reentrant isolation structures and a method for making such a device. A preferred embodiment comprises a substrate of semiconductor material forming at least one isolation structure having a reentrant profile and isolating one or more adjacent operational components. The reentrant profile of the at least one isolation structure is formed of substrate material and is created by ion implantation, preferably using oxygen ions applied at a number of different angles and energy levels. In another embodiment the present invention is a method of forming an isolation structure for a semiconductor device performing at least one oxygen ion implantation.
摘要翻译：包括可折入隔离结构的半导体器件和用于制造这种器件的方法。优选实施例包括形成至少一个隔离结构的半导体材料的衬底，该隔离结构具有折返轮廓并且隔离一个或多个相邻的操作部件。至少一个隔离结构的折返轮廓由衬底材料形成，并且通过离子注入产生，优选地使用以多个不同角度和能级施加的氧离子。在另一个实施方案中，本发明是形成用于进行至少一个氧离子注入的半导体器件的隔离结构的方法。

66. 发明授权

US08110890B2 Method of fabricating semiconductor device isolation structure 有权
标题翻译：制造半导体器件隔离结构的方法
公开(公告)号：US08110890B2
公开(公告)日：2012-02-07
申请号：US11758043
申请日：2007-06-05
申请人： Chen-Hua Yu , Chen-Nan Yeh , Chu-Yun Fu , Ding-Yuan Chen
发明人： Chen-Hua Yu , Chen-Nan Yeh , Chu-Yun Fu , Ding-Yuan Chen
IPC分类号： H01L21/70
CPC分类号： H01L21/76202 , H01L21/26506 , H01L21/26533 , H01L21/26586 , H01L21/266 , H01L21/324 , H01L21/762 , H01L21/823481 , H01L29/0649 , H01L29/6659 , H01L29/7833
摘要： A semiconductor device including reentrant isolation structures and a method for making such a device. A preferred embodiment comprises a substrate of semiconductor material forming at least one isolation structure having a reentrant profile and isolating one or more adjacent operational components. The reentrant profile of the at least one isolation structure is formed of substrate material and is created by ion implantation, preferably using oxygen ions applied at a number of different angles and energy levels. In another embodiment the present invention is a method of forming an isolation structure for a semiconductor device performing at least one oxygen ion implantation.
摘要翻译：包括可折入隔离结构的半导体器件和用于制造这种器件的方法。优选实施例包括形成至少一个隔离结构的半导体材料的衬底，该隔离结构具有折返轮廓并且隔离一个或多个相邻的操作部件。至少一个隔离结构的折返轮廓由衬底材料形成，并且通过离子注入产生，优选地使用以多个不同角度和能级施加的氧离子。在另一个实施方案中，本发明是形成用于进行至少一个氧离子注入的半导体器件的隔离结构的方法。

67. 发明申请

US20100001375A1 Patterned Substrate for Hetero-epitaxial Growth of Group-III Nitride Film 有权
标题翻译：用于III族氮化物膜的异质外延生长的图案化基板
公开(公告)号：US20100001375A1
公开(公告)日：2010-01-07
申请号：US12166034
申请日：2008-07-01
申请人： Chen-Hua Yu , Ding-Yuan Chen
发明人： Chen-Hua Yu , Ding-Yuan Chen
IPC分类号： H01L29/04
CPC分类号： H01L27/156 , H01L31/0304 , H01L31/1035 , H01L33/007 , H01L33/20
摘要： A circuit structure includes a substrate and a film over the substrate and including a plurality of portions allocated as a plurality of rows. Each of the plurality of rows of the plurality of portions includes a plurality of convex portions and a plurality of concave portions. In each of the plurality of rows, the plurality of convex portions and the plurality of concave portions are allocated in an alternating pattern.
摘要翻译：电路结构包括衬底和衬底上的膜，并且包括分配为多行的多个部分。多个部分的多行中的每一个包括多个凸部和多个凹部。在多行中的每一行中，以交替图案分配多个凸部和多个凹部。

68. 发明申请

US20090261363A1 Group-III Nitride Epitaxial Layer on Silicon Substrate 有权
标题翻译：硅衬底上的III族氮化物外延层
公开(公告)号：US20090261363A1
公开(公告)日：2009-10-22
申请号：US12127607
申请日：2008-05-27
申请人： Ding-Yuan Chen , Chen-Hua Yu
发明人： Ding-Yuan Chen , Chen-Hua Yu
IPC分类号： H01L33/00
CPC分类号： H01L33/007 , H01L21/02381 , H01L21/0243 , H01L21/02433 , H01L21/0254 , H01L21/02639 , H01L33/12
摘要： A semiconductor device includes a silicon substrate; silicon faceted structures formed on a top surface of the silicon substrate; and a group-III nitride layer over the silicon faceted structures. The silicon faceted structures are separated from each other, and have a repeated pattern.
摘要翻译：半导体器件包括硅衬底; 形成在硅衬底的顶表面上的硅刻面结构; 以及在硅刻面结构上的III族氮化物层。硅分面结构彼此分离，并且具有重复的图案。

69. 发明申请

US20090261346A1 Integrating CMOS and Optical Devices on a Same Chip 审中-公开
标题翻译：将CMOS和光器件集成在同一芯片上
公开(公告)号：US20090261346A1
公开(公告)日：2009-10-22
申请号：US12127569
申请日：2008-05-27
申请人： Ding-Yuan Chen , Chen-Hua Yu
发明人： Ding-Yuan Chen , Chen-Hua Yu
IPC分类号： H01L27/15 , H01L33/00
CPC分类号： H01L21/8258 , H01L21/76283 , H01L27/15 , H01L29/045 , H01L29/267 , H01L29/7787
摘要： An integrated circuit structure includes a semiconductor substrate having a first surface region and a second surface region, wherein the first surface region and the second surface region have different surface orientations; a semiconductor device formed at a surface of the first surface region; and a group-III nitride layer over the second surface region, wherein the group-III nitride layer does not extend over the first surface region.
摘要翻译：集成电路结构包括具有第一表面区域和第二表面区域的半导体衬底，其中第一表面区域和第二表面区域具有不同的表面取向; 形成在所述第一表面区域的表面的半导体器件; 以及在所述第二表面区域上的III族氮化物层，其中所述III族氮化物层不在所述第一表面区域上延伸。

70. 发明申请

US20080194087A1 Polysilicon gate formation by in-situ doping 有权
公开(公告)号：US20080194087A1
公开(公告)日：2008-08-14
申请号：US11729009
申请日：2007-03-28
申请人： Chen-Hua Yu , Ding-Yuan Chen , Chu-Yun Fu , Liang-Gi Yao , Chen-Nan Yeh
发明人： Chen-Hua Yu , Ding-Yuan Chen , Chu-Yun Fu , Liang-Gi Yao , Chen-Nan Yeh
IPC分类号： H01L21/3205 , H01L21/22 , H01L21/38
CPC分类号： H01L29/7834 , H01L21/823807 , H01L21/823814 , H01L21/823842 , H01L29/165 , H01L29/6659 , H01L29/66628 , H01L29/66636 , H01L29/7833 , H01L29/7848
摘要： A method for forming a semiconductor structure includes providing a semiconductor substrate; forming a gate dielectric layer on the semiconductor substrate; forming a first silicon-containing layer on the gate dielectric layer, wherein the first silicon-containing layer is substantially free from p-type and n-type impurities; forming a second silicon-containing layer over the first silicon-containing layer, wherein the second silicon-containing layer comprises an impurity; and performing an annealing to diffuse the impurity in the second silicon-containing layer into the first silicon-containing layer.

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