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61. 发明授权

US11287573B1 Heterogeneously integrated photonic devices with improved optical coupling between waveguides 有权
公开(公告)号：US11287573B1
公开(公告)日：2022-03-29
申请号：US17078859
申请日：2020-10-23
申请人： Chong Zhang , Hyun Dai Park , Minh Tran , Tin Komljenovic
发明人： Chong Zhang , Hyun Dai Park , Minh Tran , Tin Komljenovic
IPC分类号： G02B6/122 , G02B6/14 , G02B6/13 , G02B6/12 , G02B6/132
摘要： An optical device comprises first, second and third elements fabricated on a common substrate. The first element comprises an active waveguide structure supporting a first optical mode, the second element, fabricated on a planarized top surface of the first element, comprises a passive waveguide structure supporting a second optical mode, and the third element, at least partly butt-coupled to the first element, comprises an intermediate waveguide structure, positioned such that a top surface of the intermediate structure underlies a bottom surface of the passive waveguide structure. If the first optical mode differs from the second optical mode by more than a predetermined amount, a tapered waveguide structure in at least one of the second and third elements facilitates efficient adiabatic transformation between the first optical mode and the second optical mode. Mutual alignments of the first, second and third elements are defined using lithographic alignment marks.

62. 发明申请

US20210088727A1 ACTIVE-PASSIVE PHOTONIC INTEGRATED CIRCUIT PLATFORM 有权
公开(公告)号：US20210088727A1
公开(公告)日：2021-03-25
申请号：US16600349
申请日：2019-10-11
申请人： Hyundai Park , Tin Komljenovic , Chong Zhang , Minh Tran
发明人： Hyundai Park , Tin Komljenovic , Chong Zhang , Minh Tran
IPC分类号： G02B6/14 , G02B6/122 , G02B6/12 , G02B6/13
摘要： A device providing efficient transformation between an initial optical mode and a second optical mode includes first, second and third elements fabricated on a common substrate. The first element includes first and second active sub-layers supporting initial and final optical modes with efficient mode transformation therebetween. The second element includes a passive waveguide structure supporting a second optical mode. The third element, at least partly butt-coupled to the first element, includes an intermediate waveguide structure supporting an intermediate optical mode. If the final optical mode differs from the second optical mode by more than a predetermined amount, a tapered waveguide structure in the second or third elements facilitates efficient transformation between the intermediate optical mode and the second optical mode. Precise alignment of sub-elements formed in one of the elements, relative to sub-elements formed in another one of the elements, is defined using lithographic alignment marks.

63. 发明申请

US20160316957A1 Apparatus and Method for making cold brewed beverage from unfiltered water 审中-公开
标题翻译：从未过滤的水制造冷酿造饮料的装置和方法
公开(公告)号：US20160316957A1
公开(公告)日：2016-11-03
申请号：US14699487
申请日：2015-04-29
申请人： Minh Tran
发明人： Minh Tran
IPC分类号： A47J31/00 , A47J31/60 , A23F3/18 , A23F5/26 , C02F1/00 , C02F1/28
CPC分类号： A47J31/005 , A23F3/18 , A23F5/26 , A47J31/605 , C02F1/002 , C02F1/003 , C02F1/283 , C02F2307/02 , C02F2307/04
摘要： The invention is aimed at providing a method and apparatus to prepare cold brewed beverage from contaminated water. This invention is very useful for people engaged in outdoor activities like hiking, camping or backpacking who find it extremely difficult to either find a supply of potable water or carry pre-packaged beverages. This invention provides for simple means to prepare cold brewed beverage from any source of water “on the go”.
摘要翻译：本发明旨在提供一种从污染水中制备冷酿造饮料的方法和装置。本发明对于从事诸如远足，露营或背包等户外活动的人来说非常有用，发现要找到饮用水或携带预包装饮料是非常困难的。本发明提供了从“任何地方”的任何水源制备冷酿造饮料的简单方法。

64. 发明申请

US20130261189A1 POLYVINYLPYRROLIDONE-CONTAINING ACETAMINOPHEN LIQUID FORMULATIONS 有权
标题翻译：含聚乙烯吡咯烷酮的乙酰胺液体配方
公开(公告)号：US20130261189A1
公开(公告)日：2013-10-03
申请号：US13434267
申请日：2012-03-29
申请人： Abdul Rashid , Zhang Julia Zhang , Minh Tran , Dahai Guo
发明人： Abdul Rashid , Zhang Julia Zhang , Minh Tran , Dahai Guo
IPC分类号： A61K31/167 , A61P29/00 , A61P25/00
CPC分类号： A61K31/167 , A61K9/08 , A61K47/10 , A61K47/32
摘要： A pharmaceutical formulation contains 10-60% by weight acetaminophen as the only active ingredient and a solvent system for dissolving the acetaminophen. The formulation is free of any ionizing agent and its solvent system includes water, polyethylene glycol, and polyvinylpyrrolidone that is 2-50% by weight and has a molecular weight of 2,000 to 1,500,000. Also disclosed is another acetaminophen formulation containing polyvinylpyrrolidone as high as 25-50% by weight.
摘要翻译：药物制剂含有10-60重量％的对乙酰氨基酚作为唯一活性成分和溶解对乙酰氨基酚的溶剂体系。制剂不含任何电离剂，其溶剂体系包括2-50重量％的水，聚乙二醇和聚乙烯吡咯烷酮，分子量为2,000至1,500,000。还公开了含有高达25-50重量％的聚乙烯吡咯烷酮的另一对乙酰氨基酚制剂。

65. 发明授权

US08415256B1 Gap-filling with uniform properties 有权
标题翻译：间隙填充均匀性
公开(公告)号：US08415256B1
公开(公告)日：2013-04-09
申请号：US12982364
申请日：2010-12-30
申请人： Alexander Nickel , Lu You , Hirokazu Tokuno , Minh Tran , Minh Van Ngo , Hieu Pham , Erik Wilson , Robert Huertas
发明人： Alexander Nickel , Lu You , Hirokazu Tokuno , Minh Tran , Minh Van Ngo , Hieu Pham , Erik Wilson , Robert Huertas
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/022 , H01L21/02348 , H01L21/76224 , H01L21/76828 , H01L21/76829 , H01L21/76837
摘要： During semiconductor fabrication homogeneous gap-filling is achieved by depositing a thin dielectric layer into the gap, post deposition curing, and then repeating deposition and post deposition curing until gap-filling is completed. Embodiments include depositing a layer of low deposition temperature gap-fill dielectric into a high aspect ratio opening, such as a shallow trench or a gap between closely spaced apart gate electrode structures, as at a thickness of about 10 Å to about 500 Å, curing after deposition, as by UV radiation or by heating at a temperature of about 400° C. to about 1000° C., depositing another layer of low deposition temperature gap-filled dielectric, and curing after deposition. Embodiments include separately depositing and separately curing multiple layers.
摘要翻译：在半导体制造期间，通过将薄介电层沉积到间隙中，后沉积固化，然后重复沉积和后沉积固化直到间隙填充完成来实现均匀间隙填充。实施例包括将低沉积温度间隙填充电介质的层沉积到高纵横比开口中，例如浅沟槽或紧密间隔开的栅电极结构之间的间隙，其厚度约为至约500，固化在沉积之后，如通过UV辐射或在约400℃至约1000℃的温度下加热，沉积另一层低沉积温度充满间隙的电介质，并在沉积后固化。实施例包括分别沉积和分别固化多层。

66. 发明授权

US08217684B2 Fast and accurate current driver with zero standby current and features for boost and temperature compensation for MRAM write circuit 有权
标题翻译：具有零待机电流的快速准确的电流驱动器和用于MRAM写电路的升压和温度补偿功能
公开(公告)号：US08217684B2
公开(公告)日：2012-07-10
申请号：US12925004
申请日：2010-10-12
申请人： Perng-Fei Yuh , Pokang Wang , Lejan Pu , Minh Tran , Chao-Hung Chang
发明人： Perng-Fei Yuh , Pokang Wang , Lejan Pu , Minh Tran , Chao-Hung Chang
IPC分类号： H03B1/00
CPC分类号： G05F3/26 , G11C11/16 , G11C29/021 , G11C29/028
摘要： Systems and methods for realizing current drivers without current or voltage feedback for devices that require accurate current drive with zero standby current has been disclosed. In a preferred embodiment of the invention this current driver is applied for write circuits for MRAMs. A fast and accurate reference current is generated by diode voltage divided by resistor without any feedback. The diode current is not fed back from the reference current. The diode current is generated from a regulated voltage. Temperature compensation of the write current is inherently built in the diode current reference. Fine-tuning of the temperature coefficient is achieved by mixing poly and diffusion resistors. A switch inserted in the current driver can turn on the driver fast and without a need for standby current. Leading boost in the current driver can fast charge the large coupling capacitance of word and bit lines and speed up write timing.
摘要翻译：已经公开了用于实现没有电流或电压反馈的电流驱动器的系统和方法，用于需要具有零待机电流的精确电流驱动的装置。在本发明的优选实施例中，该电流驱动器被应用于MRAM的写入电路。通过二极管电压除以电阻而没有任何反馈产生快速准确的参考电流。二极管电流不从参考电流反馈。二极管电流由调节电压产生。写入电流的温度补偿固有地内置在二极管电流参考中。通过混合多聚电阻和扩散电阻来实现温度系数的微调。插入当前驱动程序的开关可快速打开驱动器，无需待机电流。当前驱动器的领先提升可以快速充电字和位线的大耦合电容，并加快写时序。

67. 发明授权

US07884030B1 Gap-filling with uniform properties 有权
标题翻译：间隙填充均匀性
公开(公告)号：US07884030B1
公开(公告)日：2011-02-08
申请号：US11408086
申请日：2006-04-21
申请人： Alexander Nickel , Lu You , Hirokazu Tokuno , Minh Tran , Minh Van Ngo , Hieu Pham , Erik Wilson , Robert Huertas
发明人： Alexander Nickel , Lu You , Hirokazu Tokuno , Minh Tran , Minh Van Ngo , Hieu Pham , Erik Wilson , Robert Huertas
IPC分类号： H01L21/31 , H01L21/469 , H01L23/58
CPC分类号： H01L21/022 , H01L21/02348 , H01L21/76224 , H01L21/76828 , H01L21/76829 , H01L21/76837
摘要： During semiconductor fabrication homogeneous gap-filling is achieved by depositing a thin dielectric layer into the gap, post deposition curing, and then repeating deposition and post deposition curing until gap-filling is completed. Embodiments include depositing a layer of low deposition temperature gap-fill dielectric into a high aspect ratio opening, such as a shallow trench or a gap between closely spaced apart gate electrode structures, as at a thickness of about 10 Å to about 500 Å, curing after deposition, as by UV radiation or by heating at a temperature of about 400° C. to about 1000° C., depositing another layer of low deposition temperature gap-filled dielectric, and curing after deposition. Embodiments include separately depositing and separately curing multiple layers.
摘要翻译：在半导体制造期间，通过将薄介电层沉积到间隙中，后沉积固化，然后重复沉积和后沉积固化直到间隙填充完成来实现均匀间隙填充。实施例包括将低沉积温度间隙填充电介质的层沉积到高纵横比开口中，例如浅沟槽或紧密间隔开的栅电极结构之间的间隙，其厚度约为至约500，固化在沉积之后，如通过UV辐射或在约400℃至约1000℃的温度下加热，沉积另一层低沉积温度充满间隙的电介质，并在沉积后固化。实施例包括分别沉积和分别固化多层。

68. 发明申请

US20100277293A1 Capacitor Coupled Ethernet 有权
标题翻译：电容耦合以太网
公开(公告)号：US20100277293A1
公开(公告)日：2010-11-04
申请号：US12433080
申请日：2009-04-30
申请人： James Yu , Minh Tran
发明人： James Yu , Minh Tran
IPC分类号： G05B11/01
CPC分类号： H04L12/10
摘要： A system and method for enabling power applications over a single conductor pair. In one embodiment, data transformers are coupled to a single conductor pair using one or more direct current (DC) blocking elements that preserve an alternating current path. Power is injected onto the single conductor pair after the DC blocking elements and power is extracted from the single conductor pair before the DC blocking elements. Saturation of the data transformers by the injection of power onto the single pair is thereby prevented.
摘要翻译：一种用于在单个导体对上实现电力应用的系统和方法。在一个实施例中，使用保持交流路径的一个或多个直流（DC）阻塞元件将数据变压器耦合到单个导体对。在直流阻塞元件之后，在直流阻塞元件之前从单个导体对提取功率，在单个导体对上注入功率。从而防止了通过将电力注入到单对上的数据变压器的饱和度。

69. 发明授权

US07682374B2 Knotless suture lock and bone anchor implant method 有权
标题翻译：无缝缝合锁和骨锚植入法
公开(公告)号：US07682374B2
公开(公告)日：2010-03-23
申请号：US11375691
申请日：2006-03-13
申请人： Seth Foerster , Norman Gordon , Francis Vijay , Minh Tran
发明人： Seth Foerster , Norman Gordon , Francis Vijay , Minh Tran
IPC分类号： A61B17/04
CPC分类号： A61B17/0401 , A61B17/0487 , A61B2017/0409 , A61B2017/0412 , A61B2017/0414 , A61B2017/0417 , A61B2017/042 , A61B2017/0422 , A61B2017/0427 , A61B2017/0458 , A61B2017/0496
摘要： A knotless suture lock and bone anchor wherein a suture, looped through a tissue, is threaded through a plurality of body holes in the anchor to cinch the suture and tissue to the anchor without tying a suture knot on the tissue, and wherein the anchor is adapted for embedding in a bone. The tissue is secured to the anchor by suturing the tissue without a suture knot, fastening the standing leg portion of the suture on a suture leg-anchoring structure, and threading the working leg portion of the suture through the body holes. Pulling on the working leg portion of the suture tightens the suture on the body structure and cinches the loop without a suture knot on the tissue. The bone-embedding structure comprises a plurality of barbs adapted to resist pullout of the anchor from the bone.
摘要翻译：无缝缝合锁和骨锚，其中通过组织环绕的缝合线穿过锚固体中的多个体孔，以将缝合线和组织紧固到锚固件上，而不将缝合线结在组织上，并且其中锚适于嵌入骨骼。通过缝合组织而不用缝合线将组织固定到锚固件，将缝合线的站立腿部部分紧固在缝合线腿锚定结构上，以及通过身体孔穿过缝合线的工作腿部。拉动缝合线的工作腿部，将身体结构上的缝合线收紧，并且在组织上没有缝合线。骨嵌入结构包括适于防止锚固体从骨头拔出的多个倒钩。

70. 发明授权

US07199416B1 Systems and methods for a memory and/or selection element formed within a recess in a metal line 有权
标题翻译：用于存储和/或选择元件的系统和方法，其形成在金属线中的凹槽内
公开(公告)号：US07199416B1
公开(公告)日：2007-04-03
申请号：US10985172
申请日：2004-11-10
申请人： Nicholas H. Tripsas , Minh Tran , Jeffrey Shields
发明人： Nicholas H. Tripsas , Minh Tran , Jeffrey Shields
IPC分类号： H01L27/108 , H01L23/58
CPC分类号： H01L27/1021 , H01L2924/0002 , H01L2924/00
摘要： The subject invention provides systems and methodologies for fabrication of memory and/or selection (e.g., diodes) elements in a recession in a semiconductor layer. In particular, a trench of varying width is created in the semiconductor layer by employing various etching techniques. A metal film can be deposited in the trench according to a desired deposition thickness in order to seam close a narrow portion of the trench while form a dimple in a wide portion of the trench. The trench, after metal film deposition, exhibits a depression in wider trench portions relative to narrow trench portions. The depression can be utilized by placing one or more memory or selection layers in the depression, and a via can be formed over a portion of the trench to form an interconnect.
摘要翻译：本发明提供了用于制造半导体层中的凹陷中的存储器和/或选择（例如，二极管）元件的系统和方法。特别地，通过采用各种蚀刻技术在半导体层中产生不同宽度的沟槽。可以根据期望的沉积厚度在沟槽中沉积金属膜，以便在沟槽的宽部分形成凹坑的同时缝合沟槽的窄部分。在金属膜沉积之后，沟槽相对于窄沟槽部分在较宽的沟槽部分中呈凹陷。可以通过将一个或多个存储器或选择层放置在凹陷中来利用凹陷，并且可以在沟槽的一部分上形成通孔以形成互连。

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