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61. 发明申请

US20070288116A1 METHOD, SYSTEM AND MEDIUM FOR CONTROLLING SEMICONDUCTOR WAFER PROCESSES USING CRITICAL DIMENSION MEASUREMENTS 审中-公开
标题翻译：用于使用关键尺寸测量来控制半导体波长处理的方法，系统和介质
公开(公告)号：US20070288116A1
公开(公告)日：2007-12-13
申请号：US11736350
申请日：2007-04-17
申请人： Amir Al-Bayati , Babak Adibi , Majeed Foad , Sasson Somekh
发明人： Amir Al-Bayati , Babak Adibi , Majeed Foad , Sasson Somekh
IPC分类号： G06F19/00
CPC分类号： H01L21/67253 , H01L22/20
摘要： Methods, systems, and mediums of controlling a semiconductor manufacturing process are described. The method comprises the steps of measuring at least one critical dimension of at least one device being fabricated on at least one of the plurality of wafers, determining at least one process parameter value on the at least one measured dimension, and controlling at least one semiconductor manufacturing tool to process the at least one of the plurality of wafers based on the at least one parameter value. A variation in the at least one critical dimension causes undesirable variations in performance of the at least one device, and at least one process condition is directed to controlling the processing performed on the plurality of wafers. The at least one manufacturing tool includes at least one of an implanter tool and an annealing tool.
摘要翻译：描述了控制半导体制造工艺的方法，系统和介质。该方法包括以下步骤：测量在至少一个晶片上制造的至少一个器件的至少一个临界尺寸，确定至少一个测量尺寸上的至少一个工艺参数值，以及控制至少一个半导体基于所述至少一个参数值来处理所述多个晶片中的所述至少一个的制造工具。所述至少一个关键尺寸的变化导致所述至少一个装置的性能的不期望的变化，并且至少一个处理条件涉及控制在所述多个晶片上执行的处理。所述至少一个制造工具包括注入机工具和退火工具中的至少一个。

62. 发明授权

US07303982B2 Plasma immersion ion implantation process using an inductively coupled plasma source having low dissociation and low minimum plasma voltage 有权
标题翻译：使用具有低解离和低最小等离子体电压的电感耦合等离子体源的等离子体浸没离子注入工艺
公开(公告)号：US07303982B2
公开(公告)日：2007-12-04
申请号：US10646467
申请日：2003-08-22
申请人： Kenneth S. Collins , Hiroji Hanawa , Kartik Ramaswamy , Andrew Nguyen , Amir Al-Bayati , Biagio Gallo , Gonzalo Antonio Monroy
发明人： Kenneth S. Collins , Hiroji Hanawa , Kartik Ramaswamy , Andrew Nguyen , Amir Al-Bayati , Biagio Gallo , Gonzalo Antonio Monroy
IPC分类号： H01L21/42 , H01L21/425
CPC分类号： H01J37/321 , H01J37/32082
摘要： A method for implanting ions in a surface layer of a workpiece includes placing the workpiece on a workpiece support in a chamber with the surface layer being in facing relationship with a ceiling of the chamber, thereby defining a processing zone between the workpiece and the ceiling, and introducing into the chamber a process gas which includes the species to be implanted in the surface layer of the workpiece. The method further includes generating from the process gas a plasma by inductively coupling RF source power into the processing zone from an RF source power generator through an inductively coupled RF power applicator, and applying an RF bias from an RF bias generator to the workpiece support.
摘要翻译：用于将离子注入工件的表面层的方法包括将工件放置在腔室中的工件支撑件上，其中表面层与腔室的天花板处于面对关系，从而在工件和天花板之间限定处理区域，以及将包括要植入工件的表面层中的物质的工艺气体引入该室中。该方法还包括通过将RF源功率从RF源功率发生器通过感应耦合RF功率施加器感应耦合到处理区域中，并且将来自RF偏置发生器的RF偏压施加到工件支架，从而从处理气体产生等离子体。

63. 发明申请

US20070032004A1 Copper barrier reflow process employing high speed optical annealing 失效
公开(公告)号：US20070032004A1
公开(公告)日：2007-02-08
申请号：US11199570
申请日：2005-08-08
申请人： Kartik Ramaswamy , Hiroji Hanawa , Biagio Gallo , Kenneth Collins , Kai Ma , Vijay Parihar , Dean Jennings , Abhilash Mayur , Amir Al-Bayati , Andrew Nguyen
发明人： Kartik Ramaswamy , Hiroji Hanawa , Biagio Gallo , Kenneth Collins , Kai Ma , Vijay Parihar , Dean Jennings , Abhilash Mayur , Amir Al-Bayati , Andrew Nguyen
IPC分类号： H01L21/8234
CPC分类号： H01L21/76877 , H01L21/76843 , H01L21/76864 , H01L21/76873
摘要： A method of forming a barrier layer for a thin film structure on a semiconductor substrate includes forming high aspect ratio openings in a base layer having vertical side walls, depositing a dielectric barrier layer comprising a dielectric compound of a barrier metal on the surfaces of the high aspect ratio openings including the vertical side walls and depositing a metal barrier layer comprising the barrier metal on the first barrier layer. The method further includes reflowing the metal barrier layer by (a) directing light from an array of continuous wave lasers into a line of light extending at least partially across the thin film structure, and (b) translating the line of light relative to the thin film structure in a direction transverse to the line of light.

64. 发明申请

US20060264060A1 Low temperature plasma deposition process for carbon layer deposition 失效
标题翻译：用于碳层沉积的低温等离子体沉积工艺
公开(公告)号：US20060264060A1
公开(公告)日：2006-11-23
申请号：US11131941
申请日：2005-05-17
申请人： Kartik Ramaswamy , Hiroji Hanawa , Biagio Gallo , Kenneth Collins , Kai Ma , Vijay Parihar , Dean Jennings , Abhilash Mayur , Amir Al-Bayati , Andrew Nguyen
发明人： Kartik Ramaswamy , Hiroji Hanawa , Biagio Gallo , Kenneth Collins , Kai Ma , Vijay Parihar , Dean Jennings , Abhilash Mayur , Amir Al-Bayati , Andrew Nguyen
IPC分类号： H01L21/31
CPC分类号： C23C16/26 , C23C16/505 , C23C16/52 , H01L21/268 , H01L21/3146
摘要： A method of depositing a carbon layer on a workpiece includes placing the workpiece in a reactor chamber, introducing a carbon-containing process gas into the chamber, generating a reentrant toroidal RF plasma current in a reentrant path that includes a process zone overlying the workpiece by coupling plasma RF source power to an external portion of the reentrant path, and coupling RF plasma bias power or bias voltage to the workpiece.
摘要翻译：在工件上沉积碳层的方法包括将工件放置在反应器室中，将含碳工艺气体引入室中，在可重入路径中产生可重入环形RF等离子体电流，该等离子体电流包括通过将等离子体RF源功率耦合到可折入路径的外部部分，以及将RF等离子体偏置功率或偏置电压耦合到工件。

65. 发明申请

US20060260545A1 Low temperature absorption layer deposition and high speed optical annealing system 审中-公开
标题翻译：低温吸收层沉积和高速光学退火系统
公开(公告)号：US20060260545A1
公开(公告)日：2006-11-23
申请号：US11131900
申请日：2005-05-17
申请人： Kartik Ramaswamy , Hiroji Hanawa , Biagio Gallo , Kenneth Collins , Kai Ma , Vijay Parihar , Dean Jennings , Abhilash Mayur , Amir Al-Bayati , Andrew Nguyen
发明人： Kartik Ramaswamy , Hiroji Hanawa , Biagio Gallo , Kenneth Collins , Kai Ma , Vijay Parihar , Dean Jennings , Abhilash Mayur , Amir Al-Bayati , Andrew Nguyen
IPC分类号： C23F1/00 , H01L21/306 , C23C16/00
CPC分类号： C23C16/507 , C23C16/26 , C23C16/56 , H01J37/32082 , H01L21/3146 , H01L21/67115 , H01L21/67207
摘要： An integrated system for processing a semiconductor wafer includes a toroidal source plasma reactor for depositing a heat absorbing layer, the reactor including a wafer support, a reactor chamber, an external reentrant toroidal conduit coupled to said chamber on generally opposing sides thereof, an RF source power applicator for coupling power to a section of said external reentrant conduit and a process gas source containing a heat absorbing material precursor gas. The integrated system further includes an optical annealing chamber.
摘要翻译：一种用于处理半导体晶片的集成系统包括用于沉积吸热层的环形源等离子体反应器，所述反应器包括晶片支架，反应室，与其大致相对的侧面上的所述室耦合的外部折入环形导管，RF源用于将功率耦合到所述外部折返导管的一部分的电源施加器和包含吸热材料前体气体的处理气体源。集成系统还包括光学退火室。

66. 发明申请

US20060238953A1 Electrostatic chuck with smart lift-pin mechanism for a plasma reactor 有权
标题翻译：用于等离子体反应器的具有智能举升机构的静电卡盘
公开(公告)号：US20060238953A1
公开(公告)日：2006-10-26
申请号：US11115951
申请日：2005-04-26
申请人： Hiroji Hanawa , Andrew Nguyen , Kenneth Collins , Kartik Ramaswamy , Biagio Gallo , Amir Al-Bayati
发明人： Hiroji Hanawa , Andrew Nguyen , Kenneth Collins , Kartik Ramaswamy , Biagio Gallo , Amir Al-Bayati
IPC分类号： H01T23/00
CPC分类号： H01L21/68742 , H01L21/6831
摘要： A lift pin assembly for use in a reactor for processing a workpiece includes plural lift pins extending generally parallel with a lift direction, each of the plural lift pins having a top end for supporting a workpiece and a bottom end. A lift table faces the bottom ends of the pins and is translatable in a direction generally parallel with the lift direction. A small force detector senses a force exerted by the lift pins that is sufficiently large to indicate a chucked wafer and sufficiently small to avoid dechucking a wafer A large force detector senses a force exerted by the lift pins in a range sufficient to de-chuck the wafer.
摘要翻译：用于处理工件的反应器中的提升销组件包括大体平行于提升方向延伸的多个提升销，多个提升销中的每一个具有用于支撑工件的顶端和底端。升降台面向销的底端，并可在与升降方向大致平行的方向上平移。小力检测器感测由提升销施加的力足够大以指示夹紧晶片并且足够小以避免剥离晶片。大力检测器感测由提升销施加的力在足以脱扣的范围内晶圆。

67. 发明申请

US20050214477A1 Chemical vapor deposition plasma process using an ion shower grid 有权
标题翻译：使用离子淋浴网格的化学气相沉积等离子体工艺
公开(公告)号：US20050214477A1
公开(公告)日：2005-09-29
申请号：US10873485
申请日：2004-06-22
申请人： Hiroji Hanawa , Tsutomu Tanaka , Kenneth Collins , Amir Al-Bayati , Kartik Ramaswamy , Andrew Nguyen
发明人： Hiroji Hanawa , Tsutomu Tanaka , Kenneth Collins , Amir Al-Bayati , Kartik Ramaswamy , Andrew Nguyen
IPC分类号： C23C16/00 , C23C16/40 , C23C16/452 , C23C16/517
CPC分类号： C23C16/452 , C23C16/402 , C23C16/517
摘要： A chemical vapor deposition process is carried out in a reactor chamber with an ion shower grid that divides the chamber into an upper ion generation region and a lower process region, the ion shower grid having plural orifices oriented in a non-parallel direction relative to a surface plane of the ion shower grid. A workpiece is placed in the process region facing the ion shower grid, the workpiece having a workpiece surface generally facing the surface plane of the ion shower grid. A gas mixture is furnished comprising deposition precursor species into the ion generation region and the process region is evacuated at an evacuation rate sufficient to create a pressure drop across the ion shower grid from the ion generation region to the process region whereby the pressure in the ion generation region is at least several times the pressure in the process region. A layer of material of a desired thickness is deposited on the workpiece by: (a) applying plasma source power to generate a plasma of the deposition precursor species in the ion generation region, and (b) applying a grid potential to the ion shower grid to create a flux of ions from the plasma through the grid and into the process region.
摘要翻译：在具有离子喷淋网格的反应室中进行化学气相沉积工艺，该离子喷淋网格将室分成上部离子产生区域和下部工艺区域，离子喷淋格栅具有相对于一个非平行方向取向的多个孔口离子淋浴网格的表面。工件放置在面向离子喷淋格栅的工艺区域中，工件具有大致面向离子喷淋栅格的表面的工件表面。配备气体混合物，其包括沉积前体物质进入离子产生区域，并且处理区域以足以在从离子产生区域到过程区域的离子喷淋网格上产生压降的抽空速率抽真空，由此离子中的压力发生区域至少是过程区域压力的几倍。通过以下步骤沉积所需厚度的一层材料：（a）施加等离子体源功率以在离子产生区域中产生沉积前体物质的等离子体，和（b）将栅格电位施加到离子喷淋栅格以从等离子体中产生离子通过网格并进入过程区域。

68. 发明授权

US06893907B2 Fabrication of silicon-on-insulator structure using plasma immersion ion implantation 失效
标题翻译：使用等离子体浸没离子注入制造绝缘体上硅结构
公开(公告)号：US06893907B2
公开(公告)日：2005-05-17
申请号：US10786410
申请日：2004-02-24
申请人： Dan Maydan , Randir P. S. Thakur , Kenneth S. Collins , Amir Al-Bayati , Hiroji Hanawa , Kartik Ramaswamy , Biagio Gallo , Andrew Nguyen
发明人： Dan Maydan , Randir P. S. Thakur , Kenneth S. Collins , Amir Al-Bayati , Hiroji Hanawa , Kartik Ramaswamy , Biagio Gallo , Andrew Nguyen
IPC分类号： H01J37/32 , H01L21/00
CPC分类号： H01J37/321 , H01J2237/0825 , Y10S438/977
摘要： A method of fabricating a silicon-on-insulator structure having a silicon surface layer in a semiconductor workpiece, is carried out by maintaining the workpiece at an elevated temperature and producing an oxygen-containing plasma in the chamber while applying a bias to the workpiece and setting the bias to a level corresponding to an implant depth in the workpiece below the silicon surface layer to which oxygen atoms are to be implanted, whereby to form an oxygen-implanted layer in the workpiece having an oxygen concentration distribution generally centered at the implant depth and having a finite oxygen concentration in the silicon surface layer. The oxygen concentration in the silicon surface layer is then reduced to permit epitaxial silicon deposition.
摘要翻译：在半导体工件中制造具有硅表面层的绝缘体上硅结构的方法通过将工件保持在升高的温度下并在室中产生含氧等离子体，同时向工件施加偏压，将所述偏压设置为与待注入氧原子的硅表面层下方的所述工件中的植入深度相对应的水平，由此在所述工件中形成氧注入层，所述氧注入层通常以注入深度为中心并且在硅表面层中具有有限的氧浓度。然后减小硅表面层中的氧浓度以允许外延硅沉积。

69. 发明申请

US20050051272A1 Plasma immersion ion implantation process using an inductively coupled plasma source having low dissociation and low minimum plasma voltage 有权
标题翻译：使用具有低解离和低最小等离子体电压的电感耦合等离子体源的等离子体浸没离子注入工艺
公开(公告)号：US20050051272A1
公开(公告)日：2005-03-10
申请号：US10646467
申请日：2003-08-22
申请人： Kenneth Collins , Hiroji Hanawa , Kartik Ramaswamy , Andrew Nguyen , Amir Al-Bayati , Biagio Gallo , Gonzalo Monroy
发明人： Kenneth Collins , Hiroji Hanawa , Kartik Ramaswamy , Andrew Nguyen , Amir Al-Bayati , Biagio Gallo , Gonzalo Monroy
IPC分类号： H01J37/32 , C23F1/00
CPC分类号： H01J37/321 , H01J37/32082
摘要： A method for implanting ions in a surface layer of a workpiece includes placing the workpiece on a workpiece support in a chamber with the surface layer being in facing relationship with a ceiling of the chamber, thereby defining a processing zone between the workpiece and the ceiling, and introducing into the chamber a process gas which includes the species to be implanted in the surface layer of the workpiece. The method further includes generating from the process gas a plasma by inductively coupling RF source power into the processing zone from an RF source power generator through an inductively coupled RF power applicator, and applying an RF bias from an RF bias generator to the workpiece support.
摘要翻译：用于将离子注入工件的表面层的方法包括将工件放置在腔室中的工件支撑件上，其中表面层与腔室的天花板处于面对关系，从而在工件和天花板之间限定处理区域，以及将包括要植入工件的表面层中的物质的工艺气体引入该室中。该方法还包括通过将RF源功率从RF源功率发生器通过感应耦合RF功率施加器感应耦合到处理区域中，并且将来自RF偏置发生器的RF偏压施加到工件支架，从而从处理气体产生等离子体。

70. 发明授权

US08900405B2 Plasma immersion ion implantation reactor with extended cathode process ring 有权
标题翻译：具有扩展阴极工艺环的等离子体浸没离子注入反应器
公开(公告)号：US08900405B2
公开(公告)日：2014-12-02
申请号：US11985579
申请日：2007-11-14
申请人： Peter I. Porshnev , Majeed A. Foad , Kartik Ramaswamy , Biagio Gallo , Hiroji Hanawa , Andrew Nguyen , Kenneth S. Collins , Amir Al-Bayati
发明人： Peter I. Porshnev , Majeed A. Foad , Kartik Ramaswamy , Biagio Gallo , Hiroji Hanawa , Andrew Nguyen , Kenneth S. Collins , Amir Al-Bayati
IPC分类号： C23C16/00 , H01L21/306 , H01J37/32
CPC分类号： H01J37/32642 , H01J37/32412
摘要： The disclosure concerns a process ring for the wafer support pedestal of a toroidal source plasma immersion ion implantation reactor. The process ring improves edge uniformity by providing a continuous surface extending beyond the wafer edge, in one embodiment. In another embodiment, the process ring includes a floating electrode that functions as an extension of the wafer support electrode by RF coupling at the bias frequency.
摘要翻译：本公开涉及用于环形源等离子体浸入式离子注入反应器的晶片支撑基座的工艺环。在一个实施例中，处理环通过提供延伸超过晶片边缘的连续表面来提高边缘均匀性。在另一个实施例中，处理环包括浮动电极，其通过在偏置频率下的RF耦合用作晶片支撑电极的延伸。

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