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    • 61. 发明授权
    • Reduction of charge leakage from a thyristor-based memory cell
    • 减少基于晶闸管的存储单元的电荷泄漏
    • US07786505B1
    • 2010-08-31
    • US11303237
    • 2005-12-16
    • Kevin J. YangHyun-Jin Cho
    • Kevin J. YangHyun-Jin Cho
    • H01L29/74
    • H01L29/7436H01L27/1027H01L29/66393
    • Formation of a thyristor-based memory cell is described. A first gate dielectric of the storage element is formed over a base region thereof located in a silicon layer. A transistor is coupled to the storage element via a cathode region located in the silicon layer. The transistor has a gate electrode formed over a second gate dielectric. A spacer is formed at least in part along a sidewall of the gate electrode facing a gate electrode of the storage element. A shallow implant region is formed in the silicon layer responsive at least in part to the spacer. The spacer offsets the shallow implant region from the sidewall. A portion of the shallow implant region is for an extension region. The first gate dielectric and the second gate dielectric are formed at least in part by deposition of a dielectric material.
    • 描述了基于晶闸管的存储单元的形成。 存储元件的第一栅极电介质形成在位于硅层中的基极区域上。 晶体管经由位于硅层中的阴极区耦合到存储元件。 晶体管具有形成在第二栅极电介质上的栅电极。 至少部分地沿着栅电极的侧壁与存储元件的栅电极形成间隔物。 在硅层中形成浅的注入区域,至少部分地响应于间隔物。 间隔件从浅侧植入区域偏离侧壁。 浅植入区域的一部分用于延伸区域。 至少部分地通过沉积介电材料形成第一栅极电介质和第二栅极电介质。
    • 69. 发明授权
    • Stability in thyristor-based memory device
    • 基于晶闸管的存储器件的稳定性
    • US06653175B1
    • 2003-11-25
    • US10231805
    • 2002-08-28
    • Farid NematiHyun-Jin ChoScott Robins
    • Farid NematiHyun-Jin ChoScott Robins
    • H01L21332
    • G11C11/39H01L29/7436H01L29/749
    • A semiconductor device having a thyristor-based memory device exhibits improved stability under adverse operating conditions related to temperature, noise, electrical disturbances and light. In one particular example embodiment of the present invention, a semiconductor device includes a thyristor-based memory device that uses a shunt that effects a leakage current in the thyristor. The thyristor includes a capacitively-coupled control port and anode and cathode end portions. Each of the end portions has an emitter region and an adjacent base region. In one implementation, the current shunt is located between the emitter and base region of one of the end portions of the thyristor and is configured and arranged to shunt low-level current therebetween. In connection with an example embodiment, it has been discovered that shunting current in this manner improves the ability of the device to operate under adverse conditions that would, absent the shunt, result in inadvertent turn on, while keeping the standby current of the memory device to an acceptably low level.
    • 具有基于晶闸管的存储器件的半导体器件在与温度,噪声,电扰动和光线相关的不利操作条件下表现出改进的稳定性。 在本发明的一个具体示例实施例中,半导体器件包括基于晶闸管的存储器件,其使用在晶闸管中产生漏电流的分流器。 晶闸管包括电容耦合控制端口和阳极和阴极端部分。 每个端部具有发射极区域和相邻的基极区域。 在一个实施方案中,电流分流器位于晶闸管的一个端部的发射极和基极区域之间,并且被配置和布置成在它们之间分流低电平电流。 结合示例性实施例,已经发现,以这种方式分流电流提高了器件在不利条件下操作的能力,这种不利条件将在不存在分流的情况下导致无意中导通,同时保持存储器件的待机电流 达到可接受的低水平。
    • 70. 发明授权
    • Thyristor-based device over substrate surface
    • 基于晶体管的器件超过衬底表面
    • US06653174B1
    • 2003-11-25
    • US10023052
    • 2001-12-17
    • Hyun-Jin ChoAndrew HorchScott RobinsFarid Nemati
    • Hyun-Jin ChoAndrew HorchScott RobinsFarid Nemati
    • H01L21332
    • H01L29/74G11C11/39H01L27/0617H01L27/0688H01L27/1023H01L27/1027H01L27/11H01L27/1104H01L29/41716H01L29/42308H01L29/749H01L29/87
    • A semiconductor device having a thyristor is manufactured in a manner that reduces or eliminates manufacturing difficulties commonly experienced in the formation of such devices. According to an example embodiment of the present invention, a thyristor is formed having some or all of the body of the thyristor extending above a substrate surface of a semiconductor device. The semiconductor device includes at least one transistor having source/drain regions formed in the substrate prior to the formation of the thyristor. One or more layers of material are deposited on the substrate surface and used to form a portion of a body of the thyristor that includes anode and cathode end portions. Each end portion is formed having a base region and an emitter region, and at least one of the end portions includes a portion that is in the substrate and electrically coupled to the transistor. A control port is formed capacitively coupled to at least one of the base regions.
    • 制造具有晶闸管的半导体器件以减少或消除在形成这些器件时通常经历的制造困难的方式。 根据本发明的示例性实施例,形成了晶闸管,其中半导体器件的衬底表面上方延伸有晶闸管的一部分或全部。 半导体器件包括至少一个晶体管,其在形成晶闸管之前在衬底中形成有源/漏区。 一层或多层材料沉积在衬底表面上,并用于形成包括阳极和阴极端部的晶闸管体的一部分。 每个端部形成为具有基极区域和发射极区域,并且至少一个端部部分包括位于衬底中并电耦合到晶体管的部分。 形成电容耦合到至少一个基极区域的控制端口。