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61. 发明申请

US20130026503A1 LIGHT EMITTING DIODE DISPLAY AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：发光二极管显示及其制造方法
公开(公告)号：US20130026503A1
公开(公告)日：2013-01-31
申请号：US13474659
申请日：2012-05-17
申请人： Jung-Hyun Son , Hoon Kim , Byung-Hee Kim
发明人： Jung-Hyun Son , Hoon Kim , Byung-Hee Kim
IPC分类号： H01L33/62
CPC分类号： H01L51/5243 , H01L27/3244 , H01L51/5246
摘要： An organic light emitting diode (OLED) display includes a substrate, an OLED on the substrate, and an encapsulation layer on the substrate with the OLED therebetween. The encapsulation layer includes a plurality of metal layers. Two of the plurality of metal layers are directly attached to each other.
摘要翻译：有机发光二极管（OLED）显示器包括衬底，衬底上的OLED以及衬底上的封装层，其间具有OLED。封装层包括多个金属层。多个金属层中的两个彼此直接相连。

62. 发明申请

US20110263117A1 APPARATUS FOR MANUFACTURING SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME 审中-公开
标题翻译：用于制造半导体器件的装置及使用其制造半导体器件的方法
公开(公告)号：US20110263117A1
公开(公告)日：2011-10-27
申请号：US13094342
申请日：2011-04-26
申请人： Sang-Don Nam , Sang-Hoon Ahn , Byung-Hee Kim , Kyu-Hee Han
发明人： Sang-Don Nam , Sang-Hoon Ahn , Byung-Hee Kim , Kyu-Hee Han
IPC分类号： H01L21/768 , H01L21/28
CPC分类号： H01L21/2686 , H01L21/7682 , H01L21/76825 , H01L21/76826 , H01L21/76829 , H01L21/7684 , H01L21/76886 , H01L2221/1047
摘要： A method of manufacturing a semiconductor device and an apparatus for manufacturing a semiconductor device in which moisture is removed from a porous low-dielectric layer after a chemical mechanical polishing (CMP) process include formation of a porous low-dielectric layer on a substrate. A metal interconnection is formed on the substrate having the porous low-dielectric layer. The metal interconnection forms a planar surface with the porous low-dielectric layer to fill the openings. Ultraviolet (UV) light is irradiated to the porous low-dielectric layer to remove absorbed moisture from the porous low-dielectric layer. A capping layer is formed on the substrate having the porous low-dielectric layer and the metal interconnection. The capping layer is formed in-situ to prevent additional absorption of moisture.
摘要翻译：制造半导体器件的方法和用于制造在化学机械抛光（CMP）工艺之后从多孔低电介质层去除水分的半导体器件的设备包括在衬底上形成多孔低电介质层。在具有多孔低电介质层的基板上形成金属互连。金属互连形成具有多孔低介电层的平坦表面以填充开口。将紫外（UV）光照射到多孔低电介质层，以从多孔低介电层去除吸收的水分。在具有多孔低电介质层和金属互连的基板上形成覆盖层。封盖层原位形成以防止额外吸收水分。

63. 发明申请

US20110201198A1 METHOD FORMING METAL FILM AND SEMICONDUCTOR FABRICATION DEVICE HAVING METAL FILM 有权
标题翻译：形成金属膜的方法和金属膜的半导体制造装置
公开(公告)号：US20110201198A1
公开(公告)日：2011-08-18
申请号：US12955093
申请日：2010-11-29
申请人： Eun-ji JUNG , Woong-hee SOHN , Su-kyoung KIM , Gil-heyun CHOI , Byung-hee KIM
发明人： Eun-ji JUNG , Woong-hee SOHN , Su-kyoung KIM , Gil-heyun CHOI , Byung-hee KIM
IPC分类号： H01L21/44
CPC分类号： H01L21/76849 , H01L21/28562
摘要： A method of forming metal films includes preparing a substrate, on which an insulating layer and a metal layer formed of a first metal are exposed; and forming a metal capping layer by supplying an organic precursor of a second metal onto the substrate to deposit the second metal simultaneously on the insulating layer and the metal layer, wherein the second metal capping layer has different thicknesses on the insulating layer and the metal layer.
摘要翻译：一种形成金属膜的方法包括制备其上露出由第一金属形成的绝缘层和金属层的基板; 以及通过将第二金属的有机前体供应到所述基板上以在所述绝缘层和所述金属层上同时沉积所述第二金属而形成金属覆盖层，其中所述第二金属覆盖层在所述绝缘层和所述金属层上具有不同的厚度。

64. 发明申请

US20110092060A1 METHODS OF FORMING WIRING STRUCTURES 有权
标题翻译：形成接线结构的方法
公开(公告)号：US20110092060A1
公开(公告)日：2011-04-21
申请号：US12836081
申请日：2010-07-14
申请人： Eun-Ok Lee , Dae-Yong Kim , Gil-Heyun Choi , Byung-Hee Kim
发明人： Eun-Ok Lee , Dae-Yong Kim , Gil-Heyun Choi , Byung-Hee Kim
IPC分类号： H01L21/768 , H01L21/28
CPC分类号： H01L29/66621 , H01L21/76831 , H01L21/76885 , H01L21/76889 , H01L21/76897 , H01L27/10814 , H01L27/10855 , H01L27/10885 , H01L27/10888 , H01L27/10894 , H01L29/4236 , H01L29/665 , H01L29/78
摘要： A semiconductor memory wiring method includes: receiving a substrate having a cell array region and a peripheral circuit region; depositing a first insulating layer on the substrate; forming a first contact plug in the cell array region, the first contact plug having a first conductive material extending through the first insulating layer; forming a first elongated conductive line at substantially the same time as forming the first contact plug, the first elongated conductive line having the first conductive material directly covering and integrated with the first contact plug; forming a second contact plug in the peripheral circuit region at substantially the same time as forming the first contact plug, the second contact plug having the first conductive material extending through the first insulating layer; and forming a second elongated conductive line at substantially the same time as forming the second contact plug, the second elongated conductive line having the first conductive material directly covering and integrated with the second contact plug.
摘要翻译：一种半导体存储器布线方法，包括：接收具有单元阵列区域和外围电路区域的基板; 在衬底上沉积第一绝缘层; 在所述电池阵列区域中形成第一接触插塞，所述第一接触插塞具有延伸穿过所述第一绝缘层的第一导电材料; 在形成第一接触插塞的基本上同时形成第一细长导线，所述第一细长导线具有直接覆盖并与第一接触插塞一体化的第一导电材料; 在形成第一接触插塞的基本上相同的时间在外围电路区域中形成第二接触插塞，第二接触插塞具有延伸穿过第一绝缘层的第一导电材料; 并且在与形成所述第二接触插塞的基本同时形成第二细长导电线，所述第二细长导电线具有直接覆盖并与所述第二接触插塞一体化的所述第一导电材料。

65. 发明授权

US07928498B2 Gate structures in semiconductor devices 有权
标题翻译：半导体器件中的栅极结构
公开(公告)号：US07928498B2
公开(公告)日：2011-04-19
申请号：US12428303
申请日：2009-04-22
申请人： Tae-Ho Cha , Seong-Hwee Cheong , Gil-Heyun Choi , Byung-Hee Kim , Hee-Sook Park , Jong-Min Baek
发明人： Tae-Ho Cha , Seong-Hwee Cheong , Gil-Heyun Choi , Byung-Hee Kim , Hee-Sook Park , Jong-Min Baek
IPC分类号： H01L29/788
CPC分类号： H01L29/42324 , H01L21/28273 , H01L21/28282 , H01L27/10873 , H01L29/4941 , H01L29/517
摘要： A gate structure includes an insulation layer on a substrate, a first conductive layer pattern on the insulation layer, a metal ohmic layer pattern on the first conductive layer pattern, a diffusion preventing layer pattern on the metal ohmic layer pattern, an amorphous layer pattern on the diffusion preventing layer pattern, and a second conductive layer pattern on the amorphous layer pattern. The gate structure may have a low sheet resistance and desired thermal stability.
摘要翻译：栅极结构包括在衬底上的绝缘层，绝缘层上的第一导电层图案，第一导电层图案上的金属欧姆层图案，金属欧姆层图案上的扩散防止层图案，扩散防止层图案和非晶层图案上的第二导电层图案。栅极结构可以具有低的薄层电阻和期望的热稳定性。

66. 发明授权

US07897500B2 Methods for forming silicide conductors using substrate masking 有权
标题翻译：使用基板掩模形成硅化物导体的方法
公开(公告)号：US07897500B2
公开(公告)日：2011-03-01
申请号：US12276562
申请日：2008-11-24
申请人： Eun-ji Jung , Dae-yong Kim , Gil-heyun Choi , Byung-hee Kim , Woong-hee Sohn , Hyun-su Kim , Jang-hee Lee , Eun-ok Lee , Jeong-gil Lee
发明人： Eun-ji Jung , Dae-yong Kim , Gil-heyun Choi , Byung-hee Kim , Woong-hee Sohn , Hyun-su Kim , Jang-hee Lee , Eun-ok Lee , Jeong-gil Lee
IPC分类号： H01L21/4763
CPC分类号： H01L21/28052 , H01L29/66545
摘要： A plurality of spaced-apart conductor structures is formed on a semiconductor substrate, each of the conductor structures including a conductive layer. Insulating spacers are formed on sidewalls of the conductor structures. An interlayer-insulating film that fills gaps between adjacent ones of the insulating spacers is formed. Portions of the interlayer-insulating layer are removed to expose upper surfaces of the conductive layers. Respective epilayers are grown on the respective exposed upper surfaces of the conductive layers and respective metal silicide layers are formed from the respective epilayers.
摘要翻译：多个间隔开的导体结构形成在半导体衬底上，每个导体结构包括导电层。绝缘垫片形成在导体结构的侧壁上。形成填充相邻绝缘间隔件之间的间隙的层间绝缘膜。去除层间绝缘层的一部分以暴露导电层的上表面。相应的外延层在导电层的相应暴露的上表面上生长，并且各自的外延层形成各自的金属硅化物层。

67. 发明申请

US20110043117A1 POWER SAVING LIGHT EMITTING DIODE DISPLAY BOARD SYSTEM 有权
标题翻译：节能灯发光二极管显示板系统
公开(公告)号：US20110043117A1
公开(公告)日：2011-02-24
申请号：US12646559
申请日：2009-12-23
申请人： Sung Sil KIM , Byung Hee KIM
发明人： Sung Sil KIM , Byung Hee KIM
IPC分类号： H05B37/00
CPC分类号： H05B33/0815 , G09G3/32 , G09G2310/0264 , G09G2330/021 , H05B33/0857
摘要： In a power saving LED (Light Emitting Diode) display board system, each pixel is formed by combining at least one red LED, at least one blue LED and at least one green LED. The power saving LED display board system includes a power converter; a red LED power supply; a green LED power supply; a blue LED power supply; and a DSP (Digital Signal Processor) for controlling the red LED power supply to convert an electric power supplied from the power converter into a red LED operation power, controlling the green LED power supply to convert the electric power supplied from the power converter into a green LED operation power and controlling the blue LED power supply to convert the electric power supplied from the power converter into a blue LED operation power.
摘要翻译：在节电LED（发光二极管）显示板系统中，通过组合至少一个红色LED，至少一个蓝色LED和至少一个绿色LED来形成每个像素。省电LED显示板系统包括电源转换器; 红色LED电源; 绿色LED电源; 蓝色LED电源; 以及用于控制红色LED电源以将从功率转换器提供的电力转换为红色LED操作电力的DSP（数字信号处理器），控制绿色LED电源以将从功率转换器提供的电力转换为绿色LED操作电源，并控制蓝色LED电源，将从电源转换器供电的电力转换为蓝色LED操作电源。

68. 发明授权

US07879737B2 Methods for fabricating improved gate dielectrics 有权
标题翻译：制造改进的栅极电介质的方法
公开(公告)号：US07879737B2
公开(公告)日：2011-02-01
申请号：US12801115
申请日：2010-05-24
申请人： Woong-Hee Sohn , Gil-Heyun Choi , Byung-Hee Kim , Byung-Hak Lee , Tae-Ho Cha , Hee-Sook Park , Jae-Hwa Park , Geum-Jung Seong
发明人： Woong-Hee Sohn , Gil-Heyun Choi , Byung-Hee Kim , Byung-Hak Lee , Tae-Ho Cha , Hee-Sook Park , Jae-Hwa Park , Geum-Jung Seong
IPC分类号： H01L21/31
CPC分类号： H01L21/823481 , H01L21/28202 , H01L21/28211 , H01L21/2822 , H01L29/518 , H01L29/66545 , H01L29/78 , Y10S438/981
摘要： Disclosed are a variety of methods for increasing the relative thickness in the peripheral or edge regions of gate dielectric patterns to suppress leakage through these regions. The methods provide alternatives to conventional GPOX processes and provide the improved leakage resistance without incurring the degree of increased gate electrode resistance associated with GPOX processes. Each of the methods includes forming a first opening to expose an active area region, forming an oxidation control region on the exposed portion and then forming a second opening whereby a peripheral region free of the oxidation control region is exposed for formation of a gate dielectric layer. The resulting gate dielectric layers are characterized by a thinner central region surrounded or bounded by a thicker peripheral region.
摘要翻译：公开了用于增加栅极电介质图案的外围或边缘区域中的相对厚度以抑制这些区域的泄漏的各种方法。这些方法提供了常规GPOX工艺的替代方案，并提供改进的耐漏电性，而不会导致与GPOX工艺相关的增加的栅电极电阻的程度。每种方法包括形成第一开口以暴露有源区域区域，在暴露部分上形成氧化控制区域，然后形成第二开口，由此暴露氧化控制区域的外围区域以形成栅极介电层。得到的栅极介电层的特征在于由较厚的外围区域包围或界定的较薄的中心区域。

69. 发明申请

US20110003455A1 METHODS FOR FABRICATING IMPROVED GATE DIELECTRICS 有权
标题翻译：用于制造改进的门电介质的方法
公开(公告)号：US20110003455A1
公开(公告)日：2011-01-06
申请号：US12801115
申请日：2010-05-24
申请人： Woong-Hee SOHN , Gil-Heyun CHOI , Byung-Hee KIM , Byung-Hak LEE , Tae-Ho CHA , Hee-Sook PARK , Jae-Hwa PARK , Geum-Jung SEONG
发明人： Woong-Hee SOHN , Gil-Heyun CHOI , Byung-Hee KIM , Byung-Hak LEE , Tae-Ho CHA , Hee-Sook PARK , Jae-Hwa PARK , Geum-Jung SEONG
IPC分类号： H01L21/336 , H01L21/76
CPC分类号： H01L21/823481 , H01L21/28202 , H01L21/28211 , H01L21/2822 , H01L29/518 , H01L29/66545 , H01L29/78 , Y10S438/981
摘要： Disclosed are a variety of methods for increasing the relative thickness in the peripheral or edge regions of gate dielectric patterns to suppress leakage through these regions. The methods provide alternatives to conventional GPDX processes and provide the improved leakage resistance without incurring the degree of increased gate electrode resistance associated with GPDX processes. Each of the methods includes forming a first opening to expose an active area region, forming an oxidation control region on the exposed portion and then forming a second opening whereby a peripheral region free of the oxidation control region is exposed for formation of a gate dielectric layer. The resulting gate dielectric layers are characterized by a thinner central region surrounded or bounded by a thicker peripheral region.
摘要翻译：公开了用于增加栅极电介质图案的外围或边缘区域中的相对厚度以抑制这些区域的泄漏的各种方法。这些方法提供了常规GPDX工艺的替代方案，并提供改进的耐漏电性，而不会导致与GPDX工艺相关的增加的栅电极电阻的程度。每种方法包括形成第一开口以暴露有源区域区域，在暴露部分上形成氧化控制区域，然后形成第二开口，由此暴露氧化控制区域的外围区域以形成栅极介电层。得到的栅极介电层的特征在于由较厚的外围区域包围或界定的较薄的中心区域。

70. 发明授权

US07838880B2 Flat panel display device 有权
标题翻译：平板显示设备
公开(公告)号：US07838880B2
公开(公告)日：2010-11-23
申请号：US11529470
申请日：2006-09-29
申请人： Won-Kyu Kwak , Byung-Hee Kim , Sang-Won Lee , In-Young Jung , Myung-Sup Kim
发明人： Won-Kyu Kwak , Byung-Hee Kim , Sang-Won Lee , In-Young Jung , Myung-Sup Kim
IPC分类号： H01L29/04 , H01L29/76 , H01L31/06
CPC分类号： H01L27/124 , H01L27/3276
摘要： A flat panel display device that includes a clad unit that may prevent terminals of a pad unit from becoming corroded or damaged by an etching solution during etching. The flat panel display device may include a display unit, a pad unit which may include a plurality of terminals electrically connecting the display unit to external devices, and a clad unit which may cover at least side end portions of the terminals, in which the clad unit may be composed of an insulating material.
摘要翻译：一种平板显示装置，包括可以防止焊盘单元的端子在蚀刻期间被蚀刻溶液腐蚀或损坏的包层单元。平板显示装置可以包括显示单元，可以包括将显示单元电连接到外部设备的多个端子的焊盘单元和可以覆盖端子的至少侧端部的包层单元，其中，单元可以由绝缘材料构成。

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