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51. 发明授权

US06333518B1 Thin-film transistor and method of making same 失效
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：US06333518B1
公开(公告)日：2001-12-25
申请号：US08918462
申请日：1997-08-26
申请人： Hyun-Sik Seo
发明人： Hyun-Sik Seo
IPC分类号： H01L29786
CPC分类号： H01L29/66765 , H01L29/42384 , H01L29/4908 , Y10S438/937
摘要： A thin-film transistor includes a substrate and a gate including a double-layered structure having first metal layer formed of a material exhibiting tensile stress and second metal layer formed of a metal exhibiting compressive stress, the first metal layer being wider than the second metal layer by about 1 to 4 &mgr;m. A method of making such a thin film transistor includes the steps of: depositing a first metal layer comprising a material exhibiting tensile stress on a substrate, depositing a second metal layer exhibiting compressive stress on the first metal layer; patterning the second metal layer and the first metal layer such that the first metal layer is wider than the second metal layer.
摘要翻译：薄膜晶体管包括基板和包括具有由表现出拉伸应力的材料形成的第一金属层的双层结构的栅极和由表现出压应力的金属形成的第二金属层，第一金属层比第二金属层大约1到4个妈妈。制造这种薄膜晶体管的方法包括以下步骤：在衬底上沉积包含表现出拉伸应力的材料的第一金属层，在第一金属层上沉积显示压应力的第二金属层; 图案化第二金属层和第一金属层，使得第一金属层比第二金属层宽。

52. 发明授权

US06320203B1 Method for fabricating a simplified CMOS polysilicon thin film transistor and resulting structure 失效
标题翻译：制造简化的CMOS多晶硅薄膜晶体管及其结构的方法
公开(公告)号：US06320203B1
公开(公告)日：2001-11-20
申请号：US09249962
申请日：1999-02-12
申请人： Salman Akram
发明人： Salman Akram
IPC分类号： H01L29786
CPC分类号： H01L27/127 , H01L27/1214 , Y10S257/928
摘要： A method of forming a MOS device using doped and activated n-type and p-type polysilicon layers wherein a first doped and activated polysilicon layer (either n-type and p-type) is patterned on a substrate. An isolation material layer is formed abutting the first doped and activated polysilicon layer in the corners formed at the junction between the first doped and activated polysilicon layer and the substrate. A second doped and activated polysilicon layer (either n-type or p-type) is applied over the first doped and activated polysilicon layer and the isolation material layer. The second doped and activated polysilicon layer is planarized to the height of the first doped and activated polysilicon layer. The first and second doped and activated polysilicon layers are etched to substantially bifurcate the first and second doped and activated polysilicon layers. Further processing steps known in the art are utilized to complete the MOS device. The method of the present invention eliminates ion implantation and annealing steps used in present methods.
摘要翻译：使用掺杂和活化的n型和p型多晶硅层形成MOS器件的方法，其中在衬底上图案化第一掺杂和活化的多晶硅层（n型和p型）。形成在第一掺杂活化多晶硅层和基板之间的接合处形成的拐角处的第一掺杂活化多晶硅层邻接的隔离材料层。在第一掺杂和活化的多晶硅层和隔离材料层上施加第二掺杂和活化的多晶硅层（n型或p型）。将第二掺杂和活化的多晶硅层平坦化为第一掺杂和活化多晶硅层的高度。蚀刻第一和第二掺杂和活化的多晶硅层以使第一和第二掺杂和活化的多晶硅层基本上分叉。利用本领域已知的其它处理步骤来完成MOS器件。本发明的方法消除了本方法中使用的离子注入和退火步骤。

53. 发明授权

US06188085B1 Thin film transistor and a method of manufacturing thereof 失效
公开(公告)号：US06188085B1
公开(公告)日：2001-02-13
申请号：US09335691
申请日：1999-06-18
申请人： Satoshi Shimizu , Shuichi Ueno , Shigenobu Maeda , Takashi Ipposhi
发明人： Satoshi Shimizu , Shuichi Ueno , Shigenobu Maeda , Takashi Ipposhi
IPC分类号： H01L29786
CPC分类号： H01L27/1108 , H01L27/1281 , H01L27/1285 , H01L29/66757 , H01L29/78624 , H01L29/78675 , H01L29/78678 , Y10S257/914
摘要： According to a method of manufacturing a thin film transistor (TFT), amorphous silicon is formed by ion-implanting either silicon or nitrogen into a region of polysilicon while a region located at the sidewall of a gate electrode is selectively left using the stepped portion of the gate electrode. Then, a heat treatment is applied to convert the amorphous silicon into polysilicon with the remaining polysilicon as a seed crystal. As a result, polysilicon having crystal grains of great grain size can be formed in uniform. Thus, the electric characteristics of a TFT can be improved with no difference in the electric characteristics between each TFT.

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