会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 60. 发明授权
    • Packet aggregation
    • 数据包聚合
    • US08498305B1
    • 2013-07-30
    • US12950742
    • 2010-11-19
    • Sandesh GoelPrabhashankar Shastry
    • Sandesh GoelPrabhashankar Shastry
    • H04J3/24
    • H04L47/58H04L47/10H04L47/29H04L47/30H04L47/32H04W28/065
    • An apparatus including an input circuit, a control circuit, a queue, an aggregation circuit, and an output circuit. The input circuit is configured to receive packets. The control circuit is configured to enable aggregation when a rate at which the input circuit receives the packets is greater than a predetermined rate. The queue is configured to store the packets from the input circuit when aggregation is enabled. The aggregation circuit is configured to generate aggregate packets when aggregation is enabled. The aggregation circuit is configured to generate each of the aggregate packets by aggregating at least one of the packets stored in the queue. The output circuit is configured to receive (i) the aggregate packets when aggregation is enabled and (ii) the packets from the input circuit when aggregation is disabled.
    • 一种包括输入电路,控制电路,队列,聚合电路和输出电路的装置。 输入电路被配置为接收分组。 控制电路被配置为当输入电路接收分组的速率大于预定速率时能够聚合。 队列配置为在聚合启用时存储来自输入电路的数据包。 聚合电路配置为在聚合启用时生成聚合报文。 聚合电路被配置为通过聚集存储在队列中的分组中的至少一个来生成每个聚合分组。 输出电路被配置为在聚合启用时接收(i)聚合分组,以及(ii)当聚合被禁用时来自输入电路的分组。