专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

51. 发明授权

US08400778B2 Layout schemes and apparatus for multi-phase power switch-mode voltage regulator 有权
标题翻译：用于多相电源开关模式电压调节器的布局方案和装置
公开(公告)号：US08400778B2
公开(公告)日：2013-03-19
申请号：US12698819
申请日：2010-02-02
申请人： Michael R. Hsing , Anthonius Bakker
发明人： Michael R. Hsing , Anthonius Bakker
IPC分类号： H01R9/00
CPC分类号： H01R9/00 , H01L2224/14 , H01L2224/16245 , H01L2924/181 , H03K17/687 , H01L2924/00012
摘要： A multi-phase voltage regulator is disclosed where each phase is comprised of an array of high and low side transistors that are integrated onto a single substrate. Further, a system of mounting the voltage regulator onto a flip chip and lead frame is disclosed wherein the source and drain lines form an interdigital pattern.
摘要翻译：公开了一种多相电压调节器，其中每相包括集成在单个衬底上的高侧和低侧晶体管的阵列。此外，公开了一种将电压调节器安装在倒装芯片和引线框架上的系统，其中源极线和漏极线形成叉指式。

52. 发明授权

US08383460B1 Method for fabricating through substrate vias in semiconductor substrate 有权
标题翻译：在半导体衬底中通过衬底通孔制造的方法
公开(公告)号：US08383460B1
公开(公告)日：2013-02-26
申请号：US13243502
申请日：2011-09-23
申请人： Myung Jin Yim
发明人： Myung Jin Yim
IPC分类号： H01L21/00
CPC分类号： H01L21/76898 , H01L21/6835 , H01L21/6836 , H01L2221/68318 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381 , H01L2224/14
摘要： Methods are provided for fabricating integrated circuit systems that include forming integrated circuits in and on a semiconductor substrate. Via holes are etched into a front surface of the semiconductor substrate and are filled with a conductive material. A carrier wafer having a layer of adhesive thereon is provided and an imprinted pattern is formed in the layer of adhesive. The front surface of the semiconductor substrate is bonded to the carrier wafer with the patterned layer of adhesive. A portion of a back surface of the semiconductor substrate is removed to expose a portion of the conductive material and the thinned back surface is attached to a second substrate. The semiconductor substrate is then de-bonded from the carrier wafer.
摘要翻译：提供了用于制造集成电路系统的方法，其包括在半导体衬底中以及半导体衬底上形成集成电路。通孔蚀刻到半导体衬底的前表面并填充有导电材料。提供其上具有粘合剂层的载体晶片，并且在粘合剂层中形成印刷图案。半导体衬底的前表面与图案化的粘合剂层结合到载体晶片。半导体衬底的后表面的一部分被去除以暴露导电材料的一部分，并且减薄的背表面附着到第二衬底。然后将半导体衬底从载体晶片脱粘合。

53. 发明授权

US08242517B2 Light-emitting diode die package and method for producing same 有权
标题翻译：发光二极管管芯封装及其制造方法
公开(公告)号：US08242517B2
公开(公告)日：2012-08-14
申请号：US12700062
申请日：2010-02-04
申请人： Yu-Nung Shen
发明人： Yu-Nung Shen
IPC分类号： H01L33/00
CPC分类号： H01L33/44 , H01L33/38 , H01L33/508 , H01L2224/05001 , H01L2224/05026 , H01L2224/0508 , H01L2224/05111 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05171 , H01L2224/0557 , H01L2224/05571 , H01L2224/05611 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05671 , H01L2224/14 , H01L2224/48091 , H01L2224/8592 , H01L2924/181 , H01L2924/00014 , H01L2924/00012 , H01L2924/013
摘要： The present invention relates to a light-emitting diode die package having an LED die and an accommodating housing. The LED die has a first doped layer doped with a p- or n-type dopant and a second doped layer doped with a different dopant from that doped in the first doped layer. Each of the first and second doped layers has an electrode-forming surface formed with an electrode, on which an insulation layer is formed. The insulation layer is formed with exposure holes for exposing the electrodes corresponding thereto. Each of the exposure holes is formed inside with an electrically conductive linker. The accommodating housing has an open end through which an accommodating space is accessible. The LED die is positioned within the accommodating space in such a manner that the electrically conductive linker protrudes outwardly from the accommodating space.
摘要翻译：本发明涉及具有LED管芯和容纳壳体的发光二极管管芯封装。 LED管芯具有掺杂有p型或n型掺杂剂的第一掺杂层和掺杂有与在第一掺杂层中掺杂的不同掺杂剂的第二掺杂层。第一和第二掺杂层中的每一个具有形成有形成有绝缘层的电极的电极形成表面。绝缘层形成有暴露与其对应的电极的曝光孔。每个曝光孔在内部形成有导电接头。容纳壳体具有可容纳的容纳空间的开口端。 LED管芯以这样的方式定位在容纳空间内，使得导电连接器从容纳空间向外突出。

54. 发明申请

US20120199861A1 SEMICONDUCTOR LIGHT EMITTING ELEMENT 有权
标题翻译：半导体发光元件
公开(公告)号：US20120199861A1
公开(公告)日：2012-08-09
申请号：US13369096
申请日：2012-02-08
申请人： Yukie TSUJI
发明人： Yukie TSUJI
IPC分类号： H01L33/60
CPC分类号： H01L33/42 , H01L33/38 , H01L33/405 , H01L33/44 , H01L2224/14
摘要： A semiconductor light emitting element includes: a light emitting layer and a p-type semiconductor layer laminated on an n-type semiconductor layer; a transparent conductive layer laminated on the p-type semiconductor layer; a transparent insulating layer laminated on the transparent conductive layer and the exposed n-type semiconductor layer, the transparent insulating layer having plural tapered through-holes formed therein; a p-electrode formed on the transparent conductive layer with the transparent insulating layer interposed therebetween, the p-electrode being connected to the transparent conductive layer via the through-holes provided for the transparent insulating layer; and an n-electrode formed on the n-type semiconductor layer with the transparent insulating layer interposed therebetween, the n-electrode being connected to the n-type semiconductor layer via the through-holes provided for the transparent insulating layer.
摘要翻译：半导体发光元件包括：层叠在n型半导体层上的发光层和p型半导体层; 层叠在p型半导体层上的透明导电层; 层叠在所述透明导电层和所述露出的n型半导体层上的透明绝缘层，所述透明绝缘层具有形成在其中的多个锥形通孔; 在透明导电层上形成有透明绝缘层的p电极，p电极通过设置在透明绝缘层上的通孔与透明导电层连接; 以及在n型半导体层上形成有透明绝缘层的n电极，n电极通过设置在透明绝缘层上的通孔与n型半导体层连接。

55. 发明申请

US20120161169A1 LIGHT-EMITTING DIODE DIE PACKAGE AND METHOD FOR PRODUCING SAME 有权
标题翻译：发光二极管封装及其制造方法
公开(公告)号：US20120161169A1
公开(公告)日：2012-06-28
申请号：US13413443
申请日：2012-03-06
申请人： YU-NUNG SHEN
发明人： YU-NUNG SHEN
IPC分类号： H01L33/48
CPC分类号： H01L33/44 , H01L33/38 , H01L33/508 , H01L2224/05001 , H01L2224/05026 , H01L2224/0508 , H01L2224/05111 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05171 , H01L2224/0557 , H01L2224/05571 , H01L2224/05611 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05671 , H01L2224/14 , H01L2224/48091 , H01L2224/8592 , H01L2924/181 , H01L2924/00014 , H01L2924/00012 , H01L2924/013
摘要： The present invention relates to a light-emitting diode die package having an LED die and an accommodating housing. The LED die has a first doped layer doped with a p- or n-type dopant and a second doped layer doped with a different dopant from that doped in the first doped layer. Each of the first and second doped layers has an electrode-forming surface formed with an electrode, on which an insulation layer is formed. The insulation layer is formed with exposure holes for exposing the electrodes corresponding thereto. Each of the exposure holes is formed inside with an electrically conductive linker. The accommodating housing has an open end through which an accommodating space is accessible. The LED die is positioned within the accommodating space in such a manner that the electrically conductive linker protrudes outwardly from the accommodating space.
摘要翻译：本发明涉及具有LED管芯和容纳壳体的发光二极管管芯封装。 LED管芯具有掺杂有p型或n型掺杂剂的第一掺杂层和掺杂有与在第一掺杂层中掺杂的不同掺杂剂的第二掺杂层。第一和第二掺杂层中的每一个具有形成有形成有绝缘层的电极的电极形成表面。绝缘层形成有暴露与其对应的电极的曝光孔。每个曝光孔在内部形成有导电接头。容纳壳体具有可容纳的容纳空间的开口端。 LED管芯以这样的方式定位在容纳空间内，使得导电连接器从容纳空间向外突出。

56. 发明申请

US20120049224A1 LIGHT EMITTING DIODE 有权
标题翻译：发光二极管
公开(公告)号：US20120049224A1
公开(公告)日：2012-03-01
申请号：US13214650
申请日：2011-08-22
申请人： Tomoya MIZUTANI , Tsunehiro UNNO
发明人： Tomoya MIZUTANI , Tsunehiro UNNO
IPC分类号： H01L33/60 , H01L33/42
CPC分类号： H01L27/153 , H01L33/405 , H01L33/42 , H01L33/62 , H01L2224/14 , H01L2224/16225 , H01L2924/01322 , H01L2933/0066 , H01L2924/00
摘要： A light emitting diode, comprising: a wiring layer; and a semiconductor light emitting element provided on the wiring layer, the semiconductor light emitting element further comprising: a semiconductor light emitting layer; a transparent conductive layer; a metal reflection layer; a transparent insulating film; and a first electrode part and a second electrode part provided on the wiring layer side of the transparent insulating film with an isolating region interposed between them, to be electrically connected to the wiring layer, wherein the first electrode part is electrically connected to the first semiconductor layer by a first contact part, and the second electrode part is electrically connected to the second semiconductor layer by a second contact part which is provided to pass through the transparent insulating film, the transparent conductive layer, the first semiconductor layer, and the active layer.
摘要翻译：一种发光二极管，包括：布线层; 以及设置在所述布线层上的半导体发光元件，所述半导体发光元件还包括：半导体发光层; 透明导电层; 金属反射层; 透明绝缘膜; 以及第一电极部分和第二电极部分，设置在透明绝缘膜的布线层侧上，隔着间隔设置在它们之间，与布线层电连接，其中第一电极部分电连接到第一半导体并且第二电极部分通过设置成穿过透明绝缘膜，透明导电层，第一半导体层和有源层的第二接触部分电连接到第二半导体层。

57. 发明授权

US08110851B2 Nitride-based semiconductor device and method for fabricating the same 有权
标题翻译：基于氮化物的半导体器件及其制造方法
公开(公告)号：US08110851B2
公开(公告)日：2012-02-07
申请号：US13191026
申请日：2011-07-26
申请人： Toshiya Yokogawa , Mitsuaki Oya , Atsushi Yamada , Ryou Kato
发明人： Toshiya Yokogawa , Mitsuaki Oya , Atsushi Yamada , Ryou Kato
IPC分类号： H01L33/00 , H01L33/06
CPC分类号： H01L33/32 , H01L29/2003 , H01L33/0095 , H01L33/16 , H01L33/30 , H01L33/40 , H01L33/44 , H01L2224/14 , H01L2224/16225 , H01L2924/181 , H01L2924/00012
摘要： A nitride-based semiconductor light-emitting device 100 includes a GaN substrate 10, of which the principal surface is an m-plane 12, a semiconductor multilayer structure 20 that has been formed on the m-plane 12 of the GaN-based substrate 10, and an electrode 30 arranged on the semiconductor multilayer structure 20. The electrode 30 includes an Mg layer 32, which contacts with the surface of a p-type semiconductor region in the semiconductor multilayer structure 20.
摘要翻译：氮化物系半导体发光器件100包括其主表面是m面12的GaN衬底10，已经形成在GaN基衬底10的m面12上的半导体多层结构20 以及布置在半导体多层结构体20上的电极30.电极30包括与半导体多层结构体20中的p型半导体区域的表面接触的Mg层32。

58. 发明申请

US20110304024A1 VERTICAL CONDUCTIVE CONNECTIONS IN SEMICONDUCTOR SUBSTRATES 有权
标题翻译：半导体衬底中的垂直导电连接
公开(公告)号：US20110304024A1
公开(公告)日：2011-12-15
申请号：US13160757
申请日：2011-06-15
申请人： Crocifisso Marco Antonio RENNA
发明人： Crocifisso Marco Antonio RENNA
IPC分类号： H01L23/48 , H01L21/78 , H01L23/544 , H01L23/485
CPC分类号： H01L31/02019 , H01L21/76898 , H01L23/481 , H01L2224/0401 , H01L2224/05 , H01L2224/05022 , H01L2224/05025 , H01L2224/0557 , H01L2224/05571 , H01L2224/13 , H01L2224/13022 , H01L2224/14 , H01L2924/0002 , H01L2924/00012 , H01L2224/05552
摘要： An embodiment of a die comprising: a semiconductor body including a front side, a back side, and a lateral surface; an electronic device, formed in said semiconductor body and including an active area facing the front side; a vertical conductive connection, extending through the semiconductor body and defining a conductive path between the front side and the back side of the semiconductor body; and a conductive contact, defining a conductive path on the front side of the semiconductor body, between the active area and the vertical conductive connection, wherein the vertical conductive connection is formed on the lateral surface of the die, outside the active area.
摘要翻译：一种模具的实施例，包括：半导体本体，包括正面，背面和侧面; 形成在所述半导体本体中并且包括面向所述前侧的有源区域的电子器件; 垂直导电连接，延伸穿过半导体本体并且在半导体主体的前侧和后侧之间限定导电路径; 以及在所述有源区和所述垂直导电连接之间限定在所述半导体主体的前侧上的导电路径的导电接触，其中所述垂直导电连接形成在所述有源区外的所述管芯的侧表面上。

59. 发明申请

US20110156048A1 NITRIDE-BASED SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME 审中-公开
标题翻译：基于氮化物的半导体器件及其制造方法
公开(公告)号：US20110156048A1
公开(公告)日：2011-06-30
申请号：US12679347
申请日：2009-06-04
申请人： Toshiya Yokogawa , Mitsuaki Oya , Atsushi Yamada , Ryou Kato
发明人： Toshiya Yokogawa , Mitsuaki Oya , Atsushi Yamada , Ryou Kato
IPC分类号： H01L29/207 , H01L21/20 , H01L21/283
CPC分类号： H01L33/32 , H01L29/2003 , H01L33/0095 , H01L33/16 , H01L33/30 , H01L33/40 , H01L33/44 , H01L2224/14 , H01L2224/16225 , H01L2924/181 , H01L2924/00012
摘要： A nitride-based semiconductor light-emitting device 100 includes a GaN substrate 10, of which the principal surface is an m-plane 12, a semiconductor multilayer structure 20 that has been formed on the m-plane 12 of the GaN-based substrate 10, and an electrode 30 arranged on the semiconductor multilayer structure 20. The electrode 30 includes an Mg layer 32, which contacts with the surface of a p-type semiconductor region in the semiconductor multilayer structure 20.
摘要翻译：氮化物系半导体发光器件100包括其主表面是m面12的GaN衬底10，已经形成在GaN基衬底10的m面12上的半导体多层结构20 以及布置在半导体多层结构体20上的电极30.电极30包括与半导体多层结构体20中的p型半导体区域的表面接触的Mg层32。

60. 发明授权

US07837083B2 Forming solder balls on substrates 有权
公开(公告)号：US07837083B2
公开(公告)日：2010-11-23
申请号：US12639782
申请日：2009-12-16
申请人： John MacKay , Tom Molinaro
发明人： John MacKay , Tom Molinaro
IPC分类号： B23K37/04
CPC分类号： B23K35/22 , B23K3/0623 , H01L24/11 , H01L2224/0401 , H01L2224/05551 , H01L2224/05578 , H01L2224/0603 , H01L2224/11003 , H01L2224/1131 , H01L2224/13012 , H01L2224/13028 , H01L2224/13099 , H01L2224/14 , H01L2224/1403 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01074 , H01L2924/01075 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2924/19041 , H01L2924/351 , H01L2924/00
摘要： A mask (stencil) having cells (openings) is disposed on a surface of a heater stage, and is then filled (printed) with solder paste. Then a substrate is assembled to the opposite side of the mask. Then the solder paste is reflowed. This may be done partially inverted. Then the mask is separated from the substrate, either before or after cooling. Solder balls are thus formed on the substrate, which may be a semiconductor wafer. A biased chuck urges the substrate into intimate contact with the mask. A method for printing the mask with solder paste is described. Methods of forming high aspect ratio solder bumps (including balls and reflowable interconnect structures) are described.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式