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51. 发明授权

US07969778B2 System that compensates for coupling based on sensing a neighbor using coupling 有权
标题翻译：基于使用耦合感测邻居补偿耦合的系统
公开(公告)号：US07969778B2
公开(公告)日：2011-06-28
申请号：US12205916
申请日：2008-09-08
申请人： Yan Li , Yupin Fong
发明人： Yan Li , Yupin Fong
IPC分类号： G11C11/34
CPC分类号： G11C16/0483 , G11C11/5628 , G11C11/5642 , G11C16/3418 , G11C16/3427 , G11C16/3454
摘要： Shifts in the apparent charge stored on a floating gate (or other charge storing element) of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates (or other adjacent charge storing elements). To compensate for this coupling, the read or programming process for a given memory cell can take into account the programmed state of an adjacent memory cell. To determine whether compensation is needed, a process can be performed that includes sensing information about the programmed state of an adjacent memory cell (e.g., on an adjacent bit line or other location).
摘要翻译：存在于非易失性存储单元的浮动栅极（或其他电荷存储元件）上的表观电荷的变化可能发生，因为基于存储在相邻浮动栅极（或其它相邻电荷存储元件）中的电荷的电场的耦合）。为了补偿该耦合，给定存储器单元的读取或编程过程可以考虑相邻存储器单元的编程状态。为了确定是否需要补偿，可以执行包括感测关于相邻存储器单元的编程状态的信息（例如，在相邻位线或其他位置上）的处理。

52. 发明授权

US07616480B2 System that compensates for coupling based on sensing a neighbor using coupling 有权
标题翻译：基于使用耦合感测邻居补偿耦合的系统
公开(公告)号：US07616480B2
公开(公告)日：2009-11-10
申请号：US12205919
申请日：2008-09-08
申请人： Yan Li , Yupin Fong
发明人： Yan Li , Yupin Fong
IPC分类号： G11C11/34
CPC分类号： G11C16/0483 , G11C11/5628 , G11C11/5642 , G11C16/3418 , G11C16/3427 , G11C16/3454
摘要： Shifts in the apparent charge stored on a floating gate (or other charge storing element) of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates (or other adjacent charge storing elements). To compensate for this coupling, the read or programming process for a given memory cell can take into account the programmed state of an adjacent memory cell. To determine whether compensation is needed, a process can be performed that includes sensing information about the programmed state of an adjacent memory cell (e.g., on an adjacent bit line or other location).
摘要翻译：存在于非易失性存储单元的浮动栅极（或其他电荷存储元件）上的表观电荷的变化可能发生，因为基于存储在相邻浮动栅极（或其它相邻电荷存储元件）中的电荷的电场的耦合）。为了补偿该耦合，给定存储器单元的读取或编程过程可以考虑相邻存储器单元的编程状态。为了确定是否需要补偿，可以执行包括感测关于相邻存储器单元的编程状态的信息（例如，在相邻位线或其它位置上）的处理。

53. 发明申请

US20090185416A1 SYSTEM THAT COMPENSATES FOR COUPLING BASED ON SENSING A NEIGHBOR USING COUPLING 有权
公开(公告)号：US20090185416A1
公开(公告)日：2009-07-23
申请号：US12205916
申请日：2008-09-08
申请人： Yan Li , Yupin Fong
发明人： Yan Li , Yupin Fong
IPC分类号： G11C16/02 , G11C16/06
CPC分类号： G11C16/0483 , G11C11/5628 , G11C11/5642 , G11C16/3418 , G11C16/3427 , G11C16/3454
摘要： Shifts in the apparent charge stored on a floating gate (or other charge storing element) of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates (or other adjacent charge storing elements). To compensate for this coupling, the read or programming process for a given memory cell can take into account the programmed state of an adjacent memory cell. To determine whether compensation is needed, a process can be performed that includes sensing information about the programmed state of an adjacent memory cell (e.g., on an adjacent bit line or other location).

54. 发明申请

US20090003053A1 SYSTEM THAT COMPENSATES FOR COUPLING BASED ON SENSING A NEIGHBOR USING COUPLING 有权
公开(公告)号：US20090003053A1
公开(公告)日：2009-01-01
申请号：US12205919
申请日：2008-09-08
申请人： Yan Li , Yupin Fong
发明人： Yan Li , Yupin Fong
IPC分类号： G11C16/04 , G11C16/06
CPC分类号： G11C16/0483 , G11C11/5628 , G11C11/5642 , G11C16/3418 , G11C16/3427 , G11C16/3454
摘要： Shifts in the apparent charge stored on a floating gate (or other charge storing element) of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates (or other adjacent charge storing elements). To compensate for this coupling, the read or programming process for a given memory cell can take into account the programmed state of an adjacent memory cell. To determine whether compensation is needed, a process can be performed that includes sensing information about the programmed state of an adjacent memory cell (e.g., on an adjacent bit line or other location).

55. 发明授权

US07453730B2 Charge packet metering for coarse/fine programming of non-volatile memory 有权
公开(公告)号：US07453730B2
公开(公告)日：2008-11-18
申请号：US11429769
申请日：2006-05-08
申请人： Daniel C. Guterman , Nima Mokhlesi , Yupin Fong
发明人： Daniel C. Guterman , Nima Mokhlesi , Yupin Fong
IPC分类号： G11C11/34
CPC分类号： G11C11/5628 , G11C16/10 , G11C2211/5621 , G11C2211/5624
摘要： A non-volatile memory device is programmed by first performing a coarse programming process and subsequently performing a fine programming process. The coarse/fine programming methodology is enhanced by using an efficient verification scheme that allows some non-volatile memory cells to be verified for the coarse programming process while other non-volatile memory cells are verified for the fine programming process. The fine programming process can be accomplished using current sinking, charge packet metering or other suitable means.

56. 发明授权

US07414887B2 Variable current sinking for coarse/fine programming of non-volatile memory 有权
标题翻译：用于非易失性存储器粗/精编程的可变电流吸收
公开(公告)号：US07414887B2
公开(公告)日：2008-08-19
申请号：US11280716
申请日：2005-11-16
申请人： Daniel C. Guterman , Nima Mokhlesi , Yupin Fong
发明人： Daniel C. Guterman , Nima Mokhlesi , Yupin Fong
IPC分类号： G11C11/34
CPC分类号： G11C11/5628 , G11C16/10 , G11C16/3454 , G11C16/3481 , G11C27/005
摘要： A non-volatile memory device is programmed by first performing a coarse programming process and subsequently performing a fine programming process. The coarse/fine programming methodology is enhanced by using an efficient verification scheme that allows some non-volatile memory cells to be verified for the coarse programming process while other non-volatile memory cells are verified for the fine programming process. The fine programming process can be accomplished using current sinking, charge packet metering or other suitable means.
摘要翻译：通过首先执行粗略编程处理并随后执行精细编程处理来编程非易失性存储器件。通过使用有效的验证方案来增强粗/精编程方法，该验证方案允许对粗略编程过程验证一些非易失性存储器单元，同时验证其它非易失性存储器单元用于精细编程过程。精细的编程过程可以使用电流吸收，电荷分组测量或其他合适的方法来完成。

57. 发明申请

US20070091685A1 EFFICIENT VERIFICATION FOR COARSE/FINE PROGRAMMING OF NON-VOLATILE MEMORY 有权
标题翻译：用于非易失性存储器的精细/精细编程的有效验证
公开(公告)号：US20070091685A1
公开(公告)日：2007-04-26
申请号：US11550502
申请日：2006-10-18
申请人： Daniel Guterman , Nima Mokhlesi , Yupin Fong
发明人： Daniel Guterman , Nima Mokhlesi , Yupin Fong
IPC分类号： G11C11/34
CPC分类号： G11C16/3459 , G11C11/5628 , G11C16/3454 , G11C16/3481 , G11C2211/5621 , G11C2211/5624
摘要： A non-volatile memory device is programmed by first performing a coarse programming process and subsequently performing a fine programming process. The coarse/fine programming methodology is enhanced by using an efficient verification scheme that allows some non-volatile memory cells to be verified for the coarse programming process while other non-volatile memory cells are verified for the fine programming process. The fine programming process can be accomplished using current sinking, charge packet metering or other suitable means.
摘要翻译：通过首先执行粗略编程处理并随后执行精细编程处理来编程非易失性存储器件。通过使用有效的验证方案来增强粗/精编程方法，该验证方案允许对粗略编程过程验证一些非易失性存储器单元，同时验证其它非易失性存储器单元用于精细编程过程。精细的编程过程可以使用电流吸收，电荷分组测量或其他合适的方法来完成。

58. 发明申请

US20070058436A1 EFFICIENT VERIFICATION FOR COARSE/FINE PROGRAMMING OF NON VOLATILE MEMORY 有权
标题翻译：非易失性存储器的精细/精细编程的有效验证
公开(公告)号：US20070058436A1
公开(公告)日：2007-03-15
申请号：US11550499
申请日：2006-10-18
申请人： Daniel Guterman , Nima Mokhlesi , Yupin Fong
发明人： Daniel Guterman , Nima Mokhlesi , Yupin Fong
IPC分类号： G11C11/34
CPC分类号： G11C16/3459 , G11C11/5628 , G11C16/3454 , G11C16/3481 , G11C2211/5621 , G11C2211/5624
摘要： A non-volatile memory device is programmed by first performing a coarse programming process and subsequently performing a fine programming process. The coarse/fine programming methodology is enhanced by using an efficient verification scheme that allows some non-volatile memory cells to be verified for the coarse programming process while other non-volatile memory cells are verified for the fine programming process. The fine programming process can be accomplished using current sinking, charge packet metering or other suitable means.
摘要翻译：通过首先执行粗略编程处理并随后执行精细编程处理来编程非易失性存储器件。通过使用有效的验证方案来增强粗/精编程方法，该验证方案允许对粗略编程过程验证一些非易失性存储器单元，同时验证其它非易失性存储器单元用于精细编程过程。精细的编程过程可以使用电流吸收，电荷分组测量或其他合适的方法来完成。

59. 发明授权

US07088621B2 Bitline governed approach for coarse/fine programming 有权
公开(公告)号：US07088621B2
公开(公告)日：2006-08-08
申请号：US11207427
申请日：2005-08-18
申请人： Daniel C. Guterman , Nima Mokhlesi , Yupin Fong
发明人： Daniel C. Guterman , Nima Mokhlesi , Yupin Fong
IPC分类号： G11C16/04
CPC分类号： G11C16/0483 , G11C16/12 , G11C16/30 , G11C16/3454 , G11C16/3459
摘要： In a system for programming non-volatile storage, technology is disclosed for programming with greater precision and reasonable program times. In one embodiment, a first voltage is applied to a bit line for a first non-volatile storage element in order to inhibit that first non-volatile storage element. A first program voltage is applied to the first non-volatile storage element. For example, a program pulse is applied to a control gate for the first non-volatile storage element. During the program pulse, the bit line is changed from said first voltage to a second voltage, where the second voltage allows the first non-volatile storage element to be programmed.

60. 发明申请

US20060163645A1 EEPROM With Split Gate Source Side Injection 失效
标题翻译：具有分流门源侧注入的EEPROM
公开(公告)号：US20060163645A1
公开(公告)日：2006-07-27
申请号：US11278778
申请日：2006-04-05
申请人： Daniel Guterman , Gheorghe Samachisa , Yupin Fong , Eliyahou Harari
发明人： Daniel Guterman , Gheorghe Samachisa , Yupin Fong , Eliyahou Harari
IPC分类号： H01L29/788
CPC分类号： H01L27/11521 , G11C16/0425 , G11C16/0458 , G11C16/0491 , H01L27/115 , H01L29/7881
摘要： Novel memory cells utilize source-side injection, allowing very small programming currents. If desired, to-be-programmed cells are programmed simultaneously while not requiring an unacceptably large programming current for any given programming operation. In one embodiment, memory arrays are organized in sectors with each sector being formed of a single column or a group of columns having their control gates connected in common. In one embodiment, a high speed shift register is used in place of a row decoder to serially shift in data for the word lines, with all data for each word line of a sector being contained in the shift register on completion of its serial loading. In one embodiment, speed is improved by utilizing a parallel loaded buffer register which receives parallel data from the high speed shift register and holds that data during the write operation, allowing the shift register to receive serial loaded data during the write operation for use in a subsequent write operation. In one embodiment, a verification is performed in parallel on all to-be-programmed cells in a column and the bit line current monitored. If all of the to-be-programmed cells have been properly programmed, the bit line current will be substantially zero. If bit line current is detected, another write operation is performed on all cells of the sector, and another verify operation is performed. This write/verify procedure is repeated until verification is successful, as detected or substantially zero, bit line current.
摘要翻译：新型存储单元利用源侧注入，允许非常小的编程电流。如果需要，对于任何给定的编程操作，被编程的单元被同时编程，而不需要不可接受的大的编程电流。在一个实施例中，存储器阵列被组织在扇区中，其中每个扇区由单个列或一组具有共同连接的控制门的列组成。在一个实施例中，代替行解码器来使用高速移位寄存器来对字线的数据进行串行移位，在其串行加载完成时扇区的每个字线的所有数据都包含在移位寄存器中。在一个实施例中，通过利用并行加载的缓冲寄存器来提高速度，所述缓冲寄存器从高速移位寄存器接收并行数据，并且在写入操作期间保持该数据，从而允许移位寄存器在写操作期间接收串行加载的数据，以用于后续写操作。在一个实施例中，在列中的所有要编程的单元并行地执行验证，并监视位线电流。如果所有待编程的单元都已被正确编程，则位线电流将基本为零。如果检测到位线电流，则对扇区的所有单元执行另一写操作，并且执行另一验证操作。重复此写/验证过程，直到验证成功，如检测到或基本为零，位线电流。

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