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51. 发明授权

US5675294A Single pin crystal oscillator circuit 失效
标题翻译：单针晶体振荡电路
公开(公告)号：US5675294A
公开(公告)日：1997-10-07
申请号：US582881
申请日：1996-01-04
申请人： Jyn-Bang Shyu , Jin Zhao
发明人： Jyn-Bang Shyu , Jin Zhao
IPC分类号： H03B5/36
CPC分类号： H03B5/364
摘要： A single pin integrated oscillator circuit includes an amplifier having a first input terminal to which an external crystal may be connected, and a second input terminal which receives a feedback path from an output terminal of the amplifier. An oscillator output signal having a relatively large voltage swing is provided from the first input terminal through a buffer. The oscillator operates over a wide range of voltages and process variations, and it can accept an input signal from an external crystal or can accept any clock signal having a swing of approximately 1 V.
摘要翻译：单引脚集成振荡器电路包括具有可以连接外部晶体的第一输入端子的放大器和从放大器的输出端子接收反馈路径的第二输入端子。通过缓冲器从第一输入端子提供具有相对较大电压摆幅的振荡器输出信号。振荡器在宽范围的电压和工艺变化范围内工作，并且可以接受来自外部晶体的输入信号，或者可以接受具有大约1V的摆幅的任何时钟信号。

52. 发明授权

US5600284A High performance voltage controlled oscillator 失效
标题翻译：高性能压控振荡器
公开(公告)号：US5600284A
公开(公告)日：1997-02-04
申请号：US543740
申请日：1995-10-16
申请人： Trung T. Nguyen , Jin Zhao
发明人： Trung T. Nguyen , Jin Zhao
IPC分类号： H03K3/0231 , H03K3/354 , H03L1/00 , H03L7/099 , H03B5/04 , H03B5/24
CPC分类号： H03K3/354 , H03K3/0231 , H03L1/00 , H03L7/0995
摘要： A bias voltage generator for a voltage controlled oscillator is described. In one aspect of the invention, the bias voltage generator includes a biasing circuit to generate a minimum clock output at zero operating voltage, and includes a common mode rejection circuit for the BIASN and BIASP control voltages for the differential delay stages and a IDD test current shut-down circuit. A differential delay stage is described that includes a current source controlled by the BIASN and BIASP control voltages from the bias voltage generator, a resistance linearization circuit for current controlling transistors of a BIASN circuit, and a process variation circuit for compensating for temperature and process variations. The improved characteristics of the resulting VCO permits high frequency operation with a relatively low gain, relatively constant gain throughout operating voltage range, improved noise rejection capabilities, increased speed of delay stage, and reduced output signal swing. All of which contribute to improved phase locked loop reliability especially when operating near the ends of the operating range.
摘要翻译：描述了压控振荡器的偏置电压发生器。在本发明的一个方面，偏置电压发生器包括偏置电路，以在零工作电压下产生最小时钟输出，并且包括用于差分延迟级的BIASN和BIASP控制电压的共模抑制电路和IDD测试电流关闭电路。描述了一种差分延迟级，其包括由BIASN控制的电流源和来自偏置电压发生器的BIASP控制电压，用于BIASN电路的电流控制晶体管的电阻线性化电路和用于补偿温度和工艺变化的工艺变化电路。得到的VCO的改进的特性允许在相对低的增益，在整个工作电压范围内相对恒定的增益，改善的噪声抑制能力，增加的延迟级速度和减小的输出信号摆幅的高频操作。所有这些都有助于提高锁相环的可靠性，特别是在靠近工作范围的端部进行操作时。

53. 发明授权

US5469120A High performance voltage controlled oscillator 失效
标题翻译：高性能压控振荡器
公开(公告)号：US5469120A
公开(公告)日：1995-11-21
申请号：US351636
申请日：1994-12-07
申请人： Trung T. Nguyen , Jin Zhao
发明人： Trung T. Nguyen , Jin Zhao
IPC分类号： H03K3/0231 , H03K3/354 , H03L1/00 , H03L7/099 , H03B5/04 , H03B5/24
CPC分类号： H03K3/354 , H03K3/0231 , H03L1/00 , H03L7/0995
摘要： A bias voltage generator for a voltage controlled oscillator is described. In one aspect of the invention, the bias voltage generator includes a biasing circuit to generate a minimum clock output at zero operating voltage, and includes a common mode rejection circuit for the BIASN and BIASP control voltages for the differential delay stages and a IDD test current shut-down circuit. A differential delay stage is described that includes a current source controlled by the BIASN and BIASP control voltages from the bias voltage generator, a resistance linearization circuit for current controlling transistors of a BIASN circuit, and a process variation circuit for compensating for temperature and process variations. The improved characteristics of the resulting VCO permits high frequency operation with a relatively low gain, relatively constant gain throughout operating voltage range, improved noise rejection capabilities, increased speed of delay stage, and reduced output signal swing. All of which contribute to improved phase locked loop reliability especially when operating near the ends of the operating range.
摘要翻译：描述了压控振荡器的偏置电压发生器。在本发明的一个方面，偏置电压发生器包括偏置电路，以在零工作电压下产生最小时钟输出，并且包括用于差分延迟级的BIASN和BIASP控制电压的共模抑制电路和IDD测试电流关闭电路。描述了一种差分延迟级，其包括由BIASN控制的电流源和来自偏置电压发生器的BIASP控制电压，用于BIASN电路的电流控制晶体管的电阻线性化电路和用于补偿温度和工艺变化的工艺变化电路。得到的VCO的改进的特性允许在相对低的增益，在整个工作电压范围内相对恒定的增益，改善的噪声抑制能力，增加的延迟级速度和减小的输出信号摆幅的高频操作。所有这些都有助于提高锁相环的可靠性，特别是在靠近工作范围的端部进行操作时。

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