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51. 发明申请

US20090165108A1 METHOD FOR VERIFYING SERVER END APPARATUS 审中-公开
标题翻译：验证服务器端设备的方法
公开(公告)号：US20090165108A1
公开(公告)日：2009-06-25
申请号：US12173029
申请日：2008-07-15
申请人： Chih-Cheng Chen , Chi-Hsing Tseng , Tzung-Hsi Lin
发明人： Chih-Cheng Chen , Chi-Hsing Tseng , Tzung-Hsi Lin
IPC分类号： H04L9/32
CPC分类号： G06F21/445
摘要： A method for verifying a server end apparatus, suitable for verifying the identity of a server end apparatus from a client end apparatus, is provided. In the present invention, authentication data is sent to the server end apparatus by the client end apparatus, such that the server end apparatus verifies the authentication data. Afterwards, the server end apparatus must return an initial number, which is preset by the user, to the client end apparatus to verify whether the initial number is correct or not. If the initial number is incorrect, the connection with the server end apparatus is shut down. Therefore, the efficiency for verifying the server end identity is strengthened, so as to enhance the security.
摘要翻译：提供了一种用于验证服务器端设备的方法，该方法适用于从客户端设备验证服务器端设备的身份。在本发明中，认证数据由客户端装置发送给服务器端装置，使得服务器端装置验证认证数据。之后，服务器端装置必须将由用户预设的初始号码返回给客户端装置，以验证初始号码是否正确。如果初始号码不正确，则与服务器终端设备的连接被关闭。因此，加强了验证服务器端标识的效率，从而提高了安全性。

52. 发明授权

US07477589B2 Calibration method for optical disk drive signal and device doing the same 有权
标题翻译：光盘驱动器信号和设备的校准方法做的相同
公开(公告)号：US07477589B2
公开(公告)日：2009-01-13
申请号：US11146034
申请日：2005-06-07
申请人： Chia-Hua Chou , Chih-Cheng Chen
发明人： Chia-Hua Chou , Chih-Cheng Chen
IPC分类号： G11B7/00
CPC分类号： G11B7/1267
摘要： The present invention with an optical disk drive controller and an optical pickup head connected together by a flexible cable is described. The device includes a delay adjusting module located within the first module for delaying a first signal by an amount specified by a calibration signal. The first module transmits the delayed first signal and a second signal through a first signal channel and a second signal channel, respectively, to the second module of the optical pickup head, a monitoring module located within the optical pickup head for receiving and reshaping the delayed first signal and the second signal so as to generate a monitor signal. A calibration signal-generating module is located within the optical disk drive controller for receiving the monitor signal so as to generate the calibration signal.
摘要翻译：描述了通过柔性电缆连接在一起的光盘驱动器控制器和光学拾取头的本发明。该装置包括位于第一模块内的延迟调整模块，用于将第一信号延迟由校准信号指定的量。第一模块分别通过第一信号信道和第二信号信道将延迟的第一信号和第二信号发送到光学拾取头的第二模块，位于光学拾取头内的监测模块，用于接收和重新形成延迟的第一信号和第二信号，以产生监视信号。校准信号发生模块位于光盘驱动器控制器内，用于接收监视信号以产生校准信号。

53. 发明申请

US20080181881A1 TREATMENT OF INSULIN RESISTANCE 失效
标题翻译：治疗胰岛素抵抗
公开(公告)号：US20080181881A1
公开(公告)日：2008-07-31
申请号：US11668952
申请日：2007-01-30
申请人： Chih-Cheng Chen , Shyh-Jer Huang , Yi-Wen Lin
发明人： Chih-Cheng Chen , Shyh-Jer Huang , Yi-Wen Lin
IPC分类号： A61K39/395 , A61K31/7052 , A61K48/00 , G01N33/53
CPC分类号： G01N33/5035 , A61K31/7052 , A61K48/00 , G01N33/5044 , G01N33/6872 , G01N2800/042
摘要： Disclosed are a method of for treating insulin resistance and a method identifying a compound for treating insulin resistance.
摘要翻译：公开了一种治疗胰岛素抵抗的方法，以及鉴定用于治疗胰岛素抵抗的化合物的方法。

54. 发明授权

US07404723B1 Card connector 失效
标题翻译：卡连接器
公开(公告)号：US07404723B1
公开(公告)日：2008-07-29
申请号：US11853511
申请日：2007-09-11
申请人： Chih-Cheng Chen
发明人： Chih-Cheng Chen
IPC分类号： H01R13/62
CPC分类号： G06K7/0021 , G06K7/0069 , H01R13/7031 , H05K5/0295
摘要： A card connector including a base, a housing, a terminal set, a first detecting conductive element, and a slidable unit is provided. The housing is disposed on the base, and defines a receiving space with the base. The terminal set is secured to a certain position of the base. The first detecting conductive element is engaged to the base, and has an end electrically connected to a circuit board. The slidable unit includes a sliding block and a second detecting conductive element. The second detecting conductive element is engaged in the sliding block. The second detecting conductive element includes a first contact portion exposing from the sliding block and being in contact with the housing. The first detecting conductive element is positioned on a moving path of the second detecting conductive element.
摘要翻译：提供了包括基座，壳体，端子组，第一检测导电元件和可滑动单元的卡连接器。壳体设置在基座上，并且与底座形成接收空间。终端机固定在基座的某个位置。第一检测导电元件接合到基座，并且具有电连接到电路板的一端。滑动单元包括滑动块和第二检测导电元件。第二检测导电元件接合在滑动块中。第二检测导电元件包括从滑动块暴露并与壳体接触的第一接触部分。第一检测导电元件位于第二检测导电元件的移动路径上。

55. 发明授权

US07187366B2 Input system with detection of coordinates 有权
标题翻译：输入系统检测坐标
公开(公告)号：US07187366B2
公开(公告)日：2007-03-06
申请号：US10414775
申请日：2003-04-14
申请人： Chih-Cheng Chen
发明人： Chih-Cheng Chen
IPC分类号： G09G5/00
CPC分类号： G06F3/046
摘要： A coordinate detection input system includes two first elongated electric conductors with an insulation grounding device respectively, a control circuit and two elongated electric conductors with another insulation grounding device respectively. The two elongated electric conductors are disposed correspond to X-coordinate and Y-coordinate of the input system. The control circuit further includes a microprocessor, a field induced voltage transducer, an analog/digital converter and a signal transmission device. The elongated electric conductors are electrically connected to the microprocessor to induce electromagnetic fields sequentially every time after a zero checking has been done by the microprocessor. The field induced voltage transducer induces voltage in the magnetic field once the pulse current is operated to pass through any one of the electric conductors. The analog/digital converter transforms the induced voltages as coordinates and position of the field induced voltage transducer can be figured out accordingly.
摘要翻译：坐标检测输入系统包括分别具有绝缘接地装置的两个第一细长电导体，分别具有另一绝缘接地装置的控制电路和两个细长电导体。两根细长的电导体对应于输入系统的X坐标和Y坐标。控制电路还包括微处理器，场感应电压变换器，模拟/数字转换器和信号传输装置。细长的电导体与微处理器电连接以在微处理器进行零检查之后每次都依次诱导电磁场。一旦脉冲电流被操作通过任何一个电导体，场感应电压传感器就会在磁场中感应出电压。模拟/数字转换器转换感应电压，因此可以相应地计算出场感应电压换能器的坐标和位置。

56. 发明申请

US20060133250A1 Optical disk drive signal calibration method and device for the same 失效
标题翻译：光盘驱动器信号的校准方法和设备相同
公开(公告)号：US20060133250A1
公开(公告)日：2006-06-22
申请号：US11349936
申请日：2006-02-09
申请人： Chia-Hua Chou , Chih-Cheng Chen
发明人： Chia-Hua Chou , Chih-Cheng Chen
IPC分类号： G11B5/09
CPC分类号： G11B7/1267
摘要： The present invention is described for compensating a signal which is transmitted by a transmitting module of the optical disk drive controller through a signal channel and received and reshaped by a receiving module of the optical pickup head to calibrate the duty cycle distortion occurred. The claimed method has the steps of providing a periodic test signal, and then delaying the periodic test signal to form an adjusted test signal and adjusting a delay of an edge between the periodic test signal and the adjusted test signal instructed by a calibration signal. Afterward, the method further has the steps of transmitting the adjusted test signal to the receiving module through the signal channel, and receiving and reshaping the adjusted test signal to form a received signal, and then generating a monitor signal, finally, the method has a step of generating the calibration signal in accordance with the monitor signal.
摘要翻译：描述了本发明，用于补偿由光盘驱动器控制器的发送模块通过信号通道发送的信号，并由光学拾取头的接收模块接收和重新整形，以校准发生的占空比失真。要求保护的方法具有提供周期性测试信号，然后延迟周期性测试信号以形成调整的测试信号，并且调整周期性测试信号与由校准信号指示的经调整的测试信号之间的边缘的延迟。此后，该方法还具有通过信号通道将调整后的测试信号发送到接收模块的步骤，并且接收和重新调整经调整的测试信号以形成接收信号，然后产生监视信号，最后该方法具有根据监视信号产生校准信号的步骤。

57. 发明申请

US20050121833A1 Processing method for ceramic 审中-公开
标题翻译：陶瓷加工方法
公开(公告)号：US20050121833A1
公开(公告)日：2005-06-09
申请号：US10729926
申请日：2003-12-09
申请人： Jenn-Shing Wang , Wen-Hao Lin , Chih-Cheng Chen
发明人： Jenn-Shing Wang , Wen-Hao Lin , Chih-Cheng Chen
IPC分类号： C04B33/32 , C04B35/638
CPC分类号： C04B35/638 , C04B35/62645 , C04B2235/6587
摘要： A processing method for ceramic, having processing steps consisting of: (a) Manufacture pellets; (b) Cover the pellets with microwave dielectric; (c) Place the pellets into a microwave environment; (d) Microwave degreasing; (e) Complete degreasing. Procedural steps of the present invention primarily consist of placing the ceramic pellets in a container filled with microwave dielectric powder, placing the container within the microwave environment, and then regulating microwave power and time period for degreasing, whereupon the microwave dielectric powder surrounding and covering the pellets subsequently absorbs the microwaves and thereby facilitates indirect degreasing of the pellets.
摘要翻译：一种陶瓷加工方法，具有以下加工步骤：（a）制造颗粒; （b）用微波电介质覆盖颗粒; （c）将颗粒放入微波环境中; （d）微波脱脂; （e）完全脱脂。本发明的步骤主要包括将陶瓷颗粒放置在装有微波介电粉末的容器中，将容器放置在微波环境中，然后调节微波功率和时间段以进行脱脂，随后将微波介电粉末包围并覆盖颗粒随后吸收微波，从而促进颗粒的间接脱脂。

58. 发明申请

US20050025206A1 Single-transverse-mode VCSEL device with array structure and fabrication method thereof 审中-公开
标题翻译：具有阵列结构的单横模VCSEL器件及其制造方法
公开(公告)号：US20050025206A1
公开(公告)日：2005-02-03
申请号：US10899851
申请日：2004-07-27
申请人： Chih-Cheng Chen
发明人： Chih-Cheng Chen
IPC分类号： H01S5/00 , H01S5/183 , H01S5/20 , H01S5/343 , H01S5/42
CPC分类号： B82Y20/00 , H01S5/18308 , H01S5/2072 , H01S5/34313 , H01S5/423 , H01S2301/166
摘要： A single-transverse-mode VCSEL device with array structure and the fabrication method thereof. The single-transverse-mode VCSEL device with array structure comprises a plurality of light-emitting windows in a 1-D or 2-D array arrangement, and thereby provides high output power, low resistance, and a broad operating current range.
摘要翻译：具有阵列结构的单横模VCSEL器件及其制造方法。具有阵列结构的单横向VCSEL器件包括以1-D或2-D阵列布置的多个发光窗，从而提供高输出功率，低电阻和宽工作电流范围。

59. 发明授权

US06236241B1 Redundant decoder having fuse-controlled transistor 有权
标题翻译：具有熔丝控制晶体管的冗余解码器
公开(公告)号：US06236241B1
公开(公告)日：2001-05-22
申请号：US09548032
申请日：2000-04-12
申请人： Yu-Jen Liu , Chih-Cheng Chen
发明人： Yu-Jen Liu , Chih-Cheng Chen
IPC分类号： H03K19096
CPC分类号： G11C29/70
摘要： A redundant decoder having fuse-controlled transistor comprises as follows: a bistable circuit which outputs a pair of complementary signals; a discharging device which is turned on at an evaluating cycle to form a discharging path; a precharging device which is turned on at a precharging cycle before an evaluating cycle to provide a precharging voltage; a first pair of transistors, having first terminals coupled to the precharging voltage, first gate terminals coupled to receive pair of complementary signals whose logic values decide whether the first pair of transistors are turned on or not, and second terminals; a second pair of transistors, having third terminals coupled to the second terminals of the first pair of transistors, second gate terminals coupled to receive a pair of complementary address bit signals whose logic values decide whether the second pair of transistors are turned on or not, and fourth terminals coupled to the discharging device; and a fuse device, having a fuse which is coupled to the bistable device that decides the logic values of the pair of complementary signals by whether the fuse is burnt down or not.
摘要翻译：具有熔丝控制晶体管的冗余解码器包括如下：输出一对互补信号的双稳态电路; 放电装置，其在评价周期开启，形成放电路径; 预充电装置，其在评价周期之前以预充电周期开启，以提供预充电电压; 第一对晶体管，具有耦合到预充电电压的第一端子，第一栅极端子耦合以接收一对互补信号，其逻辑值决定第一对晶体管是否导通;以及第二端子; 第二对晶体管，具有耦合到第一对晶体管的第二端子的第三端子，第二栅极端子，被耦合以接收一对互补地址位信号，其逻辑值决定第二对晶体管是否导通，以及耦合到所述放电装置的第四端子; 以及熔丝器件，其具有耦合到双稳态器件的熔丝，所述熔断器通过所述熔丝是否被烧坏来决定所述一对互补信号对的逻辑值。

60. 发明授权

US6166974A Dynamic precharge redundant circuit for semiconductor memory device 有权
标题翻译：半导体存储器件的动态预充电冗余电路
公开(公告)号：US6166974A
公开(公告)日：2000-12-26
申请号：US429595
申请日：1999-10-28
申请人： Chia-Yi Hsien , Chih-Cheng Chen , Hon-Shing Lau
发明人： Chia-Yi Hsien , Chih-Cheng Chen , Hon-Shing Lau
IPC分类号： G11C7/12 , G11C17/18 , G11C7/00
CPC分类号： G11C17/18 , G11C7/12
摘要： A dynamic precharge redundant circuit for a semiconductor memory device. A PMOS transistor, a fuse, a first, second and third inverters, a first switch and a second switch are applied. A source of the PMOS transistor is coupled to a voltage supply, while a gate of the PMOS transistor is to receive a precharge signal. The fuse has a ground terminal and a terminal coupled to the drain of the PMOS transistor of which the drain is further coupled to an input terminal of the first inverter. The fuse is also coupled to a column address signal. The first inverter has an output terminal coupled to an input terminal of the first switch. The second inverter has an input terminal coupled to an output terminal of the first switch and an output terminal coupled to an input terminal of the third inverter, so as to output a bit-switch control signal. An input terminal of the second switch is coupled to an output terminal of the third inverter, while an output terminal of the second switch is coupled to both the output terminal of the first switch and the input terminal of the second inverter. Thus, an error caused by the generation of an interference signal of the bit-switch control signal is prevented, so as to prevent from damaging data of the bit line sense amplifier.
摘要翻译：一种用于半导体存储器件的动态预充电冗余电路。 PMOS晶体管，熔丝，第一，第二和第三反相器，第一开关和第二开关被施加。 PMOS晶体管的源极耦合到电压源，而PMOS晶体管的栅极将接收预充电信号。保险丝具有接地端子和耦合到PMOS晶体管的漏极的端子，漏极还耦合到第一反相器的输入端子。保险丝也耦合到列地址信号。第一反相器具有耦合到第一开关的输入端的输出端。第二反相器具有耦合到第一开关的输出端子的输入端子和耦合到第三反相器的输入端子的输出端子，以便输出位开关控制信号。第二开关的输入端耦合到第三反相器的输出端，而第二开关的输出端耦合到第一开关的输出端和第二反相器的输入端。因此，防止了由位开关控制信号的干扰信号的产生引起的误差，从而防止位线读出放大器的数据损坏。

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