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51. 发明申请

US20070228260A1 Previous amplifier circuit, light-receiving amplifier circuit, and optical pickup apparatus 失效
标题翻译：以前的放大器电路，光接收放大器电路和光学拾取装置
公开(公告)号：US20070228260A1
公开(公告)日：2007-10-04
申请号：US11710506
申请日：2007-02-26
申请人： Takashi Yokoyama
发明人： Takashi Yokoyama
IPC分类号： H01L31/00
CPC分类号： G11B7/131 , H03F3/08
摘要： A previous amplifier circuit of the present invention includes: a grounded emitter amplifier circuit using a grounded emitter transistor connected to a light receiving device; another grounded emitter amplifier circuit using another grounded emitter transistor connected to another light receiving device; and a grounded emitter changing switch to be switched in a manner such that an emitter of the grounded emitter transistors is grounded so as to cause only one of the grounded emitter amplifier circuits to operate. A light-receiving amplifier circuit includes the previous amplifier circuit. An optical pickup apparatus includes the light-receiving amplifier circuit.
摘要翻译：本发明的先前的放大器电路包括：使用连接到光接收装置的接地发射极晶体管的接地发射极放大器电路; 另一接地发射极放大器电路，使用另一接地发射极晶体管连接到另一光接收装置; 以及接地发射极改变开关，以使得接地的发射极晶体管的发射极接地，从而仅使一个接地的发射极放大器电路工作。光接收放大器电路包括先前的放大器电路。光拾取装置包括光接收放大器电路。

52. 发明申请

US20060289942A1 Memory cell, semiconductor memory device, and method of manufacturing the same 有权
公开(公告)号：US20060289942A1
公开(公告)日：2006-12-28
申请号：US11474414
申请日：2006-06-26
申请人： Shinji Horii , Takashi Yokoyama , Tetsuya Ohnishi
发明人： Shinji Horii , Takashi Yokoyama , Tetsuya Ohnishi
IPC分类号： H01L29/76 , H01L21/8238
CPC分类号： H01L27/101 , H01L27/2445 , H01L27/2463 , H01L45/04 , H01L45/1233 , H01L45/1253 , H01L45/147 , H01L45/1675 , H01L45/1683 , H01L2924/0002 , H01L2924/00
摘要： A memory cell in a semiconductor memory device comprises a variable resistor element configured so that a variable resistor body is sandwiched between a first electrode and a second electrode, and a transistor element capable of controlling a flow of current in the variable resistor element, wherein the transistor element and the variable resistor element are placed one over the other along a direction in which the first electrode, the variable resistor body, and the second electrode of the variable resistor element are layered, and one of the first electrode and the second electrode of the variable resistor element is connected to one electrode of the transistor element.

53. 发明申请

US20050285424A1 Retractable seat device 有权
标题翻译：伸缩式座椅装置
公开(公告)号：US20050285424A1
公开(公告)日：2005-12-29
申请号：US11166204
申请日：2005-06-27
申请人： Takashi Yokoyama , Naoaki Hoshihara
发明人： Takashi Yokoyama , Naoaki Hoshihara
IPC分类号： B60N2/015 , B60N2/30 , B60R5/04 , B60R7/04
CPC分类号： B60N2/309 , B60N2/01516 , B60N2/3011 , B60N2/3065 , B60N2/3079
摘要： A retractable seat device includes a seat body having first and second ends rotatably connected to rear and front legs, respectively, first and second arms, and a link. When the first arm is rotated in a second direction, the rear leg and the front leg connected to the rear leg with the link are unfolded, a rear lock mechanism provided on the rear leg becomes engaged with a first striker provided on the vehicle floor, and then a front lock mechanism provided on the front leg becomes engaged with a second striker provided on the vehicle floor, so that the seat body is supported on the vehicle floor by the rear leg and the front leg. The rear lock mechanism has an interlock structure including a ratchet and a pawl, and the front lock mechanism has a hook lock structure including a hook.
摘要翻译：可伸缩座椅装置包括座体，其具有第一和第二端，第一和第二端分别可旋转地连接到后腿和前腿，第一和第二臂以及连杆。当第一臂沿第二方向旋转时，后腿和连接到后腿的前腿与链节被展开，设置在后腿上的后锁定机构与设置在车辆地板上的第一撞杆啮合，然后设置在前腿上的前锁定机构与设置在车辆地板上的第二撞杆接合，使得座椅主体通过后腿和前腿支撑在车辆地板上。后锁定机构具有包括棘轮和棘爪的互锁结构，前锁定机构具有包括钩的钩锁结构。

54. 发明授权

US06933556B2 Semiconductor memory with gate at least partially located in recess defined in vertically oriented semiconductor layer 有权
标题翻译：栅极的半导体存储器至少部分地位于垂直取向的半导体层中限定的凹部中
公开(公告)号：US06933556B2
公开(公告)日：2005-08-23
申请号：US10174903
申请日：2002-06-20
申请人： Tetsuo Endoh , Fujio Masuoka , Takuji Tanigami , Takashi Yokoyama , Noboru Takeuchi
发明人： Tetsuo Endoh , Fujio Masuoka , Takuji Tanigami , Takashi Yokoyama , Noboru Takeuchi
IPC分类号： H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L29/7926 , H01L27/115 , H01L27/11556 , H01L27/11568 , H01L29/7881 , H01L29/792
摘要： A semiconductor memory comprises: a first conductivity type semiconductor substrate and one or more memory cells each constituted of an island-like semiconductor layer having a recess on a sidewall thereof, a charge storage layer formed to entirely or partially encircle a sidewall of the island-like semiconductor layer, and a control gate formed on the charge storage layer, wherein at least one charge storage layer of said one or more memory cells is partially situated within the recess formed on the sidewall of the island-like semiconductor layer.
摘要翻译：半导体存储器包括：第一导电型半导体衬底和一个或多个存储单元，每个存储单元由在其侧壁上具有凹部的岛状半导体层构成，电荷存储层，形成为完全或部分地环绕岛状半导体层的侧壁，形成在电荷存储层上的控制栅极，其中所述一个或多个存储单元的至少一个电荷存储层部分位于形成在岛状半导体层的侧壁上的凹槽内。

55. 发明申请

US20050157722A1 Access user management system and access user management apparatus 审中-公开
标题翻译：访问用户管理系统和访问用户管理设备
公开(公告)号：US20050157722A1
公开(公告)日：2005-07-21
申请号：US10894061
申请日：2004-07-20
申请人： Tetsuro Yoshimoto , Masatoshi Takihiro , Takashi Yokoyama
发明人： Tetsuro Yoshimoto , Masatoshi Takihiro , Takashi Yokoyama
IPC分类号： G06F21/00 , G06F21/31 , H04L12/24 , H04L12/26 , H04L12/28 , H04L12/66 , H04L12/70 , H04L29/06 , H04L12/56
CPC分类号： H04L12/56 , H04L12/2856 , H04L12/2859 , H04L41/0813 , H04L43/0811 , H04L63/08 , H04L63/20 , H04L69/16 , H04L69/168
摘要： A server having a function of authenticating a user, a function of confirming a connection state of the user by periodically transmitting a re-authentication request packet or a connection confirmation packet to the user and receiving a response, and a function of setting policy routing of an access server is used. A terminal communicates with the server instead of a Web browser to perform authentication at the initial start-up stage, and activates a client for responding to the re-authentication request packet or connection confirmation packet to thereby retain the connection state. Alternatively, a server having a function of authenticating a user is installed at the position of the authentication Web server. The terminal communicates with the server instead of the Web browser to perform authentication at the initial start-up stage, and a client for periodically performing authentication is activated thereafter to thereby retain the connection state.
摘要翻译：具有对用户进行认证的功能的服务器，通过周期性地向用户发送再认证请求包或连接确认包并接收响应来确认用户的连接状态的功能，以及设置策略路由的功能使用访问服务器。终端与服务器而不是Web浏览器进行通信，以在初始启动阶段进行认证，并激活客户机以响应重新认证请求分组或连接确认分组，从而保持连接状态。或者，具有认证用户功能的服务器被安装在认证Web服务器的位置。终端与服务器而不是Web浏览器进行通信，以在初始启动阶段进行认证，然后激活用于周期性地执行认证的客户端，从而保持连接状态。

56. 发明申请

US20050037621A1 Etching method for semiconductor device 审中-公开
标题翻译：半导体器件蚀刻方法
公开(公告)号：US20050037621A1
公开(公告)日：2005-02-17
申请号：US10917043
申请日：2004-08-11
申请人： Fujio Masuoka , Shinji Horii , Takuji Tanigami , Takashi Yokoyama
发明人： Fujio Masuoka , Shinji Horii , Takuji Tanigami , Takashi Yokoyama
IPC分类号： H01J37/32 , H01L21/302 , H01L21/3065 , H01L21/311 , H01L21/3213 , H01L21/425
CPC分类号： H01L21/32136 , H01L21/3065 , H01L21/31116 , H01L21/32137
摘要： An etching method for a semiconductor device comprising the steps of: generating an etching species atmosphere above the semiconductor device having a step composed of a main surface and a sidewall; and applying an electric field to accelerate the etching species in one direction and a magnetic field along a plane that crosses the one direction at a specific angle so that the sidewall is etched.
摘要翻译：一种用于半导体器件的蚀刻方法，包括以下步骤：在具有由主表面和侧壁构成的台阶的半导体器件之上产生蚀刻物质气氛; 以及施加电场以沿一个方向加速蚀刻物质和沿着与特定角度穿过所述一个方向的平面的磁场，使得侧壁被蚀刻。

57. 发明授权

US06821687B2 Photo mask for fabricating semiconductor device having dual damascene structure 有权
标题翻译：用于制造具有双镶嵌结构的半导体器件的光掩模
公开(公告)号：US06821687B2
公开(公告)日：2004-11-23
申请号：US10112716
申请日：2002-04-02
申请人： Nobuaki Hamanaka , Takashi Yokoyama , Kazutoshi Shiba , Noriaki Oda
发明人： Nobuaki Hamanaka , Takashi Yokoyama , Kazutoshi Shiba , Noriaki Oda
IPC分类号： G03F900
CPC分类号： G03F9/7076 , G03F1/42 , H01L21/76807 , H01L2221/1036
摘要： A photo mask for fabricating a semiconductor device having a dual damascene structure which has a via coupled with a lower wiring layer and has an upper wiring layer coupled with the via. The via and the upper wiring layer are fabricated by filling a via hole and a wiring groove formed in an interlayer insulating film that is formed on the lower wiring layer with a wiring material. The photo mask has a via alignment mark which is used for aligning the via hole with respect to the lower wiring layer and/or a via alignment mark which is used for aligning the wiring groove with respect to the via hole. The width of the via alignment mark is equal to or larger than the width which is optically detectable and an aspect ratio of the via alignment mark is equal to or larger than one fourth of the aspect ratio of the via hole. Preferably, the width of the via alignment mark is equal to or larger than the width of the via hole.
摘要翻译：一种用于制造具有双镶嵌结构的半导体器件的光掩模，其具有与下布线层耦合的通孔，并且具有与通孔耦合的上布线层。通孔和上部布线层通过在布线层下方填充形成在层间绝缘膜上的通孔和布线槽来制造。光掩模具有用于使通孔相对于下布线层对准的通孔对准标记和/或用于使布线槽相对于通孔对准的通孔对准标记。通孔对准标记的宽度等于或大于可光学检测的宽度，并且通孔对准标记的纵横比等于或大于通孔的纵横比的四分之一。优选地，通孔对准标记的宽度等于或大于通孔的宽度。

58. 发明授权

US06795414B1 Communication system 有权
标题翻译：通讯系统
公开(公告)号：US06795414B1
公开(公告)日：2004-09-21
申请号：US09906677
申请日：2001-07-18
申请人： Kenichi Sakamoto , Tsutomu Kusaki , Masaru Murakami , Takashi Yokoyama
发明人： Kenichi Sakamoto , Tsutomu Kusaki , Masaru Murakami , Takashi Yokoyama
IPC分类号： H04Q700
CPC分类号： H04B7/022 , H04W36/18
摘要： A communication system includes a control unit, a switch and a diversity hand-over processing unit connected to the control unit and the switch for receiving both a first communication signal received from a radio base station which outputs the hand-over instruction, and a second communication signal received from another radio base station to which the communication signal will be hand-over so as to output one of the first and second communication signals to the associated interface circuit. The diversity hand-over processing unit transmits the communication signal received through the radio base station from the mobile station on the reception side for communication to both the interface circuit associated with the radio base station as a source of hand-over and the interface circuit associated with the radio base station as a destination of hand-over.
摘要翻译：通信系统包括：控制单元，开关和分配移交处理单元，连接到控制单元和开关，用于接收从输出切换指令的无线电基站接收的第一通信信号;以及第二从另一无线电基站接收到通信信号的通信信号，通信信号将被切换到其中，以将第一和第二通信信号中的一个输出到相关联的接口电路。分集处理单元将从无线基站接收到的通信信号从接收侧的移动台发送到与无线基站相关联的接口电路作为切换源，并且接口电路相关联以无线电基站为切换目的地。

59. 发明授权

US06593659B2 Dual damascene structure with carbon containing SiO2 dielectric layers 失效
标题翻译：具有含SiO 2介电层的双镶嵌结构
公开(公告)号：US06593659B2
公开(公告)日：2003-07-15
申请号：US09837683
申请日：2001-04-18
申请人： Takashi Yokoyama
发明人： Takashi Yokoyama
IPC分类号： H01L2348
CPC分类号： H01L21/76829 , H01L21/02126 , H01L21/02131 , H01L21/02134 , H01L21/02164 , H01L21/022 , H01L21/02274 , H01L21/02282 , H01L21/31633 , H01L21/76801 , H01L21/76807 , H01L21/7681 , H01L21/76834 , H01L2221/1036
摘要： A semiconductor device with dual damascene structure is provided, which suppresses propagation delay of signals without using complicated processes. The device comprises a semiconductor substrate having a lower wiring layer and electronic elements, a first dielectric layer on the substrate, a second dielectric layer on the first dielectric layer made of carbon-containing SiO2, a third dielectric layer on the second dielectric layer, a fourth dielectric layer on the third dielectric layer made of carbon containing SiO2, the first and second dielectric layers having a via hole, the third dielectric layer having a recess overlapping the via hole, the recess formed to communicate with the via hole, a metal plug formed in the via hole in contact with the lower wiring layer or the electronic elements in the substrate, a metal wiring layer formed in the recess, and a fourth dielectric layer to cover the metal wiring layer.
摘要翻译：提供了具有双镶嵌结构的半导体器件，其抑制信号的传播延迟而不使用复杂的工艺。该器件包括具有下布线层和电子元件的半导体衬底，衬底上的第一介电层，由含碳SiO 2制成的第一电介质层上的第二电介质层，第二电介质层上的第三介电层，所述第三电介质层由含有SiO 2的碳制成的第三电介质层，所述第一和第二电介质层具有通孔，所述第三电介质层具有与所述通孔重叠的凹部，所述凹部与所述通孔连通，金属插塞形成在与下布线层或基板中的电子元件接触的通孔中，形成在凹部中的金属布线层和覆盖金属布线层的第四介电层。

60. 发明授权

US06479407B2 Semiconductor device and process for producing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06479407B2
公开(公告)日：2002-11-12
申请号：US09770114
申请日：2001-01-23
申请人： Takashi Yokoyama , Tatsuya Usami
发明人： Takashi Yokoyama , Tatsuya Usami
IPC分类号： H01L2131
CPC分类号： H01L21/76834 , H01L21/76801 , H01L21/76802 , H01L21/76814 , H01L21/76826 , H01L21/76828 , H01L21/76831 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： An interlayer insulation film containing a dielectric component represented by a chemical formula having a Si—E bond or a Si—CH3 bond is formed on a substrate. Next, a photoresist is formed on the interlayer insulation film. The photoresist is then formed into a form of a contact hole. Thereafter, dry-etching of the interlayer insulation film is conducted by use of the photoresist as a mask. Subsequently, the photoresist is removed, and the interlayer insulation film is exposed to nitrogen plasma and hydrogen plasma, for example.
摘要翻译：在基板上形成含有由具有Si-E键或Si-CH3键的化学式表示的电介质成分的层间绝缘膜。接着，在层间绝缘膜上形成光致抗蚀剂。然后将光致抗蚀剂形成为接触孔的形式。此后，通过使用光致抗蚀剂作为掩模进行层间绝缘膜的干法蚀刻。随后，除去光致抗蚀剂，并且例如将层间绝缘膜暴露于氮等离子体和氢等离子体。

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