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51. 发明授权

US08345458B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08345458B2
公开(公告)日：2013-01-01
申请号：US13293194
申请日：2011-11-10
申请人： Masaki Shiraishi , Noboru Akiyama , Tomoaki Uno , Nobuyoshi Matsuura
发明人： Masaki Shiraishi , Noboru Akiyama , Tomoaki Uno , Nobuyoshi Matsuura
IPC分类号： H02M1/10 , H01L23/48 , H05K7/02
CPC分类号： G05F3/08 , H01L23/3107 , H01L23/4824 , H01L23/49551 , H01L23/49562 , H01L23/49575 , H01L24/06 , H01L24/37 , H01L24/40 , H01L24/41 , H01L24/45 , H01L24/48 , H01L24/49 , H01L25/072 , H01L25/16 , H01L29/1095 , H01L29/4175 , H01L29/41758 , H01L29/41766 , H01L29/4238 , H01L29/7811 , H01L29/7813 , H01L29/7835 , H01L2224/05554 , H01L2224/05644 , H01L2224/05647 , H01L2224/0603 , H01L2224/371 , H01L2224/37124 , H01L2224/37147 , H01L2224/40095 , H01L2224/40245 , H01L2224/40247 , H01L2224/45144 , H01L2224/48091 , H01L2224/48095 , H01L2224/48137 , H01L2224/48247 , H01L2224/48644 , H01L2224/48647 , H01L2224/49111 , H01L2224/49171 , H01L2224/49175 , H01L2224/49431 , H01L2224/73221 , H01L2224/84801 , H01L2224/8485 , H01L2224/85375 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/0102 , H01L2924/01022 , H01L2924/01023 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01051 , H01L2924/01056 , H01L2924/01059 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01083 , H01L2924/014 , H01L2924/07802 , H01L2924/12032 , H01L2924/12036 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/19041 , H01L2924/19105 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H02M7/003 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： In order to reduce parasitic inductance of a main circuit in a power supply circuit, a non-insulated DC-DC converter is provided having a circuit in which a power MOS•FET for a high-side switch and a power MOS•FET for a low-side switch are connected in series. In the non-insulated DC-DC converter, the power MOS•FET for the high-side switch is formed by a p channel vertical MOS•FET, and the power MOS•FET for the low-side switch is formed by an n channel vertical MOS•FET. Thus, a semiconductor chip formed with the power MOS•FET for the high-side switch and a semiconductor chip formed with the power MOS•FET for the low-side switch are mounted over the same die pad and electrically connected to each other through the die pad.
摘要翻译：为了减少电源电路中的主电路的寄生电感，提供了一种非绝缘DC-DC转换器，其具有电路，其中用于高侧开关的功率MOS•FET和功率MOS•FET用于低侧开关串联连接。在非绝缘DC-DC转换器中，高侧开关的功率MOS•FET由ap沟道垂直MOS•FET形成，低边开关功率MOS•FET由n沟道垂直 MOS•FET。因此，形成有用于高侧开关的功率MOS·FET的半导体芯片和形成有用于低侧开关的功率MOS·FET的半导体芯片安装在相同的芯片焊盘上，并且通过芯片垫

52. 发明授权

US08125206B2 Semiconductor device and power supply using the same 有权
标题翻译：半导体器件和电源使用相同
公开(公告)号：US08125206B2
公开(公告)日：2012-02-28
申请号：US12143305
申请日：2008-06-20
申请人： Noboru Akiyama , Takayuki Hashimoto , Takashi Hirao , Koji Tateno
发明人： Noboru Akiyama , Takayuki Hashimoto , Takashi Hirao , Koji Tateno
IPC分类号： G05F1/40
CPC分类号： H02M3/1588 , Y02B70/1466
摘要： A power-supply control IC is included in a switching power supply which drives to turn on and off a semiconductor switching device connected to a DC power supply in series to supply a predetermined constant voltage to an external load, and is a semiconductor device including a semiconductor circuit which controls on and off of the semiconductor switching device. When a current flowing through the load is abruptly increased to cause an error voltage to exceed a predetermined first threshold voltage after the end of a PWM on-pulse generated in synchronization with a switching cycle, a second PWM on-pulse is generated within the same switching cycle. Furthermore, in a plurality of switching cycles after the switching cycle in which the second PWM on-pulse is generated, the first threshold voltage for comparison with the error voltage is switched to a second threshold voltage higher than the first threshold voltage.
摘要翻译：电源控制IC包括在开关电源中，该开关电源驱动以串联连接到直流电源的半导体开关装置，以向外部负载提供预定的恒定电压，并且是包括控制半导体开关器件的导通和截止的半导体电路。当流过负载的电流突然增加以在与开关周期同步产生的PWM导通脉冲结束之后导致误差电压超过预定的第一阈值电压时，在同一时间内产生第二PWM导通脉冲开关周期。此外，在产生第二PWM导通脉冲的开关周期之后的多个开关周期中，与误差电压进行比较的第一阈值电压被切换到高于第一阈值电压的第二阈值电压。

53. 发明授权

US08064235B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08064235B2
公开(公告)日：2011-11-22
申请号：US12912796
申请日：2010-10-27
申请人： Masaki Shiraishi , Noboru Akiyama , Tomoaki Uno , Nobuyoshi Matsuura
发明人： Masaki Shiraishi , Noboru Akiyama , Tomoaki Uno , Nobuyoshi Matsuura
IPC分类号： H02M1/00 , H01L23/48 , H05K7/02
CPC分类号： G05F3/08 , H01L23/3107 , H01L23/4824 , H01L23/49551 , H01L23/49562 , H01L23/49575 , H01L24/06 , H01L24/37 , H01L24/40 , H01L24/41 , H01L24/45 , H01L24/48 , H01L24/49 , H01L25/072 , H01L25/16 , H01L29/1095 , H01L29/4175 , H01L29/41758 , H01L29/41766 , H01L29/4238 , H01L29/7811 , H01L29/7813 , H01L29/7835 , H01L2224/05554 , H01L2224/05644 , H01L2224/05647 , H01L2224/0603 , H01L2224/371 , H01L2224/37124 , H01L2224/37147 , H01L2224/40095 , H01L2224/40245 , H01L2224/40247 , H01L2224/45144 , H01L2224/48091 , H01L2224/48095 , H01L2224/48137 , H01L2224/48247 , H01L2224/48644 , H01L2224/48647 , H01L2224/49111 , H01L2224/49171 , H01L2224/49175 , H01L2224/49431 , H01L2224/73221 , H01L2224/84801 , H01L2224/8485 , H01L2224/85375 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/0102 , H01L2924/01022 , H01L2924/01023 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01051 , H01L2924/01056 , H01L2924/01059 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01083 , H01L2924/014 , H01L2924/07802 , H01L2924/12032 , H01L2924/12036 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/19041 , H01L2924/19105 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H02M7/003 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： In order to reduce parasitic inductance of a main circuit in a power supply circuit, a non-insulated DC-DC converter is provided including a circuit in which a power MOS•FET for a high-side switch and a power MOS•FET for a low-side switch are connected in series. In the non-insulated DC-DC converter, the power MOS•FET for the high-side switch is formed by a p-channel vertical MOS•FET, and the power MOS•FET for the low-side switch is formed by an n channel vertical MOS•FET. Thus, a semiconductor chip formed with the power MOS•FET for the high-side switch and a semiconductor chip formed with the power MOS•FET for the low-side switch are mounted over the same die pad and electrically connected to each other through the die pad.
摘要翻译：为了减少电源电路中的主电路的寄生电感，提供了一种非绝缘DC-DC转换器，其包括其中用于高侧开关的功率MOS•FET和功率MOS•FET用于低侧开关串联连接。在非绝缘DC-DC转换器中，高侧开关的功率MOS•FET由p沟道垂直MOS•FET形成，而低边开关的功率MOS•FET由n形成通道垂直MOS•FET。因此，形成有用于高侧开关的功率MOS·FET的半导体芯片和形成有用于低侧开关的功率MOS·FET的半导体芯片安装在相同的芯片焊盘上，并且通过芯片垫

54. 发明授权

US08044520B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08044520B2
公开(公告)日：2011-10-25
申请号：US11624767
申请日：2007-01-19
申请人： Noboru Akiyama , Takayuki Hashimoto , Masaki Shiraishi , Tetsuya Kawashima , Koji Tateno , Nobuyoshi Matsuura
发明人： Noboru Akiyama , Takayuki Hashimoto , Masaki Shiraishi , Tetsuya Kawashima , Koji Tateno , Nobuyoshi Matsuura
IPC分类号： H01L23/52 , H01L29/40
CPC分类号： H01L25/16 , H01L24/37 , H01L24/40 , H01L2224/05554 , H01L2224/37124 , H01L2224/37147 , H01L2224/40245 , H01L2224/40247 , H01L2224/45144 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/48472 , H01L2224/49171 , H01L2224/49175 , H01L2224/73221 , H01L2224/8385 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/19105 , H01L2924/30107 , H02M3/1588 , H03K17/08142 , H03K17/162 , H03K17/6871 , H03K2217/0036 , Y02B70/1466 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A power supply capable of reducing loss of large current and high frequency. In an MCM for power supply in which a high-side power MOSFET chip, a low-side power MOSFET chip and a driver IC chip driving them are sealed in one sealing material (a capsulating insulation resin), a wiring length of a wiring DL connecting an output terminal of the driver IC chip to a gate terminal of the low-side power MOSFET chip or a source terminal is made shorter than a wiring length of a wiring DH connecting the output terminal of the driver IC chip to a gate terminal of the high-side power MOSFET chip or a source terminal. Further, the number of the wiring DL is made larger than the number of the wiring DH.
摘要翻译：一种能够减少大电流和高频损耗的电源。在用于电源的MCM中，高边功率MOSFET芯片，低边功率MOSFET芯片和驱动IC芯片驱动它们被密封在一个密封材料（封装绝缘树脂）中，布线DL的布线长度将驱动IC芯片的输出端子与低边功率MOSFET芯片的栅极端子或源极端子连接的时间短于连接驱动器IC芯片的输出端子与栅极端子的布线DH的布线长度高端功率MOSFET芯片或源极端子。此外，使布线数量DL大于布线数量DH。

55. 发明授权

US07928505B2 Semiconductor device with vertical trench and lightly doped region 失效
标题翻译：具有垂直沟槽和轻掺杂区域的半导体器件
公开(公告)号：US07928505B2
公开(公告)日：2011-04-19
申请号：US12326392
申请日：2008-12-02
申请人： Takashi Hirao , Takayuki Hashimoto , Noboru Akiyama
发明人： Takashi Hirao , Takayuki Hashimoto , Noboru Akiyama
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/7802 , H01L29/0696 , H01L29/0878 , H01L29/1095 , H01L29/407 , H01L29/41741 , H01L29/42368 , H01L29/66727 , H01L29/66734 , H01L29/7813
摘要： The vertical trench MOSFET comprises: an N type epitaxial region formed on an upper surface of an N+ type substrate having a drain electrode on a lower surface thereof; a gate trench extending from a front surface into the N type epitaxial region; a gate electrode positioned in the gate trench so as to interpose an insulator; a channel region formed on the N type epitaxial region; a source region formed on the channel region; a source electrode formed on the source region; a source trench extending from the front surface into the N type epitaxial region; and a trench-buried source electrode positioned in the source trench so as to interpose an insulator, wherein the source electrode contacts with the trench-buried source electrode.
摘要翻译：垂直沟槽MOSFET包括：形成在其下表面上具有漏电极的N +型衬底的上表面上的N型外延区域; 栅极沟槽，其从前表面延伸到N型外延区域; 位于所述栅极沟槽中以便插入绝缘体的栅电极; 形成在N型外延区上的沟道区; 形成在沟道区上的源极区; 形成在源极区上的源电极; 源极沟槽，其从前表面延伸到N型外延区域; 以及位于所述源极沟槽中以便插入绝缘体的沟槽埋入式源电极，其中所述源电极与所述沟槽埋入式源极接触。

56. 发明授权

US07821243B2 DC/DC converter 有权
标题翻译： DC / DC转换器
公开(公告)号：US07821243B2
公开(公告)日：2010-10-26
申请号：US11624837
申请日：2007-01-19
申请人： Masaki Shiraishi , Takayuki Hashimoto , Noboru Akiyama
发明人： Masaki Shiraishi , Takayuki Hashimoto , Noboru Akiyama
IPC分类号： G05F1/595
CPC分类号： H02M1/08 , H01L24/48 , H01L24/49 , H01L2224/48137 , H01L2224/48247 , H01L2224/49175 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01082 , H01L2924/12032 , H01L2924/12036 , H01L2924/13091 , H01L2924/14 , H01L2924/30107 , H03K17/0822 , H03K17/165 , H03K17/166 , H03K17/6871 , H01L2924/00 , H01L2224/45099
摘要： In a non-isolated DC/DC converter, a reference potential for a low-side pre-driver which drives a gate of a low-side MOSFET is applied from a portion except for a main circuit passing through a high-side MOSFET and the low-side MOSFET so that a parasitic inductance between a source of the low-side MOSFET and the pre-driver is increased without increasing the sum of parasitic inductances in the main circuit and negative potential driving of the gate of the low-side MOSFET can be performed and a self turn-on phenomenon can be prevented without adding any member and changing drive system.
摘要翻译：在非隔离型DC / DC转换器中，从通过高侧MOSFET的主电路以外的部分施加驱动低侧MOSFET的栅极的低侧预驱动器的基准电位，低侧MOSFET，使得低侧MOSFET的源极与预驱动器之间的寄生电感增加，而不增加主电路中的寄生电感的和，并且低侧MOSFET的栅极的负电位驱动并且可以防止在不添加任何构件和改变驱动系统的情况下自启闭现象。

57. 发明申请

US20090207640A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20090207640A1
公开(公告)日：2009-08-20
申请号：US12430972
申请日：2009-04-28
申请人： Masaki Shiraishi , Noboru Akiyama , Tomoaki Uno , Nobuyoshi Matsuura
发明人： Masaki Shiraishi , Noboru Akiyama , Tomoaki Uno , Nobuyoshi Matsuura
IPC分类号： H02M1/00 , H01L23/48
CPC分类号： G05F3/08 , H01L23/3107 , H01L23/4824 , H01L23/49551 , H01L23/49562 , H01L23/49575 , H01L24/06 , H01L24/37 , H01L24/40 , H01L24/41 , H01L24/45 , H01L24/48 , H01L24/49 , H01L25/072 , H01L25/16 , H01L29/1095 , H01L29/4175 , H01L29/41758 , H01L29/41766 , H01L29/4238 , H01L29/7811 , H01L29/7813 , H01L29/7835 , H01L2224/05554 , H01L2224/05644 , H01L2224/05647 , H01L2224/0603 , H01L2224/371 , H01L2224/37124 , H01L2224/37147 , H01L2224/40095 , H01L2224/40245 , H01L2224/40247 , H01L2224/45144 , H01L2224/48091 , H01L2224/48095 , H01L2224/48137 , H01L2224/48247 , H01L2224/48644 , H01L2224/48647 , H01L2224/49111 , H01L2224/49171 , H01L2224/49175 , H01L2224/49431 , H01L2224/73221 , H01L2224/84801 , H01L2224/8485 , H01L2224/85375 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/0102 , H01L2924/01022 , H01L2924/01023 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01051 , H01L2924/01056 , H01L2924/01059 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01083 , H01L2924/014 , H01L2924/07802 , H01L2924/12032 , H01L2924/12036 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/19041 , H01L2924/19105 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H02M7/003 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： The object of the present invention is to reduce parasitic inductance of a main circuit in a power supply circuit. The present invention provides a non-insulated DC-DC converter having a circuit in which a power MOS*FET for a high-side switch and a power MOS*FET for a low-side switch are connected in series. In the non-insulated DC-DC converter, the power MOS*FET for the high-side switch is formed by a p channel vertical MOS*FET, and the power MOS*FET for the low-side switch is formed by an n channel vertical MOS*FET. Thus, a semiconductor chip formed with the power MOS*FET for the high-side switch and a semiconductor chip formed with the power MOS*FET for the low-side switch are mounted over the same die pad and electrically connected to each other through the die pad.
摘要翻译：本发明的目的是减少电源电路中的主电路的寄生电感。本发明提供了一种非绝缘DC-DC转换器，其具有用于高侧开关的功率MOS * FET和用于低侧开关的功率MOS * FET串联连接的电路。在非绝缘DC-DC转换器中，用于高侧开关的功率MOS * FET由ap沟道垂直MOS * FET形成，低边开关的功率MOS * FET由n沟道垂直 MOS * FET。因此，形成有用于高侧开关的功率MOS * FET和形成有用于低侧开关的功率MOS * FET的半导体芯片的半导体芯片安装在相同的芯片焊盘上，并通过芯片垫

58. 发明申请

US20090145147A1 INDOOR AND OUTDOOR UNIT COMMUNICATION VIA SIGNAL FROM A POWER LINE 失效
标题翻译：来自电力线的信号的室内和室外通信
公开(公告)号：US20090145147A1
公开(公告)日：2009-06-11
申请号：US12368681
申请日：2009-02-10
申请人： Yasuyuki Kojima , Noboru Akiyama , Takeshi Onaka , Tatsumi Yamauchi , Koichi Taniguchi , Koichi Tokushige , Noriyuki Bunkou , Keiji Sato
发明人： Yasuyuki Kojima , Noboru Akiyama , Takeshi Onaka , Tatsumi Yamauchi , Koichi Taniguchi , Koichi Tokushige , Noriyuki Bunkou , Keiji Sato
IPC分类号： G05D23/00 , F25D23/00
CPC分类号： F24F1/0003 , F24F11/30 , F24F11/54
摘要： An air conditioning system is arranged to use a power line for communication. The air conditioning system includes one or more indoor units, one or more outdoor units, and a system controller for controlling the indoor units or outdoor units and executes communications between the indoor units and the outdoor units as overlapping a signal on the power line for supplying electric power. The outdoor units are connected with the system controller through a leased communication line. The indoor unit provides a power line communication device being connected with the power line. The outdoor unit provides a leased communication device being connected with the leased communication line. A bridge is also provided for connecting the leased communication line and the power line. The control information is exchanged mutually between the indoor units, the outdoor units and the system controller through the power line.
摘要翻译：一个空调系统被设置为使用电力线进行通信。空调系统包括一个或多个室内单元，一个或多个室外单元，以及用于控制室内单元或室外单元的系统控制器，并且执行室内单元和室外单元之间的通信，以与用于供应的电力线上的信号重叠电力。室外机通过租用通信线与系统控制器连接。室内机提供与电力线连接的电力线通信装置。户外单元提供与租用通信线路连接的租用通信设备。还提供了用于连接租用通信线路和电力线路的桥梁。控制信息通过电力线在室内机，室外机和系统控制器之间相互交换。

59. 发明申请

US20070278516A1 Semiconductor device and power source unit using the same 有权
标题翻译：半导体器件和电源单元使用相同
公开(公告)号：US20070278516A1
公开(公告)日：2007-12-06
申请号：US11809023
申请日：2007-05-30
申请人： Takayuki Hashimoto , Noboru Akiyama , Masaki Shiraishi , Tetsuya Kawashima
发明人： Takayuki Hashimoto , Noboru Akiyama , Masaki Shiraishi , Tetsuya Kawashima
IPC分类号： H01L31/111
CPC分类号： H01L25/16 , G06F1/26 , H01L24/48 , H01L24/49 , H01L2224/0603 , H01L2224/40 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/49111 , H01L2224/49175 , H01L2924/00014 , H01L2924/01023 , H01L2924/01033 , H01L2924/01074 , H01L2924/01082 , H01L2924/12032 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19105 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/05599
摘要： The present invention provides a technology for reducing the parasitic inductance of the main circuit of a power source unit. In a non-insulated DC-DC converter having a circuit in which a power MOSFET for high side switch and a power MOSFET for low side switch are connected in series, the power MOSFET for high side switch and the power MOSFET for low side switch are formed of n-channel vertical MOSFETS, and a source electrode of the power MOSFET for high side switch and a drain electrode of the power MOSFET for low side switch are electrically connected via the same die pad.
摘要翻译：本发明提供一种降低电源单元的主电路的寄生电感的技术。在具有用于高侧开关的功率MOSFET和低侧开关的功率MOSFET串联的电路的非绝缘DC-DC转换器中，用于高侧开关的功率MOSFET和用于低侧开关的功率MOSFET是由n沟道垂直MOSFETS形成，并且用于高侧开关的功率MOSFET的源极和用于低侧开关的功率MOSFET的漏电极经由相同的管芯焊盘电连接。

60. 发明申请

US20060267193A1 Semiconductor device and communication terminal using thereof 有权
标题翻译：半导体装置及其通信终端
公开(公告)号：US20060267193A1
公开(公告)日：2006-11-30
申请号：US11495585
申请日：2006-07-31
申请人： Noboru Akiyama , Minehiro Nemoto , Seigou Yukutake , Yasuyuki Kojima , Kazuyuki Kamegaki
发明人： Noboru Akiyama , Minehiro Nemoto , Seigou Yukutake , Yasuyuki Kojima , Kazuyuki Kamegaki
IPC分类号： H01L23/34
CPC分类号： H01L23/3107 , H01L23/3121 , H01L23/48 , H01L23/49575 , H01L24/06 , H01L24/48 , H01L24/49 , H01L25/162 , H01L2224/0401 , H01L2224/05554 , H01L2224/05599 , H01L2224/0603 , H01L2224/16 , H01L2224/16225 , H01L2224/16245 , H01L2224/16265 , H01L2224/32245 , H01L2224/48091 , H01L2224/48095 , H01L2224/48137 , H01L2224/48247 , H01L2224/484 , H01L2224/49175 , H01L2224/73207 , H01L2224/73265 , H01L2224/85399 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01074 , H01L2924/014 , H01L2924/10161 , H01L2924/12036 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19104 , H01L2924/3011 , H01L2924/30111 , H01L2224/45099 , H01L2924/00 , H01L2924/00012
摘要： A primary side circuit and a secondary side circuit are provided on first and second semiconductor substrates, respectively. A first capacitive insulator on the first substrate electrically insulates and isolates between the primary and secondary side circuits while permitting signal transmission between these circuits. A second capacitive insulator on the second semiconductor substrate electrically isolates the primary and secondary side circuit while permitting signal transmission therebetween. First and second frames are provided for input and output of signals to and from the primary and secondary side circuits. External electrodes of the first and second capacitive insulators are connected together by a third lead frame via a conductive adhesive body including more than one solder ball. The first and second substrates and the lead frames are sealed by a dielectric resin.
摘要翻译：初级侧电路和次级侧电路分别设置在第一和第二半导体衬底上。第一基板上的第一电容绝缘体在允许这些电路之间的信号传输的同时在一次侧电路和次侧电路之间电绝缘和隔离。第二半导体衬底上的第二电容绝缘体电隔离初级和次级侧电路，同时允许它们之间的信号传输。第一和第二帧被提供用于输入和输出到主电路和次级侧电路的信号。第一和第二电容性绝缘体的外部电极通过包括多于一个焊球的导电粘合体由第三引线框架连接在一起。第一和第二基板和引线框由绝缘树脂密封。

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