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    • 58. 发明授权
    • Method of high density field induced MRAM process
    • 高密度场诱导MRAM过程的方法
    • US07919407B1
    • 2011-04-05
    • US12590945
    • 2009-11-17
    • Tom ZhongWai-Ming Johnson KanDaniel LiuAdam ZhongChyu-Jiuh Torng
    • Tom ZhongWai-Ming Johnson KanDaniel LiuAdam ZhongChyu-Jiuh Torng
    • H01L21/4763
    • H01L21/76807H01L21/76816H01L27/228
    • Described herein are novel, cost effective and scalable methods for integrating a CMOS level with a memory cell level to form a field induced MRAM device. The memory portion of the device includes N parallel word lines, which may be clad, overlaid by M parallel bit lines orthogonal to the word lines and individual patterned memory cells formed on previously patterned electrodes at the N×M intersections of the two sets of lines. The memory portion is integrated with a CMOS level and the connection between levels is facilitated by the formation of interconnecting vias between the N×M electrodes and corresponding pads in the CMOS level and by word line connection pads in the memory device level and corresponding metal pads in the CMOS level. Of particular importance are process steps that replace single damascene formations by dual damascene formations, different process steps for the formation of clad and unclad word lines and the formation of patterned electrodes for the memory cells prior to the patterning of the cells themselves.
    • 这里描述了用于将CMOS电平与存储器单元级集成以形成场感应MRAM器件的新颖的,成本有效的和可扩展的方法。 器件的存储器部分包括N个并行字线,其可以由两条垂直于字线的M个并行位线和在两组线的N×M个交点处形成在先前图案化电极上的各个图案化存储单元重叠 。 存储器部分与CMOS电平集成,并且通过在CMOS电平中的N×M电极和相应焊盘之间的互连通孔以及存储器件级中的字线连接焊盘和对应的金属焊盘 在CMOS级别。 特别重要的是通过双镶嵌结构取代单个镶嵌地层的工艺步骤,用于形成包层和未包层字线的不同工艺步骤以及在细胞本身的图案化之前形成记忆单元的图案化电极。