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51. 发明授权

US08282999B2 Spin-on film processing using acoustic radiation pressure 有权
标题翻译：旋转胶片处理使用声辐射压力
公开(公告)号：US08282999B2
公开(公告)日：2012-10-09
申请号：US12098124
申请日：2008-04-04
申请人： Nishant Sinha , Gurtej S. Sandhu , John Smythe
发明人： Nishant Sinha , Gurtej S. Sandhu , John Smythe
IPC分类号： B05D3/06 , B01J19/10 , B06B1/00 , H01L21/31
CPC分类号： H01L21/02282 , B01D19/0078 , B01F11/0071 , B05C11/02 , B05D1/005 , B05D3/12 , B08B3/12 , G03D3/04 , G03F7/162 , H01L21/31051 , H01L21/31058 , H01L21/312 , H01L21/67017 , H01L21/67092 , H01L21/6715 , H01L21/76819
摘要： An apparatus and process operate to impose sonic pressure upon a spin-on film liquid mass that exhibits a liquid topography and in a solvent vapor overpressure to alter the liquid topography. Other apparatus and processes are disclosed.
摘要翻译：一种装置和方法用于将声波压力施加在展现液体形貌和溶剂蒸汽超压中以改变液体形貌的旋涂膜液体质量上。公开了其他装置和方法。

52. 发明授权

US08278167B2 Method and structure for integrating capacitor-less memory cell with logic 有权
标题翻译：将无电容器存储单元与逻辑集成的方法和结构
公开(公告)号：US08278167B2
公开(公告)日：2012-10-02
申请号：US12338404
申请日：2008-12-18
申请人： Gurtej S. Sandhu
发明人： Gurtej S. Sandhu
IPC分类号： H01L21/8238
CPC分类号： H01L27/10844 , H01L21/84 , H01L27/0688 , H01L27/105 , H01L27/10802 , H01L27/10894 , H01L27/10897 , H01L27/1203
摘要： Methods for fabricating integrated circuits include fabricating a logic device on a substrate, forming an intermediate semiconductor substrate on a surface of the logic device, and fabricating a capacitor-less memory cell on the intermediate semiconductor substrate. Integrated circuits with capacitor-less memory cells formed on a surface of a logic device are also disclosed, as are multi-core microprocessors including such integrated circuits.
摘要翻译：制造集成电路的方法包括在衬底上制造逻辑器件，在逻辑器件的表面上形成中间半导体衬底，以及在中间半导体衬底上制造无电容器的存储单元。还公开了在逻辑器件的表面上形成有无电容器的存储器单元的集成电路，以及包括这种集成电路的多核微处理器。

53. 发明授权

US08273634B2 Methods of fabricating substrates 有权
标题翻译：制造基板的方法
公开(公告)号：US08273634B2
公开(公告)日：2012-09-25
申请号：US12328435
申请日：2008-12-04
申请人： Scott Sills , Gurtej S. Sandhu , Anton deVilliers
发明人： Scott Sills , Gurtej S. Sandhu , Anton deVilliers
IPC分类号： H01L21/331 , H01L21/8222
CPC分类号： H01L21/31138 , H01L21/0273 , H01L21/0337 , H01L21/0338
摘要： A method of fabricating a substrate includes forming first and second spaced features over a substrate. The first spaced features have elevationally outermost regions which are different in composition from elevationally outermost regions of the second spaced features. The first and second spaced features alternate with one another. Every other first feature is removed from the substrate and pairs of immediately adjacent second features are formed which alternate with individual of remaining of the first features. After such act of removing, the substrate is processed through a mask pattern comprising the pairs of immediately adjacent second features which alternate with individual of the remaining of the first features. Other embodiments are disclosed.
摘要翻译：一种制造衬底的方法包括在衬底上形成第一和第二间隔的特征。第一间隔的特征具有与第二间隔特征的垂直最外区域不同的高度最外的区域。第一和第二间隔的特征彼此交替。每个其他第一特征从衬底移除，并且形成直接相邻的第二特征对，其与第一特征的剩余部分的个体交替。在这样的去除动作之后，通过掩模图案来处理衬底，该掩模图案包括与第一特征剩余部分的个体交替的紧邻的第二特征对。公开了其他实施例。

54. 发明授权

US08247302B2 Methods of fabricating substrates 有权
标题翻译：制造基板的方法
公开(公告)号：US08247302B2
公开(公告)日：2012-08-21
申请号：US12328464
申请日：2008-12-04
申请人： Scott Sills , Gurtej S. Sandhu , Anton deVilliers
发明人： Scott Sills , Gurtej S. Sandhu , Anton deVilliers
IPC分类号： H01L21/331 , H01L21/8222
CPC分类号： H01L21/31138 , G03F7/0035 , H01L21/0273 , H01L21/0337 , H01L21/0338
摘要： A method of fabricating a substrate includes forming spaced first features and spaced second features over a substrate. The first and second features alternate with one another and are spaced relative one another. Width of the spaced second features is laterally trimmed to a greater degree than any lateral trimming of width of the spaced first features while laterally trimming width of the spaced second features. After laterally trimming of the second features, spacers are formed on sidewalls of the spaced first features and on sidewalls of the spaced second features. The spacers are of some different composition from that of the spaced first features and from that of the spaced second features. After forming the spacers, the spaced first features and the spaced second features are removed from the substrate. The substrate is processed through a mask pattern comprising the spacers. Other embodiments are disclosed.
摘要翻译：一种制造衬底的方法包括在衬底上形成间隔开的第一特征和间隔开的第二特征。第一和第二特征彼此交替并彼此间隔开。间隔开的第二特征的宽度被横向修剪到比间隔开的第一特征的宽度的任何横向修剪更大的程度，同时横向修剪间隔开的第二特征的宽度。在第二特征的横向修剪之后，间隔物形成在间隔开的第一特征的侧壁上并且在间隔开的第二特征的侧壁上。间隔物与间隔开的第一特征和间隔开的第二特征的间隔物具有不同的组成。在形成间隔物之后，从衬底移除间隔开的第一特征和间隔开的第二特征。通过包括间隔物的掩模图案处理衬底。公开了其他实施例。

55. 发明授权

US08223539B2 GCIB-treated resistive device 有权
标题翻译： GCIB处理电阻器件
公开(公告)号：US08223539B2
公开(公告)日：2012-07-17
申请号：US12693936
申请日：2010-01-26
申请人： John Smythe , Gurtej S. Sandhu
发明人： John Smythe , Gurtej S. Sandhu
IPC分类号： G11C11/34
CPC分类号： H01L45/165 , G11C13/0007 , G11C2213/56 , H01L27/2436 , H01L45/08 , H01L45/1233 , H01L45/145 , H01L45/146 , H01L45/1641 , H01L45/1683
摘要： The present disclosure includes GCIB-treated resistive devices, devices utilizing GCIB-treated resistive devices (e.g., as switches, memory cells), and methods for forming the GCIB-treated resistive devices. One method of forming a GCIB-treated resistive device includes forming a lower electrode, and forming an oxide material on the lower electrode. The oxide material is exposed to a gas cluster ion beam (GCIB) until a change in resistance of a first portion of the oxide material relative to the resistance of a second portion of the oxide material. An upper electrode is formed on the first portion.
摘要翻译：本公开包括GCIB处理的电阻性装置，利用GCIB处理的电阻性装置（例如，作为开关，存储器单元）的装置以及用于形成经GCIB处理的电阻装置的方法。形成GCIB处理的电阻性器件的一种方法包括形成下电极，并在下电极上形成氧化物材料。将氧化物材料暴露于气体簇离子束（GCIB），直到氧化物材料的第一部分的电阻相对于氧化物材料的第二部分的电阻发生变化。上电极形成在第一部分上。

56. 发明授权

US08222127B2 Methods of forming structures having nanotubes extending between opposing electrodes and structures including same 有权
标题翻译：形成具有在相对电极之间延伸的纳米管和包括其的结构的方法
公开(公告)号：US08222127B2
公开(公告)日：2012-07-17
申请号：US12176013
申请日：2008-07-18
申请人： Eugene P. Marsh , Gurtej S. Sandhu
发明人： Eugene P. Marsh , Gurtej S. Sandhu
IPC分类号： H01L21/20 , H01L29/66
CPC分类号： H01L51/0558 , B82Y10/00 , G11C13/025 , H01L21/02527 , H01L21/02606 , H01L21/0262 , H01L21/02639 , H01L21/02645 , H01L29/0665 , H01L29/0673 , H01L29/1606 , H01L29/7781 , H01L29/78 , H01L51/0003 , H01L51/0048 , H01L51/0562
摘要： A semiconductor structure including nanotubes forming an electrical connection between electrodes is disclosed. The semiconductor structure may include an open volume defined by a lower surface of an electrically insulative material and sidewalls of at least a portion of each of a dielectric material and opposing electrodes. The nanotubes may extend between the opposing electrodes, forming a physical and electrical connection therebetween. The nanotubes may be encapsulated within the open volume in the semiconductor structure. A semiconductor structure including nanotubes forming an electrical connection between source and drain regions is also disclosed. The semiconductor structure may include at least one semiconducting carbon nanotube electrically connected to a source and a drain, a dielectric material disposed over the at least one semiconducting carbon nanotube and a gate dielectric overlying a portion of the dielectric material. Methods of forming the semiconductor structures are also disclosed.
摘要翻译：公开了一种包括在电极之间形成电连接的纳米管的半导体结构。半导体结构可以包括由电绝缘材料的下表面限定的开放体积和电介质材料和相对电极中的每一个的至少一部分的侧壁。纳米管可以在相对的电极之间延伸，在它们之间形成物理和电连接。纳米管可以封装在半导体结构中的开放体积内。还公开了包括在源区和漏区之间形成电连接的纳米管的半导体结构。半导体结构可以包括电连接到源极和漏极的至少一个半导体碳纳米管，设置在至少一个半导体碳纳米管上方的电介质材料和覆盖该介电材料的一部分的栅极电介质。还公开了形成半导体结构的方法。

57. 发明授权

US08207016B2 Methods of cooling semiconductor dies 有权
标题翻译：冷却半导体管芯的方法
公开(公告)号：US08207016B2
公开(公告)日：2012-06-26
申请号：US12855562
申请日：2010-08-12
申请人： Chandra Mouli , Gurtej S. Sandhu
发明人： Chandra Mouli , Gurtej S. Sandhu
IPC分类号： H01L21/00
CPC分类号： H01L23/3672 , H01L23/367 , H01L23/373 , H01L23/3733 , H01L2224/16 , H01L2224/73253 , H01L2924/10158 , Y10S977/742
摘要： The invention includes semiconductor packages having grooves within a semiconductor die backside; and includes semiconductor packages utilizing carbon nanostructures (such as, for example, carbon nanotubes) as thermally conductive interface materials. The invention also includes methods of cooling a semiconductor die in which coolant is forced through grooves in a backside of the die, and includes methods of making semiconductor packages.
摘要翻译：本发明包括在半导体模具背面内具有凹槽的半导体封装; 并且包括使用碳纳米结构（例如，碳纳米管）作为导热界面材料的半导体封装。本发明还包括冷却半导体管芯的方法，其中冷却剂被迫通过管芯背面的凹槽，并且包括制造半导体封装件的方法。

58. 发明授权

US08199556B2 Methods of reading and using memory cells 有权
标题翻译：阅读和使用记忆体的方法
公开(公告)号：US08199556B2
公开(公告)日：2012-06-12
申请号：US12564265
申请日：2009-09-22
申请人： Bhaskar Srinivasan , Gurtej S. Sandhu
发明人： Bhaskar Srinivasan , Gurtej S. Sandhu
IPC分类号： G11C11/00
CPC分类号： G11C13/004 , G11C13/0002 , G11C13/0007 , G11C13/0061 , G11C2013/0052 , G11C2213/72
摘要： Some embodiments include methods of reading memory cells. The memory cells have a write operation that occurs only if a voltage of sufficient absolute value is applied for a sufficient duration of time; and the reading is conducted with a pulse that is of too short of a time duration to be sufficient for the write operation. In some embodiments, the pulse utilized for the reading may have an absolute value of voltage that is greater than or equal to the voltage utilized for the write operation. In some embodiments, the memory cells may comprise non-ohmic devices; such as memristors and diodes.
摘要翻译：一些实施例包括读取存储器单元的方法。存储器单元具有写入操作，只有当足够的绝对值的电压施加足够的持续时间时才发生; 并且读取是用太短的持续时间的脉冲来进行的，以足以用于写入操作。在一些实施例中，用于读取的脉冲可以具有大于或等于用于写入操作的电压的绝对值。在一些实施例中，存储器单元可以包括非欧姆器件; 如忆阻器和二极管。

59. 发明申请

US20120088348A1 Methods of Forming Patterns in Semiconductor Constructions, Methods of Forming Container Capacitors, and Methods of Forming Reticles Configured for Imprint Lithography 有权
标题翻译：在半导体结构中形成图案的方法，形成容器电容器的方法和形成用于印刷光刻的网格方法
公开(公告)号：US20120088348A1
公开(公告)日：2012-04-12
申请号：US13330973
申请日：2011-12-20
申请人： Gurtej S. Sandhu
发明人： Gurtej S. Sandhu
IPC分类号： H01L21/02
CPC分类号： H01L28/91 , B82Y10/00 , B82Y40/00 , G03F7/0002 , H01L21/31144 , H01L27/10852
摘要： The invention includes methods of forming reticles configured for imprint lithography, methods of forming capacitor container openings, and methods in which capacitor container openings are incorporated into DRAM arrays. An exemplary method of forming a reticle includes formation of a radiation-imageable layer over a material. A lattice pattern is then formed within the radiation-imageable layer, with the lattice pattern defining a plurality of islands of the radiation-imageable layer. The lattice-patterned radiation-imageable layer is utilized as a mask while subjecting the material under the lattice-patterned layer to an etch which transfers the lattice pattern into the material. The etch forms a plurality of pillars which extend only partially into the material, with the pillars being spaced from one another by gaps. The gaps are subsequently narrowed with a second material which only partially fills the gaps.
摘要翻译：本发明包括形成用于压印光刻的掩模版的方法，形成电容器容器开口的方法，以及将电容器容器开口并入到DRAM阵列中的方法。形成掩模版的示例性方法包括在材料上形成可辐射成像层。然后在可辐射成像层内形成格子图案，其中格子图案限定可辐射成像层的多个岛。将格子图案的可辐射成像层用作掩模，同时使晶格图案层下的材料经历将晶格图案转移到材料中的蚀刻。蚀刻形成多个柱，其仅部分地延伸到材料中，柱通过间隙彼此间隔开。间隙随后仅用部分填充间隙的第二材料变窄。

60. 发明申请

US20120070973A1 Methods of Forming Diodes 有权
标题翻译：形成二极管的方法
公开(公告)号：US20120070973A1
公开(公告)日：2012-03-22
申请号：US13305072
申请日：2011-11-28
申请人： Gurtej S. Sandhu , Bhaskar Srinivasan
发明人： Gurtej S. Sandhu , Bhaskar Srinivasan
IPC分类号： H01L21/04
CPC分类号： H01L21/04 , H01L27/1021 , H01L27/2418 , H01L29/1606 , H01L45/00
摘要： Some embodiments include methods of forming diodes. A stack may be formed over a first conductive material. The stack may include, in ascending order, a sacrificial material, at least one dielectric material, and a second conductive material. Spacers may be formed along opposing sidewalls of the stack, and then an entirety of the sacrificial material may be removed to leave a gap between the first conductive material and the at least one dielectric material. In some embodiments of forming diodes, a layer may be formed over a first conductive material, with the layer containing supports interspersed in sacrificial material. At least one dielectric material may be formed over the layer, and a second conductive material may be formed over the at least one dielectric material. An entirety of the sacrificial material may then be removed.
摘要翻译：一些实施例包括形成二极管的方法。可以在第一导电材料上形成堆叠。堆叠可以按升序包括牺牲材料，至少一种电介质材料和第二导电材料。间隔物可以沿着堆叠的相对侧壁形成，然后可以去除整个牺牲材料以在第一导电材料和至少一种电介质材料之间留下间隙。在形成二极管的一些实施例中，可以在第一导电材料上形成层，其中包含支撑体的层散布在牺牲材料中。可以在该层上形成至少一种介电材料，并且可以在该至少一种电介质材料的上方形成第二导电材料。然后可以去除整个牺牲材料。

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