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51. 发明申请

US20090291609A1 Method of manufacturing plasma display device and plasma display device made by this method 审中-公开
标题翻译：通过该方法制造的等离子体显示装置和等离子体显示装置的制造方法
公开(公告)号：US20090291609A1
公开(公告)日：2009-11-26
申请号：US12453695
申请日：2009-05-19
申请人： Hyuk Kim
发明人： Hyuk Kim
IPC分类号： H01J9/00
CPC分类号： H05K7/20963 , H05K7/20427
摘要： A method of manufacturing a plasma display device and a plasma display device made by this method are taught. In the plasma display device, the adhesion rate between a graphite layer and a plasma display panel is increased, therefore, the performance of the heat dissipation may be enhanced, the noises may be reduced, and the afterimages may be prevented, and the procedural steps of manufacture and the costs of making the graphite layer may be reduced. The method contemplates a first panel preparing step performed by preparing a first panel; a graphite layer forming step performed by coating a liquid graphite material on the first panel using a coating apparatus, and hardening the coated liquid graphite; and a chassis base adhering step performed by adhering a chassis base on the first panel with the chassis base facing to the graphite layer disposed on the plasma display panel.
摘要翻译：教导了通过该方法制造的等离子体显示装置和等离子体显示装置的制造方法。在等离子体显示装置中，石墨层和等离子体显示面板之间的附着率增加，因此可以提高散热性能，可以降低噪声，并且可以防止残像，并且程序步骤的制造和制造石墨层的成本可能降低。该方法考虑了通过制备第一面板进行的第一面板准备步骤; 石墨层形成步骤，使用涂布装置在第一面板上涂布液体石墨材料，并使被涂覆的液体石墨硬化; 以及通过将底架安装在第一面板上而将底盘朝向设置在等离子体显示面板上的石墨层的底座底座附着步骤。

52. 发明申请

US20090220841A1 Membrane ELectrode Assembly Having Layer for Trapping Catalyst and Fuel Cell Employed With The Same 有权
标题翻译：用于捕获催化剂和燃料电池层的膜ELectrode组件
公开(公告)号：US20090220841A1
公开(公告)日：2009-09-03
申请号：US12087415
申请日：2006-12-23
申请人： Yu Jin Oh , Hyuk Kim , Goyoung Moon
发明人： Yu Jin Oh , Hyuk Kim , Goyoung Moon
IPC分类号： H01M8/10 , B32B37/02
CPC分类号： H01M8/1011 , H01M4/8605 , H01M4/8807 , H01M4/881 , H01M8/1004 , Y02E60/523 , Y10T156/10
摘要： Disclosed herein are a membrane electrode assembly (MEA) for fuel cells, wherein the membrane electrode assembly has a porous membrane (a catalyst trapping layer) disposed at the opposite surface of a catalyst layer facing a polymer electrolyte membrane for preventing the loss of a catalyst, and a fuel cell including the same. The membrane electrode assembly has the effect of restraining the loss of the catalyst due to a liquid component, such as methanol, thereby improving the operating efficiency of the fuel cell. Especially, the membrane electrode assembly has the effect of minimizing the reduction in performance of the fuel cell due to the loss of the catalyst during the long-term operation.
摘要翻译：本文公开了一种用于燃料电池的膜电极组件（MEA），其中膜电极组件具有多孔膜（催化剂捕获层），其设置在面向聚合物电解质膜的催化剂层的相对表面上，以防止催化剂的损失，以及包含该燃料电池的燃料电池。膜电极组件具有抑制由甲醇等液体成分引起的催化剂损失的效果，提高了燃料电池的运转效率。特别地，膜电极组件具有由于在长期运行期间催化剂损失而使燃料电池的性能降低最小化的效果。

53. 发明申请

US20090164169A1 Drop mass deviation measuring apparatus, drop mass deviation measuring method of the same, pattern forming system using the same, and control method of the pattern forming system using the same 失效
标题翻译：液滴质量偏差测量装置，液滴质量偏差测量方法，使用其的图案形成系统以及使用其的图案形成系统的控制方法
公开(公告)号：US20090164169A1
公开(公告)日：2009-06-25
申请号：US12222602
申请日：2008-08-12
申请人： Chong Uck Kim , Hyuk Kim , Sano Jin Choi , Seong Wook Cheong , Eun Seon Lim , Byung Il Ahn , Joong He Lee
发明人： Chong Uck Kim , Hyuk Kim , Sano Jin Choi , Seong Wook Cheong , Eun Seon Lim , Byung Il Ahn , Joong He Lee
IPC分类号： G01G19/00
CPC分类号： B41J2/125 , B41J2/07
摘要： A drop mass deviation measuring apparatus, a drop mass deviation measuring method, a pattern forming system, and a control method measure mass deviations of drops discharged from a plurality of drop discharge units in real time with high precision. The apparatus utilizes a plurality of drops discharged from a plurality of drop discharge units, a drop moving force providing part to provide moving forces, having directions different from discharge directions of each of the plurality of drops, to the plurality of drops, a discharged drop position detection member to acquire drop position images individually reflecting the a position of each of the plurality of drops, and a drop mass deviation measurement control part to calculate a drop discharge direction separation angle of each of the plurality of drops using the drop position images acquired by the discharged drop position detection member to measure mass deviation of each of the drops.
摘要翻译：液滴质量偏差测量装置，液滴质量偏差测量方法，图案形成系统和控制方法以高精度实时测量从多个液滴喷射单元排出的液滴的质量偏差。该设备利用从多个液滴喷射单元排出的多个液滴，液滴移动力提供部分，以提供具有与多个液滴中的每一个的排出方向不同的移动力到多个液滴，排出液滴位置检测构件，用于获取分别反映所述多个液滴中的每一个的位置的液滴位置图像;以及液滴质量偏差测量控制部，使用由所述液滴位置图像获取的所述液滴位置图像来计算所述多个液滴中的每一个的液滴排出方向分离角度放电落下位置检测构件，用于测量每个液滴的质量偏差。

54. 发明授权

US07530010B2 Hybrid trace back apparatus and high-speed viterbi decoding system using the same 有权
标题翻译：混合追溯装置和使用相同的高速维特比解码系统
公开(公告)号：US07530010B2
公开(公告)日：2009-05-05
申请号：US11263443
申请日：2005-10-31
申请人： In-San Jeon , Hyuk Kim , Kyung-Soo Kim , Ik-Soo Eo , Hee-Bum Jung
发明人： In-San Jeon , Hyuk Kim , Kyung-Soo Kim , Ik-Soo Eo , Hee-Bum Jung
IPC分类号： H03M13/03
CPC分类号： H03M13/395 , H03M13/4107 , H03M13/4192
摘要： A hybrid trace back apparatus and a high-speed Viterbi decoding system having the same are disclosed. The hybrid trace back apparatus includes: a register exchanging unit for receiving survivor values of each states from a path metric calculator, and obtaining a block survival value through a register exchange operation as much as a bit length for a block trace back operation; a first storing unit for the register exchange operation; a second storing unit for storing the block survival value obtained through the register exchange operation until the block survival value is written in a block trace back memory; and a block trace back unit for outputting decoded data by performing a block trace back operation while writing a value of the second storing unit.
摘要翻译：公开了具有该混合追溯装置和高速维特比解码系统。混合追溯装置包括：寄存器交换单元，用于从路径度量计算器接收每个状态的幸存值，并通过寄存器交换操作获得块存活值，作为块追溯操作的位长; 用于寄存器交换操作的第一存储单元; 第二存储单元，用于存储通过寄存器交换操作获得的块存活值，直到块存储值被写入块追溯存储器; 以及块追溯单元，用于通过在写入第二存储单元的值的同时执行块追溯操作来输出解码数据。

55. 发明申请

US20080106199A1 Plasma display module, method of combining plasma display panel and chassis, and method of separating chassis from plasma display panel 审中-公开
标题翻译：等离子体显示模块，等离子体显示面板和底盘的组合方法以及将等离子体显示面板分离的方法
公开(公告)号：US20080106199A1
公开(公告)日：2008-05-08
申请号：US11898213
申请日：2007-09-10
申请人： Hyuk Kim
发明人： Hyuk Kim
IPC分类号： H01J17/49 , H01J9/02
CPC分类号： H05K5/02
摘要： The provided is a new structure of a plasma display module, in which a plasma display panel (PDP) and a chassis can be separated promptly and easily. The plasma display module includes a PDP which displays images, a chassis which is disposed adjacent to a rear surface of the PDP, a hinge coupled to the chassis. An adhesive member such as a double-sided tape is disposed between the hinge and the rear surface of the PDP. During coupling and decoupling processes of the PDP and the chassis, the hinge rotates in order to prevent interference between the PDP and the chassis. The present invention also provides a method of combining a PDP and a chassis, and a method of separating a chassis from a PDP.
摘要翻译：所提供的是等离子体显示模块的新结构，其中等离子体显示面板（PDP）和底架可以被迅速和容易地分离。等离子体显示模块包括显示图像的PDP，邻近PDP的后表面设置的底盘，联接到底盘的铰链。诸如双面胶带的粘合构件设置在PDP的铰链和后表面之间。在PDP和底盘的联接和去耦过程中，铰链旋转以防止PDP和底盘之间的干扰。本发明还提供了一种组合PDP和底盘的方法以及从PDP分离机箱的方法。

56. 发明授权

US06772389B2 Turbo decoder using binary LogMAP algorithm and method of implementing the same 有权
标题翻译： Turbo解码器采用二进制LogMAP算法和实现方法相同
公开(公告)号：US06772389B2
公开(公告)日：2004-08-03
申请号：US09966201
申请日：2001-09-26
申请人： Hyuk Kim , In-San Jeon , Woo-Seok Yang , Kyung-Soo Kim , Han-Jin Cho
发明人： Hyuk Kim , In-San Jeon , Woo-Seok Yang , Kyung-Soo Kim , Han-Jin Cho
IPC分类号： H03M1345
CPC分类号： H03M13/3905 , H03M13/2957 , H03M13/3927 , H03M13/6502 , H03M13/6577
摘要： Disclosed are a turbo decoder, which applies a base-2 binary LogMAP algorithm in implementing a turbo decoder to thereby reduce the hardware requirement and implement a high-speed turbo decoder, which comprising a split for splitting the sum of two input state metrics into an integral and a decimal part; a comparator for comparing the integral parts of the two state metrics to extract a maximum and a minimum integer; a subtractor for obtaining a difference between the original integral part and the maximum or minimum integer value; a lookup table for calculating the sum of exponential terms of base-2 function in the decimal parts; a shifter for shifting only a decimal part with a smaller integral part by the difference; an adder for adding the decimal part and a decimal part with a larger integral part; a log pre-processing block for applying a base-2 logarithm on the decimal part to thereby obtain a final value for the decimal part; and an adder for adding the maximum integral value and the final value for the decimal part to thereby obtain a final value of the base-2 function.
摘要翻译：公开了一种turbo解码器，其在实现turbo解码器中应用基2二进制LogMAP算法，从而降低硬件要求并实现高速turbo解码器，该高速turbo解码器包括用于将两个输入状态度量的和分解为积分和小数部分; 用于比较两个状态度量的积分部分以提取最大和最小整数的比较器; 用于获得原始积分部分与最大或最小整数值之间的差的减法器; 用于计算小数部分中base-2函数的指数项的和的查找表; 移位器，用于仅移动具有较小整数部分的小数部分的差值; 用于将小数部分和小数部分与较大整数部分相加的加法器; 用于在小数部分应用基2对数的日志预处理块，从而获得小数部分的最终值; 以及加法器，用于将最大积分值和小数部分的最终值相加，从而获得基2功能的最终值。

57. 发明授权

US10224339B2 Semiconductor memory devices 有权
公开(公告)号：US10224339B2
公开(公告)日：2019-03-05
申请号：US15822586
申请日：2017-11-27
申请人： Gang Zhang , Hyuk Kim , Yong-Hyun Kwon , Sangwuk Park
发明人： Gang Zhang , Hyuk Kim , Yong-Hyun Kwon , Sangwuk Park
IPC分类号： H01L27/11573 , H01L27/11582 , H01L27/092 , H01L23/522 , H01L27/11575 , H01L27/12 , H01L27/1157 , H01L27/118
摘要： Provided is a semiconductor memory device. The semiconductor memory device includes a peripheral circuit gate pattern on a first substrate, an impurity region in the first substrate and spaced apart from the peripheral circuit gate pattern, a cell array structure on the peripheral circuit gate pattern, a second substrate between the peripheral circuit gate pattern and the cell array structure, and a via that is in contact with the impurity region and disposed between the first substrate and the second substrate. The via electrically connects the first and second substrates to each other.

58. 发明授权

US10192881B2 Semiconductor device 有权
公开(公告)号：US10192881B2
公开(公告)日：2019-01-29
申请号：US14841328
申请日：2015-08-31
申请人： Sang Wuk Park , Hyuk Kim , Kyoung Sub Shin , Gang Zhang
发明人： Sang Wuk Park , Hyuk Kim , Kyoung Sub Shin , Gang Zhang
IPC分类号： H01L27/1157 , H01L27/11524 , H01L27/11556 , H01L27/11582
摘要： A semiconductor device includes gate stacks disposed on a substrate and spaced apart from each other in a first direction, with a separation region interposed between the gate stacks; channel regions penetrating through the gate stacks and disposed within each of the gate stacks; and a guide region adjacent to the separation region, penetrating through at least a portion of the gate stack, and having a bent portion that is bent toward the separation region.

59. 发明授权

US09492866B2 Belt-shaped metal nanostructure and method for preparing same 有权
标题翻译：带状金属纳米结构及其制备方法
公开(公告)号：US09492866B2
公开(公告)日：2016-11-15
申请号：US13582683
申请日：2011-03-10
申请人： Won-Jong Kwon , Gyo-Hyun Hwang , Sang-Uck Lee , Hyuk Kim , Jung-Won Park , Sung-Ho Yoon , Kyung-Hoon Lee
发明人： Won-Jong Kwon , Gyo-Hyun Hwang , Sang-Uck Lee , Hyuk Kim , Jung-Won Park , Sung-Ho Yoon , Kyung-Hoon Lee
IPC分类号： B22F1/02 , B22F1/00 , B82Y30/00
CPC分类号： B22F1/0018 , B22F1/0025 , B82Y30/00
摘要： The present invention relates to a belt-shaped metal nanostructure in which a wide surface area of catalytically active material can be realized even by a relatively small amount thereof so that it shows an excellent catalytic activity, and a method for preparing same.
摘要翻译：本发明涉及一种带状金属纳米结构体，其中甚至可以通过相对少的量实现催化活性材料的广泛表面积，从而显示出优异的催化活性及其制备方法。

60. 发明授权

US09349747B2 Semiconductor devices having gate stack portions that extend in a zigzag pattern 有权
标题翻译：具有以锯齿形图案延伸的栅叠层部分的半导体器件
公开(公告)号：US09349747B2
公开(公告)日：2016-05-24
申请号：US14676843
申请日：2015-04-02
申请人： Hyuk Kim , Sang Wuk Park , Kyoung Sub Shin
发明人： Hyuk Kim , Sang Wuk Park , Kyoung Sub Shin
IPC分类号： H01L27/00 , H01L29/00 , H01L27/115 , H01L29/792 , H01L29/78 , H01L27/02
CPC分类号： H01L27/11582 , G11C16/08 , G11C16/10 , G11C16/26 , H01L23/528 , H01L27/0207 , H01L27/11556 , H01L27/11565 , H01L27/1157 , H01L27/11573 , H01L29/7827 , H01L29/7831
摘要： A semiconductor device includes a substrate having an upper surface extended in first and second directions perpendicular to each other, gate stack portions spaced apart from each other in the first direction, the gate stack portions including gate electrodes spaced apart from each other in a direction perpendicular to the an upper surface of the substrate and having lateral surfaces extended in the second direction to have a zigzag form, channel regions penetrating through the gate stack portions and disposed to form columns having a zigzag form in the second direction, at least two channel regions among the channel regions being linearly arranged in the first direction within the respective gate stack portion, and a source region disposed between the gate stack portions adjacent to each other and extended in the second direction to have a zigzag form.
摘要翻译：一种半导体器件包括具有在彼此垂直的第一和第二方向上延伸的上表面的基板，在第一方向上彼此间隔开的栅堆叠部分，栅堆叠部分包括在垂直方向上彼此间隔开的栅电极并且具有在第二方向上延伸以具有锯齿形状的侧表面，通道区域穿过栅极堆叠部分并且设置成在第二方向上形成具有锯齿形状的列，至少两个沟道区域在各栅极堆叠部分之间沿着第一方向线性排列的沟道区域和设置在彼此相邻并在第二方向上延伸以形成Z字形的栅叠层部分之间的源极区域。

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