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51. 发明申请

US20120205769A1 BACK SIDE ILLUMINATED IMAGE SENSOR WITH REDUCED SIDEWALL-INDUCED LEAKAGE 有权
标题翻译：具有降低的侧壁感应泄漏的背面照明图像传感器
公开(公告)号：US20120205769A1
公开(公告)日：2012-08-16
申请号：US13028471
申请日：2011-02-16
申请人： Shuang-Ji Tsai , Dun-Nian Yaung , Jen-Cheng Liu , Wen-De Wang , Hsiao-Hui Tseng
发明人： Shuang-Ji Tsai , Dun-Nian Yaung , Jen-Cheng Liu , Wen-De Wang , Hsiao-Hui Tseng
IPC分类号： H01L31/02 , H01L31/18
CPC分类号： H01L27/14687 , H01L23/481 , H01L23/525 , H01L24/83 , H01L27/14623 , H01L27/14632 , H01L27/14636 , H01L27/14638 , H01L27/1464 , H01L27/14645 , H01L27/14683 , H01L27/14689
摘要： Provided is an image sensor device. The image sensor device includes having a front side, a back side, and a sidewall connecting the front and back sides. The image sensor device includes a plurality of radiation-sensing regions disposed in the substrate. Each of the radiation-sensing regions is operable to sense radiation projected toward the radiation-sensing region through the back side. The image sensor device includes an interconnect structure that is coupled to the front side of the substrate. The interconnect structure includes a plurality of interconnect layers and extends beyond the sidewall of the substrate. The image sensor device includes a bonding pad that is spaced apart from the sidewall of the substrate. The bonding pad is electrically coupled to one of the interconnect layers of the interconnect structure.
摘要翻译：提供了一种图像传感器装置。图像传感器装置包括具有连接前侧和后侧的前侧，后侧和侧壁。图像传感器装置包括设置在基板中的多个辐射感测区域。每个辐射感测区域可操作以感测通过后侧朝向辐射感测区域投射的辐射。图像传感器装置包括耦合到基板的前侧的互连结构。互连结构包括多个互连层并且延伸超过衬底的侧壁。图像传感器装置包括与衬底的侧壁间隔开的接合焊盘。接合焊盘电连接到互连结构的互连层之一。

52. 发明授权

US08164124B2 Photodiode with multi-epi films for image sensor 有权
标题翻译：用于图像传感器的多面膜的光电二极管
公开(公告)号：US08164124B2
公开(公告)日：2012-04-24
申请号：US11752012
申请日：2007-05-22
申请人： Jen-Cheng Liu , Dun-Nian Yaung , Jyh-Ming Hung , Wen-De Wang , Chun-Chieh Chuang
发明人： Jen-Cheng Liu , Dun-Nian Yaung , Jyh-Ming Hung , Wen-De Wang , Chun-Chieh Chuang
IPC分类号： H01L29/76
CPC分类号： H01L27/14643 , H01L27/14601 , H01L27/14621 , H01L27/14627 , H01L27/14689 , H01L27/14812
摘要： The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a semiconductor substrate; a first epitaxy semiconductor layer disposed on the semiconductor substrate and having a first type of dopant and a first doping concentration; a second epitaxy semiconductor layer disposed over the first epitaxy semiconductor layer and having the first type of dopant and a second doping concentration less than the first doping concentration; and an image sensor on the second epitaxy semiconductor layer.
摘要翻译：本公开提供了一种图像传感器半导体器件。半导体器件包括半导体衬底; 第一外延半导体层，其设置在所述半导体衬底上并且具有第一类型的掺杂剂和第一掺杂浓度; 第二外延半导体层，设置在所述第一外延半导体层上并且具有所述第一类型的掺杂物和小于所述第一掺杂浓度的第二掺杂浓度; 以及第二外延半导体层上的图像传感器。

53. 发明申请

US20120025199A1 Image Sensor with Deep Trench Isolation Structure 有权
标题翻译：具有深沟槽隔离结构的图像传感器
公开(公告)号：US20120025199A1
公开(公告)日：2012-02-02
申请号：US12844642
申请日：2010-07-27
申请人： Szu-Ying Chen , Chun-Chieh Chuang , Jen-Cheng Liu , Dun-Nian Yaung
发明人： Szu-Ying Chen , Chun-Chieh Chuang , Jen-Cheng Liu , Dun-Nian Yaung
IPC分类号： H01L31/02 , H01L31/0264 , H01L31/0376 , H01L31/18
CPC分类号： H01L27/1464 , H01L27/14643 , H01L27/14689
摘要： Provided is a back side illuminated image sensor device. The image sensor device includes a substrate having a front side and a back side opposite the front side. The image sensor also includes a radiation-detection device that is formed in the substrate. The radiation-detection device is operable to detect a radiation wave that enters the substrate through the back side. The image sensor further includes a deep trench isolation feature that is disposed adjacent to the radiation-detection device. The image sensor device further includes a doped layer that at least partially surrounds the deep trench isolation feature in a conformal manner.
摘要翻译：提供了背面照明图像传感器装置。图像传感器装置包括具有与前侧相对的前侧和后侧的基板。图像传感器还包括形成在基板中的放射线检测装置。放射线检测装置可操作以检测通过背面进入衬底的辐射波。图像传感器还包括与辐射检测装置相邻设置的深沟槽隔离特征。图像传感器装置还包括以保形方式至少部分地围绕深沟槽隔离特征的掺杂层。

54. 发明授权

US07968424B2 Method of implantation 有权
标题翻译：植入方法
公开(公告)号：US07968424B2
公开(公告)日：2011-06-28
申请号：US12355211
申请日：2009-01-16
申请人： Jeng-Shyan Lin , Dun-Nian Yaung , Jen-Cheng Liu , Chun-Chieh Chuang , Pao-Tung Chen , Wen-De Wang , Jyh-Ming Hung
发明人： Jeng-Shyan Lin , Dun-Nian Yaung , Jen-Cheng Liu , Chun-Chieh Chuang , Pao-Tung Chen , Wen-De Wang , Jyh-Ming Hung
IPC分类号： H01L21/76
CPC分类号： H01L21/76237 , H01L21/2652 , H01L27/0629 , H01L27/1463 , H01L27/14683
摘要： Provided is a method of implanting dopant ions to an integrated circuit. The method includes forming a first pixel and a second pixel in a substrate, forming an etch stop layer over the substrate, forming a hard mask layer over the etch stop layer, patterning the hard mask layer to include an opening between the first pixel and the second pixel, and implanting a plurality of dopants through the opening to form an isolation feature.
摘要翻译：提供了将掺杂剂离子注入集成电路的方法。该方法包括在衬底中形成第一像素和第二像素，在衬底上形成蚀刻停止层，在蚀刻停止层上方形成硬掩模层，图案化硬掩模层以包括第一像素与第二像素之间的开口并且通过所述开口植入多个掺杂剂以形成隔离特征。

55. 发明申请

US20100091163A1 Image Sensor Having Enhanced Backside Illumination Quantum Efficiency 有权
标题翻译：具有增强的背光照明量子效率的图像传感器
公开(公告)号：US20100091163A1
公开(公告)日：2010-04-15
申请号：US12557154
申请日：2009-09-10
申请人： Yin-Kai Liao , Han-Chi Liu , Yuan-Hung Liu , Dun-Nian Yaung , Jen-Cheng Liu
发明人： Yin-Kai Liao , Han-Chi Liu , Yuan-Hung Liu , Dun-Nian Yaung , Jen-Cheng Liu
IPC分类号： H04N5/335 , H01L31/0232
CPC分类号： H01L27/14629 , H01L21/76829 , H01L21/76831 , H01L27/14603 , H01L27/14614 , H01L27/14621 , H01L27/14627 , H01L27/1463 , H01L27/14636 , H01L27/1464 , H01L27/14645 , H01L27/14683 , H01L27/14685 , H04N3/155
摘要： A system and method for image sensing is disclosed. An embodiment comprises a substrate with a pixel region and a logic region. A first resist protect oxide (RPO) is formed over the pixel region, but not over the logic region. Silicide contacts are formed on the top of active devices formed in the pixel region, but not on the surface of the substrate in the pixel region, and silicide contacts are formed both on the top of active devices and on the surface of the substrate in the logic region. A second RPO is formed over the pixel region and the logic region, and a contact etch stop layer is formed over the second RPO. These layers help to reflect light back to the image sensor when light impinges the sensor from the backside of the substrate, and also helps prevent damage that occurs from overetching.
摘要翻译：公开了一种用于图像感测的系统和方法。实施例包括具有像素区域和逻辑区域的基板。在像素区域上形成第一抗蚀保护氧化物（RPO），但不在逻辑区域上。硅化物接触形成在像素区域中形成的有源器件的顶部上，而不是在像素区域中的衬底的表面上，并且在有源器件的顶部和衬底的表面上形成硅化物接触逻辑区域。在像素区域和逻辑区域上形成第二RPO，并且在第二RPO上形成接触蚀刻停止层。当光从基板的背面入射传感器时，这些层有助于将光反射回图像传感器，并且还有助于防止由过蚀刻引起的损坏。

56. 发明申请

US20080246063A1 PHOTODIODE WITH MULTI-EPI FILMS FOR IMAGE SENSOR 有权
标题翻译：用于图像传感器的多个EPI膜的光致抗体
公开(公告)号：US20080246063A1
公开(公告)日：2008-10-09
申请号：US11752012
申请日：2007-05-22
申请人： Jen-Cheng Liu , Dun-Nian Yaung , Jyh-Ming Hung , Wen-De Wang , Chun-Chieh Chuang
发明人： Jen-Cheng Liu , Dun-Nian Yaung , Jyh-Ming Hung , Wen-De Wang , Chun-Chieh Chuang
IPC分类号： H01L31/113 , H01L31/0232
CPC分类号： H01L27/14643 , H01L27/14601 , H01L27/14621 , H01L27/14627 , H01L27/14689 , H01L27/14812
摘要： The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a semiconductor substrate; a first epitaxy semiconductor layer disposed on the semiconductor substrate and having a first type of dopant and a first doping concentration; a second epitaxy semiconductor layer disposed over the first epitaxy semiconductor layer and having the first type of dopant and a second doping concentration less than the first doping concentration; and an image sensor on the second epitaxy semiconductor layer.
摘要翻译：本公开提供了一种图像传感器半导体器件。半导体器件包括半导体衬底; 第一外延半导体层，其设置在所述半导体衬底上并且具有第一类型的掺杂剂和第一掺杂浓度; 第二外延半导体层，设置在所述第一外延半导体层上并且具有所述第一类型的掺杂物和小于所述第一掺杂浓度的第二掺杂浓度; 以及第二外延半导体层上的图像传感器。

57. 发明授权

US06995085B2 Underlayer protection for the dual damascene etching 有权
标题翻译：双镶嵌蚀刻的底层保护
公开(公告)号：US06995085B2
公开(公告)日：2006-02-07
申请号：US10346384
申请日：2003-01-17
申请人： Lawrence Lui , Chia-Shia Tsai , Chao-Cheng Chen , Jen-Cheng Liu
发明人： Lawrence Lui , Chia-Shia Tsai , Chao-Cheng Chen , Jen-Cheng Liu
IPC分类号： H01L21/4763
CPC分类号： H01L21/76808
摘要： A method of protecting an underlying diffusion barrier layer in a dual damascene trench and via etch process with a coating of negative photoresist. The dual damascene process starts with via hole etching in an intermetal dielectric (IMD) layer. Next, the thin film barrier layer is deposited and patterned to fill the bottom of the vias. The key process step is a coating of negative photoresist which is exposed and developed to partially fill the via openings. This thick layer of negative photoresist in the vias protects the thin diffusion barrier layer from subsequent dual damascene etch processing.
摘要翻译：一种在双镶嵌沟槽中保护底层扩散阻挡层的方法，以及通过蚀刻工艺与负性光致抗蚀剂的涂层。双镶嵌工艺从金属间电介质（IMD）层中的通孔蚀刻开始。接下来，沉积和图案化薄膜阻挡层以填充通孔的底部。关键的工艺步骤是负性光致抗蚀剂的涂层，其被暴露和显影以部分填充通孔。通孔中的这种厚的负光致抗蚀剂层保护了薄的扩散阻挡层免于后续的双镶嵌蚀刻加工。

58. 发明授权

US06909675B2 Method for switching an optical disc apparatus to different accessing speeds 失效
标题翻译：用于将光盘装置切换到不同访问速度的方法
公开(公告)号：US06909675B2
公开(公告)日：2005-06-21
申请号：US10352479
申请日：2003-01-28
申请人： Jen-Cheng Liu
发明人： Jen-Cheng Liu
IPC分类号： G11B7/085 , G11B19/16 , G11B19/26 , G11B21/08
CPC分类号： G11B19/16 , G11B19/26
摘要： A method for switching an optical disc apparatus to different accessing speeds. The optical disc apparatus has a control button with which to eject a disc. The method comprises the steps of operating the optical disc apparatus in a first mode, switching the optical disc apparatus from the first to a second mode when the control button is pressed for a duration exceeding a predetermined period of time, and switching the optical disc apparatus to the first mode and ejecting the disc when the optical disc apparatus operates in the second mode and the control button is pressed.
摘要翻译：一种用于将光盘装置切换到不同访问速度的方法。光盘装置具有用于弹出光盘的控制按钮。该方法包括以下步骤：以第一模式操作光盘装置，当控制按钮被按压持续超过预定时间段时，将光盘装置从第一模式切换到第二模式，并且切换光盘装置到第一模式，并且当光盘装置在第二模式中操作并且按下控制按钮时弹出光盘。

59. 发明授权

US06399483B1 Method for improving faceting effect in dual damascene process 有权
标题翻译：改进双镶嵌工艺中的刻面效应的方法
公开(公告)号：US06399483B1
公开(公告)日：2002-06-04
申请号：US09624523
申请日：2000-07-24
申请人： Jen-Cheng Liu , Ming-Huei Lui , Hun-Jan Tao , Chia Shiung Tsai
发明人： Jen-Cheng Liu , Ming-Huei Lui , Hun-Jan Tao , Chia Shiung Tsai
IPC分类号： H01L214763
CPC分类号： H01L21/76814 , H01L21/76808 , H01L2221/1063
摘要： A new method is provided for creating the interconnect pattern for dual damascene structures. The dual damascene structure is created in two overlying levels of dielectric, a first etch stop layer is deposited over the surface of the substrate, a second etch stop layer is deposited between the two layers of dielectric. A first etch penetrates both layers of dielectric, a second etch penetrates the top dielectric layer. Before the second etch is performed, a layer of ARC is deposited. For the second etch a polymer rich etchant is used to protect the sidewalls of the opening. The second etch leaves in place a fence of material (containing C, H, F and oxide compounds) that is formed around the upper perimeter of the opening through the lower layer of dielectric. This fence protects the upper corners of the lower opening of the dual damascene structure and is removed in a two step procedure. At the completion of this two step procedure the upper corners of the lower opening of the dual damascene structure have retained a rectangular profile. A final step removes the photoresist (that has been used to create the interconnect line opening) from the surface of the second layer of dielectric while the remnants of the ARC material are also removed.
摘要翻译：提供了一种用于创建双镶嵌结构的互连图案的新方法。双镶嵌结构在两个相邻的电介质层上产生，第一蚀刻停止层沉积在衬底的表面上，第二蚀刻停止层沉积在两层介电层之间。第一蚀刻穿透两层电介质，第二蚀刻穿透顶部电介质层。在执行第二蚀刻之前，沉积ARC层。对于第二蚀刻，使用聚合物富集的蚀刻剂来保护开口的侧壁。第二蚀刻留下了通过下电介质的开口周围形成的材料（含有C，H，F和氧化物化合物）的栅栏。该栅栏保护双镶嵌结构的下开口的上角，并以两步程序移除。在完成这个两步骤程序后，双镶嵌结构的下开口的上角保留了矩形轮廓。最后一步从电介质的第二层的表面去除光致抗蚀剂（已用于形成互连线开口），而ARC材料的残余物也被去除。

60. 发明授权

US06309962B1 Film stack and etching sequence for dual damascene 有权
标题翻译：双重镶嵌薄膜叠层和蚀刻顺序
公开(公告)号：US06309962B1
公开(公告)日：2001-10-30
申请号：US09396516
申请日：1999-09-15
申请人： Chao-Cheng Chen , Li-Chi Chao , Jen-Cheng Liu , Min-Huei Lui , Chia-Shiung Tsai
发明人： Chao-Cheng Chen , Li-Chi Chao , Jen-Cheng Liu , Min-Huei Lui , Chia-Shiung Tsai
IPC分类号： H01L214763
CPC分类号： H01L21/76811 , H01L21/31144 , H01L21/76813
摘要： A process for forming a dual damascene cavity in a dielectric, particularly a low k organic dielectric, is described. The dielectric is composed of two layers separated by an etch stop layer. Formation of the damascene cavity is achieved by using a hard mask that is made up of two layers of silicon oxynitride separated by layer of silicon oxide. For both the trench first and via first approaches, the first cavity is formed using only the upper silicon oxynitride layer as the mask. Thus, when the second portion is patterned, little or no misalignment occurs because said upper layer is relatively thin. Additional etching steps result in a cavity and trench part that extend as far as the etch stop layer located between the dielectric layers. Final removal of photoresist occurs with a hard mask still in place so no damage to the organic dielectric occurs. A final etch step then completes the process.
摘要翻译：描述了在电介质，特别是低k有机电介质中形成双镶嵌腔的工艺。电介质由两层由蚀刻停止层隔开组成。通过使用由两层氧氮化硅分离的氧化硅层组成的硬掩模来实现镶嵌腔的形成。对于沟槽第一和通过第一方法，仅使用上部氧氮化硅层作为掩模形成第一腔体。因此，当第二部分被图案化时，由于所述上层相对较薄，所以几乎不发生不对准。另外的蚀刻步骤导致空腔和沟槽部分延伸到位于电介质层之间的蚀刻停止层的尽可能深。光致抗蚀剂的最终去除是在硬掩模仍然存在的情况下发生的，因此不会损害有机电介质。最终蚀刻步骤然后完成该过程。

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