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51. 发明授权

US07697345B2 Nonvolatile memory system, semiconductor memory, and writing method 失效
标题翻译：非易失性存储器系统，半导体存储器和写入方法
公开(公告)号：US07697345B2
公开(公告)日：2010-04-13
申请号：US12145936
申请日：2008-06-25
申请人： Tetsuya Ishii , Hitoshi Miwa , Osamu Tsuchiya , Shooji Kubono
发明人： Tetsuya Ishii , Hitoshi Miwa , Osamu Tsuchiya , Shooji Kubono
IPC分类号： G11C11/34
CPC分类号： G11C16/3427 , G11C16/0491 , G11C16/10 , G11C16/12 , G11C16/16 , G11C16/3404 , G11C16/3431 , G11C16/3459 , G11C2216/18
摘要： A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.
摘要翻译：非易失性半导体存储器由于与字线相关的干扰而恢复存储器单元的阈值的变化。非易失性存储器在每次写入操作之后连续执行许多写入操作，而不执行单扇区擦除，执行比通常的写入操作更快的附加写入操作，以及减轻用于附加写入的软件的负担。存储在指定扇区中的数据在保存在寄存器中之前被读出，并且当给出预定命令时，所选扇区被进行单扇区擦除。然后写入预期值数据由保存的数据和要另外编写的数据形成，完成写入操作。

52. 发明申请

US20090003085A1 NONVOLATILE MEMORY SYSTEM, SEMICONDUCTOR MEMORY, AND WRITING METHOD 失效
标题翻译：非易失性存储器系统，半导体存储器和写入方法
公开(公告)号：US20090003085A1
公开(公告)日：2009-01-01
申请号：US12145936
申请日：2008-06-25
申请人： Tatsuya ISHII , Hitoshi Miwa , Osamu Tsuchiya , Shooji Kubono
发明人： Tatsuya ISHII , Hitoshi Miwa , Osamu Tsuchiya , Shooji Kubono
IPC分类号： G11C16/06
CPC分类号： G11C16/3427 , G11C16/0491 , G11C16/10 , G11C16/12 , G11C16/16 , G11C16/3404 , G11C16/3431 , G11C16/3459 , G11C2216/18
摘要： A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.
摘要翻译：非易失性半导体存储器由于与字线相关的干扰而恢复存储器单元的阈值的变化。非易失性存储器在每次写入操作之后连续执行许多写入操作，而不执行单扇区擦除，执行比通常的写入操作更快的附加写入操作，以及减轻用于附加写入的软件的负担。存储在指定扇区中的数据在保存在寄存器中之前被读出，并且当给出预定命令时，所选扇区被进行单扇区擦除。然后写入预期值数据由保存的数据和要另外编写的数据形成，完成写入操作。

53. 发明授权

US07283399B2 Nonvolatile memory system, semiconductor memory, and writing method 有权
标题翻译：非易失性存储器系统，半导体存储器和写入方法
公开(公告)号：US07283399B2
公开(公告)日：2007-10-16
申请号：US11498230
申请日：2006-08-03
申请人： Tatsuya Ishii , Hitoshi Miwa , Osamu Tsuchiya , Shooji Kubono
发明人： Tatsuya Ishii , Hitoshi Miwa , Osamu Tsuchiya , Shooji Kubono
IPC分类号： G11C16/04
CPC分类号： G11C16/3427 , G11C16/0491 , G11C16/10 , G11C16/12 , G11C16/16 , G11C16/3404 , G11C16/3431 , G11C16/3459 , G11C2216/18
摘要： A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.
摘要翻译：非易失性半导体存储器由于与字线相关的干扰而恢复存储器单元的阈值的变化。非易失性存储器在每次写入操作之后连续执行许多写入操作，而不执行单扇区擦除，执行比通常的写入操作更快的附加写入操作，以及减轻用于附加写入的软件的负担。存储在指定扇区中的数据在保存在寄存器中之前被读出，并且当给出预定命令时，所选扇区被进行单扇区擦除。然后写入预期值数据由保存的数据和要另外编写的数据形成，完成写入操作。

54. 发明申请

US20060218753A1 Method of producing iron oxide pellets 失效
公开(公告)号：US20060218753A1
公开(公告)日：2006-10-05
申请号：US11378269
申请日：2006-03-20
申请人： Yasuhiko Igawa , Jun Jimbo , Hidetoshi Tanaka , Shoichi Kikuchi , Takao Harada , Osamu Tsuchiya , Shuzo Ito , Isao Kobayashi
发明人： Yasuhiko Igawa , Jun Jimbo , Hidetoshi Tanaka , Shoichi Kikuchi , Takao Harada , Osamu Tsuchiya , Shuzo Ito , Isao Kobayashi
IPC分类号： C05B19/00 , B29C67/02 , B29C71/02
CPC分类号： C05D9/02 , C05G3/0047 , C21B13/0046 , C21B13/105 , C22B1/2406 , C22B1/243 , C22B1/244 , C22B1/245 , C22B13/10 , Y02P10/212
摘要： A method for producing an iron oxide pellet including the steps of adding water to a raw material mixture comprising iron oxide which serves as a primary component, a carbonaceous material in an amount sufficient for reducing the iron oxide, an organic binder in an amount sufficient for binding the iron oxide and the carbonaceous material, and an inorganic coagulant in an amount of not less than 0.05 mass % and less than 1 mass %; pelletizing the resultant mixture to thereby obtain a green pellet; and drying the green pellet until the moisture content is reduced to equal to or less than 1.0 mass %. The thus-produced iron oxide pellet is charged in a reducing furnace for reduction to thereby obtain a reduced iron pellet.

55. 发明授权

US06683811B2 Nonvolatile memory system, semiconductor memory, and writing method 有权
公开(公告)号：US06683811B2
公开(公告)日：2004-01-27
申请号：US10388444
申请日：2003-03-17
申请人： Tatsuya Ishii , Hitoshi Miwa , Osamu Tsuchiya , Shooji Kubono
发明人： Tatsuya Ishii , Hitoshi Miwa , Osamu Tsuchiya , Shooji Kubono
IPC分类号： G11C1604
CPC分类号： G11C16/3427 , G11C16/0491 , G11C16/10 , G11C16/12 , G11C16/16 , G11C16/3404 , G11C16/3431 , G11C16/3459 , G11C2216/18
摘要： A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.

56. 发明授权

US06567311B2 Nonvolatile memory system, semiconductor memory, and writing method 有权
公开(公告)号：US06567311B2
公开(公告)日：2003-05-20
申请号：US10095565
申请日：2002-03-13
申请人： Tatsuya Ishii , Hitoshi Miwa , Osamu Tsuchiya , Shooji Kubono
发明人： Tatsuya Ishii , Hitoshi Miwa , Osamu Tsuchiya , Shooji Kubono
IPC分类号： G11C1604
CPC分类号： G11C16/3427 , G11C16/0491 , G11C16/10 , G11C16/12 , G11C16/16 , G11C16/3404 , G11C16/3431 , G11C16/3459 , G11C2216/18
摘要： A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.

57. 发明授权

US06442070B1 Semiconductor nonvolatile memory apparatus and computer system using the same 有权
标题翻译：半导体非易失性存储装置及使用其的计算机系统
公开(公告)号：US06442070B1
公开(公告)日：2002-08-27
申请号：US09680936
申请日：2000-10-10
申请人： Toshihiro Tanaka , Masataka Kato , Osamu Tsuchiya , Toshiaki Nishimoto
发明人： Toshihiro Tanaka , Masataka Kato , Osamu Tsuchiya , Toshiaki Nishimoto
IPC分类号： G11C1606
CPC分类号： G11C16/3413 , G11C16/0416 , G11C16/28 , G11C16/3404 , G11C16/3409 , G11C16/3459
摘要： A nonvolatile semiconductor memory device is provided which includes a plurality of memory cells each having a floating gate, wherein a threshold level of each memory cell depends on a value of electric charge in said floating gate of said memory cell, and wherein said threshold level of each memory cell is placed at one of a first area and a second area. A controller is also provided which controls to set each threshold voltage of selected ones of said plurality of memory cells, wherein said controller performs a first setting operation and a verifying operation. The first setting operation shifts threshold voltages of the selected ones of said plurality of memory cells in a direction from said first area to said second area. The verifying operation detects erratic memory cells which have threshold voltages which are on a side of said second area which is opposite of a middle area formed between the first area and the second area.
摘要翻译：提供了一种非易失性半导体存储器件，其包括多个存储单元，每个存储单元均具有浮置栅极，其中每个存储器单元的阈值电平取决于所述存储单元的所述浮置栅极中的电荷值，并且其中所述阈值电平每个存储器单元被放置在第一区域和第二区域中的一个区域。还提供控制器，其控制以设置所述多个存储器单元中的所选择的每一个的每个阈值电压，其中所述控制器执行第一设置操作和验证操作。所述第一设定操作将所述多个存储单元中选定的存储单元的所述阈值电压沿从所述第一区域到所述第二区域的方向移位。验证操作检测具有与形成在第一区域和第二区域之间的中间区域相对的所述第二区域侧的阈值电压的不稳定存储单元。

58. 发明授权

US06392932B1 Nonvolatile memory system, semiconductor memory, and writing method 有权
公开(公告)号：US06392932B1
公开(公告)日：2002-05-21
申请号：US09714552
申请日：2000-11-17
申请人： Tatsuya Ishii , Hitoshi Miwa , Osamu Tsuchiya , Shooji Kubono
发明人： Tatsuya Ishii , Hitoshi Miwa , Osamu Tsuchiya , Shooji Kubono
IPC分类号： G11C1604
CPC分类号： G11C16/3427 , G11C16/0491 , G11C16/10 , G11C16/12 , G11C16/16 , G11C16/3404 , G11C16/3431 , G11C16/3459 , G11C2216/18
摘要： A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.

59. 发明授权

US5867428A Nonvolatile memory system semiconductor memory and writing method 失效
标题翻译：非易失性存储器系统半导体存储器和写入方式
公开(公告)号：US5867428A
公开(公告)日：1999-02-02
申请号：US889191
申请日：1997-07-08
申请人： Tatsuya Ishii , Hitoshi Miwa , Osamu Tsuchiya , Shooji Kubono
发明人： Tatsuya Ishii , Hitoshi Miwa , Osamu Tsuchiya , Shooji Kubono
IPC分类号： G11C16/02 , G11C7/00 , G11C11/34 , G11C16/04 , G11C16/10
CPC分类号： G11C16/3427 , G11C16/0491 , G11C16/10 , G11C16/12 , G11C16/16 , G11C16/3404 , G11C16/3431 , G11C16/3459 , G11C2216/18
摘要： A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.
摘要翻译：非易失性半导体存储器由于与字线相关的干扰而恢复存储器单元的阈值的变化。非易失性存储器在每次写入操作之后连续执行许多写入操作，而不执行单扇区擦除，执行比通常的写入操作更快的附加写入操作，以及减轻用于附加写入的软件的负担。存储在指定扇区中的数据在保存在寄存器中之前被读出，并且当给出预定命令时，所选扇区被进行单扇区擦除。然后写入预期值数据由保存的数据和要另外编写的数据形成，完成写入操作。

60. 发明授权

US5811316A Method of forming teos oxide and silicon nitride passivation layer on aluminum wiring 失效
标题翻译：在铝线上形成氧化硅和氮化硅钝化层的方法
公开(公告)号：US5811316A
公开(公告)日：1998-09-22
申请号：US460931
申请日：1995-06-05
申请人： Jun Sugiura , Osamu Tsuchiya , Makoto Ogasawara , Fumio Ootsuka , Kazuyoshi Torii , Isamu Asano , Nobuo Owada , Mitsuaki Horiuchi , Tsuyoshi Tamaru , Hideo Aoki , Nobuhiro Otsuka , Seiichirou Shirai , Masakazu Sagawa , Yoshihiro Ikeda , Masatoshi Tsuneoka , Toru Kaga , Tomotsugu Shimmyo , Hidetsugu Ogishi , Osamu Kasahara , Hiromichi Enami , Atsushi Wakahara , Hiroyuki Akimori , Sinichi Suzuki , Keisuke Funatsu , Yoshinao Kawasaki , Tunehiko Tubone , Takayoshi Kogano , Ken Tsugane
发明人： Jun Sugiura , Osamu Tsuchiya , Makoto Ogasawara , Fumio Ootsuka , Kazuyoshi Torii , Isamu Asano , Nobuo Owada , Mitsuaki Horiuchi , Tsuyoshi Tamaru , Hideo Aoki , Nobuhiro Otsuka , Seiichirou Shirai , Masakazu Sagawa , Yoshihiro Ikeda , Masatoshi Tsuneoka , Toru Kaga , Tomotsugu Shimmyo , Hidetsugu Ogishi , Osamu Kasahara , Hiromichi Enami , Atsushi Wakahara , Hiroyuki Akimori , Sinichi Suzuki , Keisuke Funatsu , Yoshinao Kawasaki , Tunehiko Tubone , Takayoshi Kogano , Ken Tsugane
IPC分类号： G03F7/20 , G03F9/00 , H01L21/02 , H01L21/285 , H01L21/336 , H01L21/76 , H01L21/768 , H01L21/8238 , H01L21/8242 , H01L23/29 , H01L23/495 , H01L23/525 , H01L23/532 , H01L23/544 , H01L27/092 , H01L27/10 , H01L27/108 , H01L29/78 , H01L21/28
CPC分类号： H01L27/10852 , G03F7/70333 , G03F9/70 , H01L21/28512 , H01L21/76 , H01L21/76801 , H01L21/76804 , H01L21/76831 , H01L21/76834 , H01L21/76838 , H01L21/76843 , H01L21/76877 , H01L21/823807 , H01L23/291 , H01L23/4951 , H01L23/5258 , H01L23/532 , H01L23/544 , H01L27/0922 , H01L28/40 , H01L2223/54473 , H01L2224/05554 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/45565 , H01L2224/4569 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/73215 , H01L24/45 , H01L24/48 , H01L27/0928 , H01L27/10808 , H01L2924/00014 , H01L2924/01014 , H01L2924/01015 , H01L2924/01021 , H01L2924/01029 , H01L2924/01039 , H01L2924/01079 , H01L2924/04941 , H01L2924/12036 , H01L2924/12042 , H01L2924/12044 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/3025 , Y10S257/90
摘要： Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating film and channel stopper regions, comprising: the step of for forming a first mask by a non-oxidizable mask and an etching mask sequentially over the principal surface of the active regions of the substrate; the step of forming a second mask on and in self-alignment with the side walls of the first mask by a non-oxidizable mask thinner than the non-oxidizable mask of the first mask and an etching mask respectively; the step of etching the principal surface of the inactive regions of the substrate by using the first mask and the second mask; the step of forming the element separating insulating film over the principal surface of the inactive regions of the substrate by an oxidization using the first mask and the second mask; and the step of forming the channel stopper regions over the principal surface portions below the element separating insulating film of the substrate by introducing an impurity into all the surface portions including the active regions and the inactive regions of the substrate after the first mask and the second mask have been removed.
摘要翻译：这里公开了一种半导体集成电路器件制造工艺，用于在由分离绝缘膜和沟道阻挡区域形成的无源区域围绕的衬底的这些有源区的主表面上形成MISFET，其包括：形成步骤通过不可氧化掩模的第一掩模和顺序地在衬底的有源区的主表面上的蚀刻掩模; 分别通过比第一掩模的不可氧化掩模和蚀刻掩模更薄的不可氧化掩模在第一掩模的侧壁上自对准形成第二掩模的步骤; 通过使用第一掩模和第二掩模蚀刻衬底的非活性区的主表面的步骤; 通过使用第一掩模和第二掩模的氧化在衬底的无活性区域的主表面上形成元件分离绝缘膜的步骤; 以及通过在第一掩模之后将杂质引入到包括基板的有源区域和非活性区域的全部表面部分中而在基板的元件分离绝缘膜下方的主表面部分上形成沟道阻挡区域的步骤，面具已被删除。

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