会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 54. 发明授权
    • Video data recording device, video data playing device, video data recording method, and video data playing method
    • 视频数据记录装置,视频数据播放装置,视频数据记录方法和视频数据播放方法
    • US08705936B2
    • 2014-04-22
    • US13001554
    • 2010-03-18
    • Shuji TakahashiYasuhiro Ueki
    • Shuji TakahashiYasuhiro Ueki
    • H04N5/94
    • H04N5/91G06K9/00248G11B27/034G11B27/28H04N5/232H04N5/23219H04N5/772H04N5/85H04N9/8205
    • A video data recording device for sufficiently protecting privacy even before a mask target enters into a screen. The video data recording device includes a reference information storage unit in which reference information including predetermined features is recorded; a video data acquisition unit which acquires video data and sequentially outputs the video data to a video buffer; a similarity determining unit which compares newest video data and the reference information, and extracts partial information determined to be similar to the reference information from the newest video data; a relation determining unit which compares video data output to the video buffer before the newest video data, and the partial information determined to be similar, and extracts partial information determined to be related to the partial information determined to be similar; and an imaging recording I/F unit which records the video data and the related information related to the partial information in a recording medium.
    • 一种视频数据记录装置,即使在掩模目标进入屏幕之前也能充分保护隐私。 视频数据记录装置包括参考信息存储单元,其中记录了包括预定特征的参考信息; 视频数据获取单元,其获取视频数据并将视频数据顺序地输出到视频缓冲器; 相似度确定单元,对最新的视频数据和参考信息进行比较,并从最新的视频数据中提取确定为与参考信息相似的部分信息; 关系确定单元,将在最新视频数据之前的视频缓冲器输出的视频数据与确定为相似的部分信息进行比较,并且提取被确定为与被确定为相似的部分信息相关的部分信息; 以及成像记录I / F单元,其将视频数据和与部分信息相关的相关信息记录在记录介质中。
    • 55. 发明申请
    • METHOD FOR PRODUCING SILICON WAFER AND SILICON WAFER
    • 生产硅波和硅波的方法
    • US20130093060A1
    • 2013-04-18
    • US13704905
    • 2011-06-07
    • Tetsuya OkaKoji EbaraShuji Takahashi
    • Tetsuya OkaKoji EbaraShuji Takahashi
    • H01L21/26H01L29/06
    • H01L21/26C30B15/00C30B29/06C30B33/02H01L21/3225H01L29/0684
    • A silicon wafer and method for producing a silicon wafer, including at least: a first heat treatment process in which rapid heat treatment is performed on the wafer by using a rapid heating/cooling apparatus in an atmosphere containing at least one of nitride film formation atmospheric gas, rare gas, and oxidizing gas at a temperature higher than 1300° C. and lower than or equal to a silicon melting point for 1 to 60 seconds; and a second heat treatment process in which temperature and atmosphere are controlled to suppress generation of a defect caused by a vacancy in the wafer and rapid heat treatment is performed on the wafer. Therefore, RIE defects such as oxide precipitates, COPs, and OSFs are not present at a depth of at least 1 μm from the surface, which becomes a device fabrication region, and the lifetime is 500 μsec or longer.
    • 一种硅晶片和硅晶片的制造方法,其至少包括:第一热处理工序,其中在包含氮化膜形成大气中的至少一种的气氛中使用快速加热/冷却装置在晶片上进行快速热处理 气体,稀有气体和氧化气体,温度高于1300℃,低于或等于硅熔点1〜60秒; 以及第二热处理工艺,其中控制温度和气氛以抑制由晶片空位引起的缺陷的产生,并且对晶片进行快速热处理。 因此,RIE缺陷如氧化物沉淀物,COP和OSF在距离表面至少1um的深度处不存在,其成为器件制造区域,并且寿命为500μs或更长。
    • 56. 发明申请
    • PLASMA ETCHING METHOD AND APPARATUS, AND METHOD OF MANUFACTURING LIQUID EJECTION HEAD
    • 等离子体蚀刻方法和装置,以及制造液体喷射头的方法
    • US20120175061A1
    • 2012-07-12
    • US13422682
    • 2012-03-16
    • Shuji Takahashi
    • Shuji Takahashi
    • B44C1/22H05H1/24
    • B41J2/161B41J2/1623B41J2/1628B41J2/1631H01J37/32091H01J37/32963H01J2237/334H01L22/26H01L2924/0002H01L2924/00
    • The plasma etching method includes: an etching step of placing, on a stage in a chamber, a substrate in which a prescribed mask pattern is formed by a protective film on a surface of a material to be etched, generating a plasma in the chamber while supplying processing gas to the chamber, and etching a portion of the material corresponding to an opening portion in the mask pattern; a voltage measurement step of, during the etching in the etching step, measuring a voltage at the surface of the material on a side where the mask pattern is formed, through a conductive member that is placed in contact with the surface of the material on the side where the mask pattern is formed; and a control step of controlling an etching condition in the etching step in accordance with a measurement result obtained in the voltage measurement step.
    • 等离子体蚀刻方法包括:蚀刻步骤,在室中的台上放置通过保护膜在待蚀刻材料的表面上形成规定的掩模图案的基板,在腔室中产生等离子体,同时 向所述室供应处理气体,并且蚀刻与所述掩模图案中的开口部分相对应的所述材料的一部分; 电压测量步骤,在蚀刻步骤的蚀刻期间,通过与所述材料的表面接触放置的导电构件测量形成有所述掩模图案的一侧上的所述材料的表面处的电压 形成掩模图案的一侧; 以及根据在电压测量步骤中获得的测量结果来控制蚀刻步骤中的蚀刻条件的控制步骤。
    • 57. 发明授权
    • Liquid ejection head
    • 液体喷头
    • US07735750B2
    • 2010-06-15
    • US11290695
    • 2005-12-01
    • Yasuhisa KanekoShuji TakahashiYoshinori HottaToshiaki Fukunaga
    • Yasuhisa KanekoShuji TakahashiYoshinori HottaToshiaki Fukunaga
    • B05B1/08
    • B41J2/1606Y10T428/24355
    • The repellency increasing structure includes a substrate, if a surface of the substrate is flat, a flat surface of which shows lyophilic property with respect to a liquid having a surface tension lower than that of water and multiple recesses multiple and/or projections that are formed in the surface of the substrate. Inner walls of the recesses and outer walls of the projections are substantially parallel to a thickness direction of the substrate. The structure further includes a repellent layer that covers the recesses and the projections. In the liquid ejection head, a solution ejection surface around multiple through-holes of a ejection substrate corresponds to the surface of the substrate of the repellency increasing structure in which the recesses and/or the projections are formed. In the stain-resistant film, the substrate of the repellency increasing structure is a support film.
    • 排斥性增加结构包括基材,如果基材的表面是平坦的,其平坦表面相对于表面张力低于水的表面张力的液体显示亲液性,并且多个凹陷形成多个和/或突起 在基板的表面。 突起的凹部和外壁的内壁基本上平行于基板的厚度方向。 该结构还包括覆盖凹部和突起的驱避层。 在液体喷射头中,喷射基板的多个通孔周围的溶液喷射面对应于形成凹部和/或突起的排斥性增加结构的基板的表面。 在耐污染膜中,斥力增加结构的基材是支持膜。
    • 59. 发明申请
    • Motor
    • 发动机
    • US20050001495A1
    • 2005-01-06
    • US10710341
    • 2004-07-02
    • Shuji TakahashiShinichi MurataTomoyuki Inoue
    • Shuji TakahashiShinichi MurataTomoyuki Inoue
    • F16C33/10F16C33/74F16C35/02H02K5/10H02K5/167H02K7/08H02K7/14H02K5/16
    • F16C33/103F16C33/74H02K5/1675
    • A motor of this invention is provided with a sleeve-type bearing impregnated with oil for supporting a rotor assembly including a shaft and a rotor member. A lower face of the rotor is provided with at least two peripheral wall portions, an inner peripheral wall portion and an outer peripheral wall portion, which surround the shaft with a gap therebetween in a radial direction. The peripheral wall portions are accommodated in an annular recessed portion so as to surround an open space over a sleeve constituted the sleeve-type bearing and has a lower top of the most inner part. The lower end of the inner peripheral wall portion is located lower than the lower end of the outer peripheral wall portion, and the lower end of the outer peripheral wall portion is located lower than the lower top of the annular recessed portion.
    • 本发明的电动机具有浸渍油的套筒型轴承,用于支撑包括轴和转子构件的转子组件。 转子的下表面设置有至少两个周壁部分,内周壁部分和外周壁部分,其围绕轴在径向方向上具有间隙。 周壁部分容纳在环形凹部中,以围绕构成套筒式轴承的套筒包围开放空间,并具有最内部的下部顶部。 内周壁部的下端位于比外周壁部的下端低的位置,外周壁部的下端位于比环状凹部的下方的下方低的位置。
    • 60. 发明授权
    • Semiconductor integrated circuit designing system taking insertion of repeaters into consideration and designing method thereof
    • 考虑插入中继器的半导体集成电路设计系统及其设计方法
    • US06198978B1
    • 2001-03-06
    • US09129538
    • 1998-08-05
    • Shuji Takahashi
    • Shuji Takahashi
    • G06F1900
    • G06F17/5022G06F17/5068
    • A semiconductor integrated circuit designing system comprises an input unit for receiving input of parameters regarding circuit blocks constituting an LSI, a repeater information calculation unit for obtaining information regarding repeater insertion by using applied parameters, a circuit block arrangement unit for arranging circuit blocks based on information regarding repeater insertion, a delay calculation unit for calculating a wire delay of wiring between arranged circuit blocks, a cycle time calculation unit for obtaining a cycle time of the entire LSI based on a calculated delay value, and a detailed wiring unit for conducting detailed wiring within a circuit block on an LSI whose arrangement on a circuit block basis and wiring processing have been completed.
    • 半导体集成电路设计系统包括用于接收关于构成LSI的电路块的参数的输入的输入单元,用于通过使用应用的参数来获得关于中继器插入的信息的中继器信息计算单元,用于基于信息排列电路块的电路块布置单元 关于中继器插入的延迟计算单元,用于计算布置的电路块之间的布线的延时的延迟计算单元,用于基于计算的延迟值获得整个LSI的周期时间的周期时间计算单元和用于进行详细布线的详细布线单元 在其基于电路块和布线处理的布置已经完成的LSI的电路块内。