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41. 发明授权

US5256958A Concentrator-based growable packet switch 失效
标题翻译：基于集中器的可扩展分组交换机
公开(公告)号：US5256958A
公开(公告)日：1993-10-26
申请号：US797849
申请日：1991-11-26
申请人： Kai Y. Eng , Mark J. Karol , Mark A. Pashan
发明人： Kai Y. Eng , Mark J. Karol , Mark A. Pashan
IPC分类号： H04L12/56 , H04Q11/04
CPC分类号： H04L12/5601 , H04L49/1553 , H04L49/1576 , H04Q11/0478 , H04L2012/561 , H04L2012/5681
摘要： An m.times.n (m>n) output Packet Switch Unit is implemented by using an n.times.n Packet Switch Module and an m:n Concentrator. The arriving packet cells are supplied from the m Concentrator inputs to the n Concentrator outputs in a "first-in first-out" (FIFO) sequence. The Concentrator provides for buffering of arriving packet cells on the m Concentrator inputs in excess of available packet cell positions in the n Concentrator outputs until they can be supplied to a concentrator output in the FIFO sequence. In turn, packet cells from the n Concentrator outputs are supplied to n inputs of the Packet Switch Module which supplies them to appropriate output destinations associated with the n outputs of the Packet Switch Module. A plurality of the Concentrator-Based output Packet Switch Units is readily employed to implement any "larger" Packet Switch architecture.

42. 发明授权

US5177736A Packet switch 失效
标题翻译：分组开关
公开(公告)号：US5177736A
公开(公告)日：1993-01-05
申请号：US649966
申请日：1991-02-04
申请人： Shiro Tanabe , Akinori Kubo , Yoshiaki Kihara
发明人： Shiro Tanabe , Akinori Kubo , Yoshiaki Kihara
IPC分类号： H04L12/933 , H04L12/935
CPC分类号： H04L12/5601 , H04L49/106 , H04L49/1576 , H04L49/255 , H04L49/309 , H04L49/455 , H04L2012/561
摘要： A packet switch comprises a switch having a plurality of input lines and a plurality of output lines for sending a packet supplied from each of the input lines to one of the output lines selected in accordance with routing information attached to each packet, a plurality of pairs of input/output lines connected to terminals or other switches, a plurality of line interface provided one for each of the input/output lines and each connected to one of the input lines and one of the output lines of the switch, and a controller connected to one of the input lines and one of the output lines of the switch. Control information is communicated between the controller and the line interfaces or the switch via a control packet through the switch. The switch may be a plurality of multi-stage connected unit switches and input lines and output lines thereof are divided into a plurality of groups. The controller is connected to an input line of one of first stage unit switches and an output line of one of final stage unit switches of one of the switch groups.

43. 发明授权

US5157654A Technique for resolving output port contention in a high speed packet switch 失效
标题翻译：解决高速分组交换机输出端口竞争的技术
公开(公告)号：US5157654A
公开(公告)日：1992-10-20
申请号：US629576
申请日：1990-12-18
申请人： Arturo Cisneros
发明人： Arturo Cisneros
IPC分类号： H04L12/56 , H04Q11/04
CPC分类号： H04L12/5601 , H04L49/1561 , H04L49/1576 , H04Q11/0478 , H04L2012/5627 , H04L2012/5672 , H04L2012/5679 , H04L2012/5681
摘要： Apparatus, and accompanying methods for use therein, for a large (e.g. approximately 1 Terabit/second), fault tolerant packet switch (200), particularly suited for asynchronous mode transfer (ATM) communication, which utilizes cell address look-ahead in conjunction with parallel, planes of self-routing cross-points (550), staggered time phased contention resolution and shared memory based input and output modules (260 and 270, respectively). The contention resolution involves storing for each input packet in two registers the address of the incoming packet and an indication of whether that packet had priorly lost a contention resolution. In that way a fairness factor is added to the contention resolution.
摘要翻译：对于大型（例如大约1兆比特/秒）容错分组交换机（200），特别适用于异步模式传输（ATM）通信的大型（例如大约1兆比特/秒）的装置及其附带的方法，其特别适用于与小区地址一起使用的小区地址平行的自路由交叉点（550），交错时间相位争用解决方案和基于共享内存的输入和输出模块（分别为260和270）。争用解决方案涉及将两个寄存器中的每个输入分组存储到输入分组的地址以及该分组先前是否丢失争用解决的指示。以这种方式，公正因素被添加到争用解决方案中。

44. 发明授权

US4872160A Integrated packetized voice and data switching system 失效
公开(公告)号：US4872160A
公开(公告)日：1989-10-03
申请号：US238309
申请日：1988-08-30
申请人： Jayant G. Hemmady , William P. Lidinsky , Scott B. Steele , Werner Ulrich , Ronald C. Weddige
发明人： Jayant G. Hemmady , William P. Lidinsky , Scott B. Steele , Werner Ulrich , Ronald C. Weddige
IPC分类号： H04L12/56 , H04L29/06
CPC分类号： H04L49/35 , H04L49/106 , H04L49/107 , H04L49/1576 , H04L49/1584 , H04L49/205 , H04L49/253 , H04L49/256 , H04L49/3009 , H04L49/3081 , H04L49/309 , H04L49/506 , H04L49/557 , H04L49/606 , H04L2012/5651 , H04L2012/5679 , H04L2012/5687 , H04L49/1515 , H04L49/30 , H04L49/40 , H04L49/555 , H04L63/02
摘要： A high capacity metropolitan area network (MAN) is described. Data traffic from users is connected to data concentrators at the edge of the network, and is transmitted over fiber optic data links to a hub where the data is switched. The hub includes a plurality of data switching modules, each having a control means, and each connected to a distributed control space divisison switch. Advantageously, the data switching modules, whose inputs are connected to the concentrators, perform all checking and routing functions, while the 1024.times.1024 maximum size space division switch, whose outputs are connected to the concentrators, provides a large fan-out distribution network for reaching many concentrators from each data switching module. Distributed control of the space division switch permits several million connection and disconnection actions to be performed each second, while the pipelined and parallel operation within the control means permits each of the 256 switching modules to process at least 50,000 transactions per second. The data switching modules chain groups of incoming packets destined for a common outlet of the space division switch so that only one connection in that switch is required for transmitting each group of chained packets from a data switching module to a concentrator. MAN provides security features including a port identification supplied by the data concentrators, and a check that each packet is from an authorized source user, transmitting on a port associated with that user, to an authorized destination user that is in the same group (virtual network) as the source user.This arrangement can also be used to switch voice packets, using a voice interface such as a digital switch and a digital voice signal to voice packet converter. In accordance with one embodiment of the invention, a packet switch is used for switching voice packet outputs of the data switching modules and a circuit switch, such as the space division switch, is used for switching data packet outputs. In accordance with another embodiment, voice packets are switched from the data switching modules through the space division switch to a small group of data switching modules, which further switch the voice packets through the circuit switch to a destination concentrator.

45. 发明授权

US10491543B1 Shared memory switch fabric system and method 有权
公开(公告)号：US10491543B1
公开(公告)日：2019-11-26
申请号：US15990420
申请日：2018-05-25
申请人： Juniper Networks, Inc.
发明人： Rahul Wagh , Kapil Suri , Gurjeet Singh , Harshad B Agashe , Srihari Raju Vegesna , Dinesh Jaiswal
IPC分类号： H04L12/935 , H04L12/933 , H04L12/801
CPC分类号： H04L49/30 , H04L47/18 , H04L49/1569 , H04L49/1576
摘要： A system and method of transferring cells through a switch fabric having a shared memory crossbar switch, a plurality of cell receive blocks and a plurality of cell transmit blocks. The system determines, based on a number of cells queued up in respective output buffers in the cell transmit blocks, output buffers in the cell transmit blocks that can receive cells on a low latency path. The cells transferred include first cells that can be transferred on the low latency path and second cells that cannot be transferred via the low latency path. The first cells are transferred via a bypass mechanism in shared memory to the output buffers. The second cells are transferred by writing the second cells to shared memory, reading the second cells from shared memory and transferring the second cells read from shared memory to the output buffers in the cell transmit blocks.

46. 发明申请

US20170127161A1 Routing Node, Optical Switching Network, and Optical Signal Transmission Method 审中-公开
公开(公告)号：US20170127161A1
公开(公告)日：2017-05-04
申请号：US15407441
申请日：2017-01-17
申请人： Huawei Technologies Co., Ltd.
发明人： Liang Song , Wei Zhang , Qinfen Hao
IPC分类号： H04Q11/00
CPC分类号： H04Q11/0071 , H04L49/1576 , H04L49/3018 , H04L49/357 , H04Q11/0003 , H04Q2011/002 , H04Q2011/0073
摘要： A routing node includes: at least one optical buffer, a switching node, and at least one transmission waveguide, where an output end of each optical buffer is connected to an input end of the switching node; each transmission waveguide is connected to an output end of the switching node. The optical buffer is configured to parse a received optical signal to obtain an identifier of a destination routing node, and send the identifier to the switching node. The switching node determines whether an output port required by the destination routing node is in an idle state or a busy state; and control the optical buffer to store the optical signal if the output port is in a busy state; or send the optical signal to the destination routing node if the output port is in an idle state.

47. 发明申请

US20160261484A9 CHIP MULTI PROCESSOR AND ROUTER FOR CHIP MULTI PROCESSOR 审中-公开
标题翻译：芯片多处理器的芯片多处理器和路由器
公开(公告)号：US20160261484A9
公开(公告)日：2016-09-08
申请号：US13680014
申请日：2012-11-17
申请人： Woong Seo
发明人： Woong Seo
IPC分类号： H04L12/56
CPC分类号： H04L45/00 , H04L12/66 , H04L45/306 , H04L49/109 , H04L49/1576
摘要： Provided is a chip multi processor that supports both a packet switching method and a circuit switching method, and a router for the chip multi processor. According to an aspect, the chip multi processor includes a plurality of nodes that each include a router, and a plurality of links formed between the routers. Each of the routers may transfer a first type of data based on packet switching and a second type of data based on circuit switching.
摘要翻译：提供了支持分组交换方法和电路交换方法的芯片多处理器，以及用于芯片多处理器的路由器。根据一方面，芯片多处理器包括多个节点，每个节点包括路由器，以及在路由器之间形成的多个链路。每个路由器可以基于分组交换和基于电路交换的第二类型的数据来传送第一类型的数据。

48. 发明授权

US09391835B2 Network switch 有权
标题翻译：网络交换机
公开(公告)号：US09391835B2
公开(公告)日：2016-07-12
申请号：US13861307
申请日：2013-04-11
申请人： HITACHI CABLE, LTD.
发明人： Kenji Aoshima , Chikara Sawaguchi
IPC分类号： H04J3/14 , H04L12/24 , H04L12/939 , H04L12/933
CPC分类号： H04L41/0654 , H04L49/1576 , H04L49/557
摘要： A network switch is provided which can shorten a time required for switching-over to a backup route when a failure has occurred in a port for which an LAG is set. The network switch includes a failure detection unit for detecting a port failure, and a forced transfer processing unit for, when a failure is detected in a port at a transfer destination as a target in trying to transfer a received unicast frame and when an link aggregation group is set for a plurality of ports including the relevant port at the transfer destination, forcibly transferring the received unicast frame to another port for which the same link aggregation group as that set for the relevant port at the transfer destination is set.
摘要翻译：提供了一种网络交换机，当在设置了LAG的端口中发生故障时，可以缩短切换到备份路由所需的时间。网络交换机包括用于检测端口故障的故障检测单元，以及强制传送处理单元，用于在尝试传送所接收的单播帧时在传送目的地的端口中检测到故障作为目标，并且当链路聚合将多个端口设置为包括转发目的地的相关端口的多个端口，强制将接收到的单播帧传送到与传送目的地的相关端口设置的链路聚合组相同的链路聚合组的另一端口。

49. 发明授权

US08953603B2 Methods and apparatus related to a distributed switch fabric 有权
标题翻译：与分布式交换结构相关的方法和设备
公开(公告)号：US08953603B2
公开(公告)日：2015-02-10
申请号：US12607162
申请日：2009-10-28
申请人： Gunes Aybay
发明人： Gunes Aybay
IPC分类号： H04L12/50 , H04L12/56 , H04L12/933 , H04L12/935 , H04L12/947 , H04L12/54
CPC分类号： H04L49/3009 , H04L12/5601 , H04L45/74 , H04L45/7453 , H04L49/101 , H04L49/1515 , H04L49/1561 , H04L49/1569 , H04L49/1576 , H04L49/25 , H04L49/256 , H04L69/22
摘要： A method of sending data to a switch fabric includes assigning a destination port of an output module to a data packet based on at least one field in a first header of the data packet. A module associated with a first stage of the switch fabric is selected based on at least one field in the first header. A second header is appended to the data packet. The second header includes an identifier associated with the destination port of the output module. The data packet is sent to the module associated with the first stage. The module associated with the first stage is configured to send the data packet to a module associated with a second stage of the switch fabric based on the second header.
摘要翻译：向交换结构发送数据的方法包括基于数据分组的第一报头中的至少一个字段将输出模块的目的端口分配给数据分组。基于第一报头中的至少一个字段来选择与交换结构的第一级相关联的模块。第二个标题附加到数据包。第二标题包括与输出模块的目的地端口相关联的标识符。数据包被发送到与第一级相关联的模块。与第一级相关联的模块被配置为基于第二标头将数据分组发送到与交换结构的第二级相关联的模块。

50. 发明授权

US08930595B2 Memory switch for interconnecting server nodes 有权
标题翻译：用于互连服务器节点的内存交换机
公开(公告)号：US08930595B2
公开(公告)日：2015-01-06
申请号：US13529452
申请日：2012-06-21
申请人： David E. Mayhew
发明人： David E. Mayhew
IPC分类号： G06F3/00 , G06F5/00 , G06F12/00
CPC分类号： G06F15/167 , H04L49/1576
摘要： Described is a data switching device comprising a plurality of input ports, a plurality of output ports, a plurality of first conductive connectors, a plurality of second conductive connectors, a plurality of crosspoint regions, and a memory device at each crosspoint region. The first conductive connectors are in communication with the input ports. The second conductive connectors are in communication with the output ports. Each crosspoint region includes a first conductive connector and a second conductive connector. The memory device is coupled between the first conductive connector and the second conductive connector for exchanging data between the input ports and the output ports.
摘要翻译：描述了一种数据切换装置，包括多个输入端口，多个输出端口，多个第一导电连接器，多个第二导电连接器，多个交叉点区域以及每个交叉点区域处的存储器件。第一导电连接器与输入端口连通。第二导电连接器与输出端口连通。每个交叉点区域包括第一导电连接器和第二导电连接器。存储器件耦合在第一导电连接器和第二导电连接器之间，用于在输入端口和输出端口之间交换数据。

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